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authorxoviat <[email protected]>2023-04-17 17:02:40 -0500
committerxoviat <[email protected]>2023-04-18 20:38:18 -0500
commitf589247c1f80a6a9f95a16bedf7594cdef62185f (patch)
tree02efdcd78e99b8af772856d3a7c2cdd438e4dbd3
parent46227bec1e948ea89de7d4e8a8dc98df5d7a25f0 (diff)
stm32/rtc: cleanup and consolidate
-rw-r--r--embassy-stm32/src/rtc/datetime_chrono.rs85
-rw-r--r--embassy-stm32/src/rtc/mod.rs2
-rw-r--r--embassy-stm32/src/rtc/v2.rs (renamed from embassy-stm32/src/rtc/v2/mod.rs)92
-rw-r--r--embassy-stm32/src/rtc/v2/v2f0.rs41
-rw-r--r--embassy-stm32/src/rtc/v2/v2f2.rs31
-rw-r--r--embassy-stm32/src/rtc/v2/v2f3.rs31
-rw-r--r--embassy-stm32/src/rtc/v2/v2f4.rs31
-rw-r--r--embassy-stm32/src/rtc/v2/v2f7.rs41
-rw-r--r--embassy-stm32/src/rtc/v2/v2h7.rs33
-rw-r--r--embassy-stm32/src/rtc/v2/v2l0.rs26
-rw-r--r--embassy-stm32/src/rtc/v2/v2l1.rs24
-rw-r--r--embassy-stm32/src/rtc/v2/v2l4.rs41
-rw-r--r--embassy-stm32/src/rtc/v2/v2wb.rs39
-rw-r--r--examples/stm32f4/Cargo.toml1
-rw-r--r--examples/stm32f4/src/bin/rtc.rs30
15 files changed, 110 insertions, 438 deletions
diff --git a/embassy-stm32/src/rtc/datetime_chrono.rs b/embassy-stm32/src/rtc/datetime_chrono.rs
deleted file mode 100644
index b46316cc9..000000000
--- a/embassy-stm32/src/rtc/datetime_chrono.rs
+++ /dev/null
@@ -1,85 +0,0 @@
1use chrono::{Datelike, Timelike};
2
3use super::byte_to_bcd2;
4use crate::pac::rtc::Rtc;
5
6/// Alias for [`chrono::NaiveDateTime`]
7pub type DateTime = chrono::NaiveDateTime;
8/// Alias for [`chrono::Weekday`]
9pub type DayOfWeek = chrono::Weekday;
10
11/// Errors regarding the [`DateTime`] and [`DateTimeFilter`] structs.
12///
13/// [`DateTimeFilter`]: struct.DateTimeFilter.html
14#[derive(Clone, Debug, PartialEq, Eq)]
15pub enum Error {
16 /// The [DateTime] has an invalid year. The year must be between 0 and 4095.
17 InvalidYear,
18 /// The [DateTime] contains an invalid date.
19 InvalidDate,
20 /// The [DateTime] contains an invalid time.
21 InvalidTime,
22}
23
24pub(super) fn day_of_week_to_u8(dotw: DayOfWeek) -> u8 {
25 dotw.num_days_from_monday() as u8
26}
27
28pub(crate) fn validate_datetime(dt: &DateTime) -> Result<(), Error> {
29 if dt.year() < 0 || dt.year() > 4095 {
30 // rp2040 can't hold these years
31 Err(Error::InvalidYear)
32 } else {
33 // The rest of the chrono date is assumed to be valid
34 Ok(())
35 }
36}
37
38pub(super) fn write_date_time(rtc: &Rtc, t: DateTime) {
39 let (ht, hu) = byte_to_bcd2(t.hour() as u8);
40 let (mnt, mnu) = byte_to_bcd2(t.minute() as u8);
41 let (st, su) = byte_to_bcd2(t.second() as u8);
42
43 let (dt, du) = byte_to_bcd2(t.day() as u8);
44 let (mt, mu) = byte_to_bcd2(t.month() as u8);
45 let yr = t.year() as u16;
46 let yr_offset = (yr - 1970_u16) as u8;
47 let (yt, yu) = byte_to_bcd2(yr_offset);
48
49 unsafe {
50 rtc.tr().write(|w| {
51 w.set_ht(ht);
52 w.set_hu(hu);
53 w.set_mnt(mnt);
54 w.set_mnu(mnu);
55 w.set_st(st);
56 w.set_su(su);
57 w.set_pm(stm32_metapac::rtc::vals::Ampm::AM);
58 });
59
60 rtc.dr().write(|w| {
61 w.set_dt(dt);
62 w.set_du(du);
63 w.set_mt(mt > 0);
64 w.set_mu(mu);
65 w.set_yt(yt);
66 w.set_yu(yu);
67 w.set_wdu(day_of_week_to_u8(t.weekday()));
68 });
69 }
70}
71
72pub(super) fn datetime(
73 year: u16,
74 month: u8,
75 day: u8,
76 _day_of_week: u8,
77 hour: u8,
78 minute: u8,
79 second: u8,
80) -> Result<DateTime, Error> {
81 let date = chrono::NaiveDate::from_ymd_opt(year.into(), month.try_into().unwrap(), day.into())
82 .ok_or(Error::InvalidDate)?;
83 let time = chrono::NaiveTime::from_hms_opt(hour.into(), minute.into(), second.into()).ok_or(Error::InvalidTime)?;
84 Ok(DateTime::new(date, time))
85}
diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs
index 170783b2d..c2f07a066 100644
--- a/embassy-stm32/src/rtc/mod.rs
+++ b/embassy-stm32/src/rtc/mod.rs
@@ -10,7 +10,7 @@ pub use self::datetime::{DateTime, DayOfWeek, Error as DateTimeError};
10 any( 10 any(
11 rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb 11 rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
12 ), 12 ),
13 path = "v2/mod.rs" 13 path = "v2.rs"
14)] 14)]
15#[cfg_attr(any(rtc_v3, rtc_v3u5), path = "v3.rs")] 15#[cfg_attr(any(rtc_v3, rtc_v3u5), path = "v3.rs")]
16mod versions; 16mod versions;
diff --git a/embassy-stm32/src/rtc/v2/mod.rs b/embassy-stm32/src/rtc/v2.rs
index 296adae89..abf3da3be 100644
--- a/embassy-stm32/src/rtc/v2/mod.rs
+++ b/embassy-stm32/src/rtc/v2.rs
@@ -3,20 +3,6 @@ use stm32_metapac::rtc::vals::{Init, Osel, Pol};
3use super::{Instance, RtcConfig}; 3use super::{Instance, RtcConfig};
4use crate::pac::rtc::Rtc; 4use crate::pac::rtc::Rtc;
5 5
6#[cfg_attr(rtc_v2f0, path = "v2f0.rs")]
7#[cfg_attr(rtc_v2f2, path = "v2f2.rs")]
8#[cfg_attr(rtc_v2f3, path = "v2f3.rs")]
9#[cfg_attr(rtc_v2f4, path = "v2f4.rs")]
10#[cfg_attr(rtc_v2f7, path = "v2f7.rs")]
11#[cfg_attr(rtc_v2h7, path = "v2h7.rs")]
12#[cfg_attr(rtc_v2l0, path = "v2l0.rs")]
13#[cfg_attr(rtc_v2l1, path = "v2l1.rs")]
14#[cfg_attr(rtc_v2l4, path = "v2l4.rs")]
15#[cfg_attr(rtc_v2wb, path = "v2wb.rs")]
16mod family;
17
18pub use family::*;
19
20impl<'d, T: Instance> super::Rtc<'d, T> { 6impl<'d, T: Instance> super::Rtc<'d, T> {
21 /// Applies the RTC config 7 /// Applies the RTC config
22 /// It this changes the RTC clock source the time will be reset 8 /// It this changes the RTC clock source the time will be reset
@@ -169,3 +155,81 @@ pub fn write_backup_register(rtc: &Rtc, register: usize, value: u32) {
169 unsafe { rtc.bkpr(register).write(|w| w.set_bkp(value)) } 155 unsafe { rtc.bkpr(register).write(|w| w.set_bkp(value)) }
170 } 156 }
171} 157}
158
159pub(crate) unsafe fn enable_peripheral_clk() {
160 #[cfg(any(rtc_v2f0, rtc_v2f7, rtc_v2l4, rtc_v2wb))]
161 {
162 // enable peripheral clock for communication
163 crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true));
164
165 // read to allow the pwr clock to enable
166 crate::pac::PWR.cr1().read();
167 }
168}
169
170pub const BACKUP_REGISTER_COUNT: usize = 20;
171
172pub(super) unsafe fn unlock_backup_domain(clock_config: u8) {
173 #[cfg(not(rtc_v2wb))]
174 use stm32_metapac::rcc::vals::Rtcsel;
175
176 #[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))]
177 let cr = crate::pac::PWR.cr();
178 #[cfg(any(rtc_v2f0, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l4, rtc_v2wb))]
179 let cr = crate::pac::PWR.cr1();
180
181 // TODO: Missing from PAC for l0?
182 #[cfg(not(rtc_v2l0))]
183 {
184 cr.modify(|w| w.set_dbp(true));
185 while !cr.read().dbp() {}
186 }
187
188 #[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
189 let reg = crate::pac::RCC.bdcr().read();
190 #[cfg(any(rtc_v2l0, rtc_v2l1))]
191 let reg = crate::pac::RCC.csr().read();
192
193 #[cfg(any(rtc_v2f0, rtc_v2f7, rtc_v2h7, rtc_v2l4, rtc_v2wb))]
194 assert!(!reg.lsecsson(), "RTC is not compatible with LSE CSS, yet.");
195
196 #[cfg(rtc_v2wb)]
197 let rtcsel = reg.rtcsel();
198 #[cfg(not(rtc_v2wb))]
199 let rtcsel = reg.rtcsel().0;
200
201 if !reg.rtcen() || rtcsel != clock_config {
202 #[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
203 crate::pac::RCC.bdcr().modify(|w| w.set_bdrst(true));
204
205 #[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
206 let cr = crate::pac::RCC.bdcr();
207 #[cfg(any(rtc_v2l0, rtc_v2l1))]
208 let cr = crate::pac::RCC.csr();
209
210 cr.modify(|w| {
211 // Reset
212 #[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
213 w.set_bdrst(false);
214
215 // Select RTC source
216 #[cfg(not(rtc_v2wb))]
217 w.set_rtcsel(Rtcsel(clock_config));
218 #[cfg(rtc_v2wb)]
219 w.set_rtcsel(clock_config);
220 w.set_rtcen(true);
221
222 // Restore bcdr
223 #[cfg(any(rtc_v2f0, rtc_v2f7, rtc_v2l4, rtc_v2wb))]
224 w.set_lscosel(reg.lscosel());
225 #[cfg(any(rtc_v2f0, rtc_v2f7, rtc_v2l4, rtc_v2wb))]
226 w.set_lscoen(reg.lscoen());
227
228 w.set_lseon(reg.lseon());
229
230 #[cfg(any(rtc_v2f0, rtc_v2f7, rtc_v2h7, rtc_v2l4, rtc_v2wb))]
231 w.set_lsedrv(reg.lsedrv());
232 w.set_lsebyp(reg.lsebyp());
233 });
234 }
235}
diff --git a/embassy-stm32/src/rtc/v2/v2f0.rs b/embassy-stm32/src/rtc/v2/v2f0.rs
deleted file mode 100644
index d6871d91e..000000000
--- a/embassy-stm32/src/rtc/v2/v2f0.rs
+++ /dev/null
@@ -1,41 +0,0 @@
1use stm32_metapac::rcc::vals::Rtcsel;
2
3pub const BACKUP_REGISTER_COUNT: usize = 20;
4
5/// Unlock the backup domain
6pub(super) unsafe fn unlock_backup_domain(clock_config: u8) {
7 crate::pac::PWR.cr1().modify(|w| w.set_dbp(true));
8 while !crate::pac::PWR.cr1().read().dbp() {}
9
10 let reg = crate::pac::RCC.bdcr().read();
11 assert!(!reg.lsecsson(), "RTC is not compatible with LSE CSS, yet.");
12
13 if !reg.rtcen() || reg.rtcsel().0 != clock_config {
14 crate::pac::RCC.bdcr().modify(|w| w.set_bdrst(true));
15
16 crate::pac::RCC.bdcr().modify(|w| {
17 // Reset
18 w.set_bdrst(false);
19
20 // Select RTC source
21 w.set_rtcsel(Rtcsel(clock_config));
22 w.set_rtcen(true);
23
24 // Restore bcdr
25 w.set_lscosel(reg.lscosel());
26 w.set_lscoen(reg.lscoen());
27
28 w.set_lseon(reg.lseon());
29 w.set_lsedrv(reg.lsedrv());
30 w.set_lsebyp(reg.lsebyp());
31 });
32 }
33}
34
35pub(crate) unsafe fn enable_peripheral_clk() {
36 // enable peripheral clock for communication
37 crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true));
38
39 // read to allow the pwr clock to enable
40 crate::pac::PWR.cr1().read();
41}
diff --git a/embassy-stm32/src/rtc/v2/v2f2.rs b/embassy-stm32/src/rtc/v2/v2f2.rs
deleted file mode 100644
index e041f3f4e..000000000
--- a/embassy-stm32/src/rtc/v2/v2f2.rs
+++ /dev/null
@@ -1,31 +0,0 @@
1use stm32_metapac::rcc::vals::Rtcsel;
2
3pub const BACKUP_REGISTER_COUNT: usize = 20;
4
5/// Unlock the backup domain
6pub(super) unsafe fn unlock_backup_domain(clock_config: u8) {
7 crate::pac::PWR.cr().modify(|w| w.set_dbp(true));
8 while !crate::pac::PWR.cr().read().dbp() {}
9
10 let reg = crate::pac::RCC.bdcr().read();
11
12 if !reg.rtcen() || reg.rtcsel().0 != clock_config {
13 crate::pac::RCC.bdcr().modify(|w| w.set_bdrst(true));
14
15 crate::pac::RCC.bdcr().modify(|w| {
16 // Reset
17 w.set_bdrst(false);
18
19 // Select RTC source
20 w.set_rtcsel(Rtcsel(clock_config));
21 w.set_rtcen(true);
22
23 w.set_lseon(reg.lseon());
24 w.set_lsebyp(reg.lsebyp());
25 });
26 }
27}
28
29pub(crate) unsafe fn enable_peripheral_clk() {
30 // Nothing to do
31}
diff --git a/embassy-stm32/src/rtc/v2/v2f3.rs b/embassy-stm32/src/rtc/v2/v2f3.rs
deleted file mode 100644
index e041f3f4e..000000000
--- a/embassy-stm32/src/rtc/v2/v2f3.rs
+++ /dev/null
@@ -1,31 +0,0 @@
1use stm32_metapac::rcc::vals::Rtcsel;
2
3pub const BACKUP_REGISTER_COUNT: usize = 20;
4
5/// Unlock the backup domain
6pub(super) unsafe fn unlock_backup_domain(clock_config: u8) {
7 crate::pac::PWR.cr().modify(|w| w.set_dbp(true));
8 while !crate::pac::PWR.cr().read().dbp() {}
9
10 let reg = crate::pac::RCC.bdcr().read();
11
12 if !reg.rtcen() || reg.rtcsel().0 != clock_config {
13 crate::pac::RCC.bdcr().modify(|w| w.set_bdrst(true));
14
15 crate::pac::RCC.bdcr().modify(|w| {
16 // Reset
17 w.set_bdrst(false);
18
19 // Select RTC source
20 w.set_rtcsel(Rtcsel(clock_config));
21 w.set_rtcen(true);
22
23 w.set_lseon(reg.lseon());
24 w.set_lsebyp(reg.lsebyp());
25 });
26 }
27}
28
29pub(crate) unsafe fn enable_peripheral_clk() {
30 // Nothing to do
31}
diff --git a/embassy-stm32/src/rtc/v2/v2f4.rs b/embassy-stm32/src/rtc/v2/v2f4.rs
deleted file mode 100644
index 4dd21cae4..000000000
--- a/embassy-stm32/src/rtc/v2/v2f4.rs
+++ /dev/null
@@ -1,31 +0,0 @@
1use stm32_metapac::rcc::vals::Rtcsel;
2
3pub const BACKUP_REGISTER_COUNT: usize = 20;
4
5/// Unlock the backup domain
6pub(super) unsafe fn unlock_backup_domain(clock_config: u8) {
7 crate::pac::PWR.cr1().modify(|w| w.set_dbp(true));
8 while !crate::pac::PWR.cr1().read().dbp() {}
9
10 let reg = crate::pac::RCC.bdcr().read();
11
12 if !reg.rtcen() || reg.rtcsel().0 != clock_config {
13 crate::pac::RCC.bdcr().modify(|w| w.set_bdrst(true));
14
15 crate::pac::RCC.bdcr().modify(|w| {
16 // Reset
17 w.set_bdrst(false);
18
19 // Select RTC source
20 w.set_rtcsel(Rtcsel(clock_config));
21 w.set_rtcen(true);
22
23 w.set_lseon(reg.lseon());
24 w.set_lsebyp(reg.lsebyp());
25 });
26 }
27}
28
29pub(crate) unsafe fn enable_peripheral_clk() {
30 // Nothing to do
31}
diff --git a/embassy-stm32/src/rtc/v2/v2f7.rs b/embassy-stm32/src/rtc/v2/v2f7.rs
deleted file mode 100644
index d6871d91e..000000000
--- a/embassy-stm32/src/rtc/v2/v2f7.rs
+++ /dev/null
@@ -1,41 +0,0 @@
1use stm32_metapac::rcc::vals::Rtcsel;
2
3pub const BACKUP_REGISTER_COUNT: usize = 20;
4
5/// Unlock the backup domain
6pub(super) unsafe fn unlock_backup_domain(clock_config: u8) {
7 crate::pac::PWR.cr1().modify(|w| w.set_dbp(true));
8 while !crate::pac::PWR.cr1().read().dbp() {}
9
10 let reg = crate::pac::RCC.bdcr().read();
11 assert!(!reg.lsecsson(), "RTC is not compatible with LSE CSS, yet.");
12
13 if !reg.rtcen() || reg.rtcsel().0 != clock_config {
14 crate::pac::RCC.bdcr().modify(|w| w.set_bdrst(true));
15
16 crate::pac::RCC.bdcr().modify(|w| {
17 // Reset
18 w.set_bdrst(false);
19
20 // Select RTC source
21 w.set_rtcsel(Rtcsel(clock_config));
22 w.set_rtcen(true);
23
24 // Restore bcdr
25 w.set_lscosel(reg.lscosel());
26 w.set_lscoen(reg.lscoen());
27
28 w.set_lseon(reg.lseon());
29 w.set_lsedrv(reg.lsedrv());
30 w.set_lsebyp(reg.lsebyp());
31 });
32 }
33}
34
35pub(crate) unsafe fn enable_peripheral_clk() {
36 // enable peripheral clock for communication
37 crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true));
38
39 // read to allow the pwr clock to enable
40 crate::pac::PWR.cr1().read();
41}
diff --git a/embassy-stm32/src/rtc/v2/v2h7.rs b/embassy-stm32/src/rtc/v2/v2h7.rs
deleted file mode 100644
index f3b180683..000000000
--- a/embassy-stm32/src/rtc/v2/v2h7.rs
+++ /dev/null
@@ -1,33 +0,0 @@
1use stm32_metapac::rcc::vals::Rtcsel;
2
3pub const BACKUP_REGISTER_COUNT: usize = 20;
4
5/// Unlock the backup domain
6pub(super) unsafe fn unlock_backup_domain(clock_config: u8) {
7 crate::pac::PWR.cr1().modify(|w| w.set_dbp(true));
8 while !crate::pac::PWR.cr1().read().dbp() {}
9
10 let reg = crate::pac::RCC.bdcr().read();
11 assert!(!reg.lsecsson(), "RTC is not compatible with LSE CSS, yet.");
12
13 if !reg.rtcen() || reg.rtcsel().0 != clock_config {
14 crate::pac::RCC.bdcr().modify(|w| w.set_bdrst(true));
15
16 crate::pac::RCC.bdcr().modify(|w| {
17 // Reset
18 w.set_bdrst(false);
19
20 // Select RTC source
21 w.set_rtcsel(Rtcsel(clock_config));
22 w.set_rtcen(true);
23
24 w.set_lseon(reg.lseon());
25 w.set_lsedrv(reg.lsedrv());
26 w.set_lsebyp(reg.lsebyp());
27 });
28 }
29}
30
31pub(crate) unsafe fn enable_peripheral_clk() {
32 // Nothing to do
33}
diff --git a/embassy-stm32/src/rtc/v2/v2l0.rs b/embassy-stm32/src/rtc/v2/v2l0.rs
deleted file mode 100644
index dbd3b0882..000000000
--- a/embassy-stm32/src/rtc/v2/v2l0.rs
+++ /dev/null
@@ -1,26 +0,0 @@
1pub const BACKUP_REGISTER_COUNT: usize = 20;
2
3/// Unlock the backup domain
4pub(super) unsafe fn unlock_backup_domain(clock_config: u8) {
5 // TODO: Missing from PAC?
6 // crate::pac::PWR.cr().modify(|w| w.set_dbp(true));
7 // while !crate::pac::PWR.cr().read().dbp() {}
8
9 let reg = crate::pac::RCC.csr().read();
10
11 if !reg.rtcen() || reg.rtcsel().0 != clock_config {
12 crate::pac::RCC.csr().modify(|w| {
13 // Select RTC source
14 w.set_rtcsel(crate::pac::rcc::vals::Rtcsel(clock_config));
15 w.set_rtcen(true);
16
17 w.set_lseon(reg.lseon());
18 w.set_lsedrv(reg.lsedrv());
19 w.set_lsebyp(reg.lsebyp());
20 });
21 }
22}
23
24pub(crate) unsafe fn enable_peripheral_clk() {
25 // Nothing to do
26}
diff --git a/embassy-stm32/src/rtc/v2/v2l1.rs b/embassy-stm32/src/rtc/v2/v2l1.rs
deleted file mode 100644
index 1ac78b31a..000000000
--- a/embassy-stm32/src/rtc/v2/v2l1.rs
+++ /dev/null
@@ -1,24 +0,0 @@
1pub const BACKUP_REGISTER_COUNT: usize = 20;
2
3/// Unlock the backup domain
4pub(super) unsafe fn unlock_backup_domain(clock_config: u8) {
5 crate::pac::PWR.cr().modify(|w| w.set_dbp(true));
6 while !crate::pac::PWR.cr().read().dbp() {}
7
8 let reg = crate::pac::RCC.csr().read();
9
10 if !reg.rtcen() || reg.rtcsel().0 != clock_config {
11 crate::pac::RCC.csr().modify(|w| {
12 // Select RTC source
13 w.set_rtcsel(crate::pac::rcc::vals::Rtcsel(clock_config));
14 w.set_rtcen(true);
15
16 w.set_lseon(reg.lseon());
17 w.set_lsebyp(reg.lsebyp());
18 });
19 }
20}
21
22pub(crate) unsafe fn enable_peripheral_clk() {
23 // Nothing to do
24}
diff --git a/embassy-stm32/src/rtc/v2/v2l4.rs b/embassy-stm32/src/rtc/v2/v2l4.rs
deleted file mode 100644
index d6871d91e..000000000
--- a/embassy-stm32/src/rtc/v2/v2l4.rs
+++ /dev/null
@@ -1,41 +0,0 @@
1use stm32_metapac::rcc::vals::Rtcsel;
2
3pub const BACKUP_REGISTER_COUNT: usize = 20;
4
5/// Unlock the backup domain
6pub(super) unsafe fn unlock_backup_domain(clock_config: u8) {
7 crate::pac::PWR.cr1().modify(|w| w.set_dbp(true));
8 while !crate::pac::PWR.cr1().read().dbp() {}
9
10 let reg = crate::pac::RCC.bdcr().read();
11 assert!(!reg.lsecsson(), "RTC is not compatible with LSE CSS, yet.");
12
13 if !reg.rtcen() || reg.rtcsel().0 != clock_config {
14 crate::pac::RCC.bdcr().modify(|w| w.set_bdrst(true));
15
16 crate::pac::RCC.bdcr().modify(|w| {
17 // Reset
18 w.set_bdrst(false);
19
20 // Select RTC source
21 w.set_rtcsel(Rtcsel(clock_config));
22 w.set_rtcen(true);
23
24 // Restore bcdr
25 w.set_lscosel(reg.lscosel());
26 w.set_lscoen(reg.lscoen());
27
28 w.set_lseon(reg.lseon());
29 w.set_lsedrv(reg.lsedrv());
30 w.set_lsebyp(reg.lsebyp());
31 });
32 }
33}
34
35pub(crate) unsafe fn enable_peripheral_clk() {
36 // enable peripheral clock for communication
37 crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true));
38
39 // read to allow the pwr clock to enable
40 crate::pac::PWR.cr1().read();
41}
diff --git a/embassy-stm32/src/rtc/v2/v2wb.rs b/embassy-stm32/src/rtc/v2/v2wb.rs
deleted file mode 100644
index 98761fa60..000000000
--- a/embassy-stm32/src/rtc/v2/v2wb.rs
+++ /dev/null
@@ -1,39 +0,0 @@
1pub const BACKUP_REGISTER_COUNT: usize = 20;
2
3/// Unlock the backup domain
4pub(super) unsafe fn unlock_backup_domain(clock_config: u8) {
5 crate::pac::PWR.cr1().modify(|w| w.set_dbp(true));
6 while !crate::pac::PWR.cr1().read().dbp() {}
7
8 let reg = crate::pac::RCC.bdcr().read();
9 assert!(!reg.lsecsson(), "RTC is not compatible with LSE CSS, yet.");
10
11 if !reg.rtcen() || reg.rtcsel() != clock_config {
12 crate::pac::RCC.bdcr().modify(|w| w.set_bdrst(true));
13
14 crate::pac::RCC.bdcr().modify(|w| {
15 // Reset
16 w.set_bdrst(false);
17
18 // Select RTC source
19 w.set_rtcsel(clock_config);
20 w.set_rtcen(true);
21
22 // Restore bcdr
23 w.set_lscosel(reg.lscosel());
24 w.set_lscoen(reg.lscoen());
25
26 w.set_lseon(reg.lseon());
27 w.set_lsedrv(reg.lsedrv());
28 w.set_lsebyp(reg.lsebyp());
29 });
30 }
31}
32
33pub(crate) unsafe fn enable_peripheral_clk() {
34 // enable peripheral clock for communication
35 crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true));
36
37 // read to allow the pwr clock to enable
38 crate::pac::PWR.cr1().read();
39}
diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml
index 69dcab64c..275c2c1a7 100644
--- a/examples/stm32f4/Cargo.toml
+++ b/examples/stm32f4/Cargo.toml
@@ -26,6 +26,7 @@ nb = "1.0.0"
26embedded-storage = "0.3.0" 26embedded-storage = "0.3.0"
27micromath = "2.0.0" 27micromath = "2.0.0"
28static_cell = "1.0" 28static_cell = "1.0"
29chrono = { version = "^0.4", default-features = false}
29 30
30[profile.release] 31[profile.release]
31debug = 2 32debug = 2
diff --git a/examples/stm32f4/src/bin/rtc.rs b/examples/stm32f4/src/bin/rtc.rs
new file mode 100644
index 000000000..0eca58203
--- /dev/null
+++ b/examples/stm32f4/src/bin/rtc.rs
@@ -0,0 +1,30 @@
1#![no_std]
2#![no_main]
3#![feature(type_alias_impl_trait)]
4
5use chrono::{NaiveDate, NaiveDateTime};
6use defmt::*;
7use embassy_executor::Spawner;
8use embassy_stm32::rtc::{Rtc, RtcConfig};
9use embassy_time::{Duration, Timer};
10use {defmt_rtt as _, panic_probe as _};
11
12#[embassy_executor::main]
13async fn main(_spawner: Spawner) {
14 let p = embassy_stm32::init(Default::default());
15 info!("Hello World!");
16
17 let now = NaiveDate::from_ymd_opt(2020, 5, 15)
18 .unwrap()
19 .and_hms_opt(10, 30, 15)
20 .unwrap();
21
22 let mut rtc = Rtc::new(p.RTC, RtcConfig::default());
23
24 rtc.set_datetime(now.into()).expect("datetime not set");
25
26 // In reality the delay would be much longer
27 Timer::after(Duration::from_millis(20000)).await;
28
29 let _then: NaiveDateTime = rtc.now().unwrap().into();
30}