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authorpbert <[email protected]>2023-10-11 18:06:43 +0200
committerpbert <[email protected]>2023-10-12 11:04:19 +0200
commitf65a96c54146179f76a7a2a784c5bb89590e5de1 (patch)
tree21b20805229d639f16f035a64f94cb896a636cd0
parenteb368f77a46682f76dcc4d75f9ba4ce80dfb4193 (diff)
STM32: combine RccPeripherals reset() and enable() to reset_and_enable()
-rw-r--r--embassy-stm32/build.rs4
-rw-r--r--embassy-stm32/src/adc/f1.rs3
-rw-r--r--embassy-stm32/src/adc/f3.rs3
-rw-r--r--embassy-stm32/src/adc/v1.rs3
-rw-r--r--embassy-stm32/src/adc/v2.rs3
-rw-r--r--embassy-stm32/src/adc/v4.rs3
-rw-r--r--embassy-stm32/src/can/bxcan.rs3
-rw-r--r--embassy-stm32/src/crc/v1.rs4
-rw-r--r--embassy-stm32/src/crc/v2v3.rs7
-rw-r--r--embassy-stm32/src/dac/mod.rs62
-rw-r--r--embassy-stm32/src/dcmi.rs3
-rw-r--r--embassy-stm32/src/fmc.rs3
-rw-r--r--embassy-stm32/src/gpio.rs2
-rw-r--r--embassy-stm32/src/hrtim/mod.rs3
-rw-r--r--embassy-stm32/src/i2c/v1.rs3
-rw-r--r--embassy-stm32/src/i2c/v2.rs3
-rw-r--r--embassy-stm32/src/ipcc.rs3
-rw-r--r--embassy-stm32/src/lib.rs6
-rw-r--r--embassy-stm32/src/qspi/mod.rs3
-rw-r--r--embassy-stm32/src/rcc/g4.rs2
-rw-r--r--embassy-stm32/src/rcc/mod.rs3
-rw-r--r--embassy-stm32/src/rng.rs3
-rw-r--r--embassy-stm32/src/rtc/mod.rs2
-rw-r--r--embassy-stm32/src/sai/mod.rs54
-rw-r--r--embassy-stm32/src/sdmmc/mod.rs3
-rw-r--r--embassy-stm32/src/spi/mod.rs3
-rw-r--r--embassy-stm32/src/time_driver.rs3
-rw-r--r--embassy-stm32/src/timer/complementary_pwm.rs3
-rw-r--r--embassy-stm32/src/timer/qei.rs3
-rw-r--r--embassy-stm32/src/timer/simple_pwm.rs3
-rw-r--r--embassy-stm32/src/usart/buffered.rs15
-rw-r--r--embassy-stm32/src/usart/mod.rs27
-rw-r--r--embassy-stm32/src/usb/usb.rs3
-rw-r--r--embassy-stm32/src/usb_otg/usb.rs3
-rw-r--r--examples/stm32h7/src/bin/dac_dma.rs4
-rw-r--r--examples/stm32h7/src/bin/low_level_timer_api.rs3
-rw-r--r--examples/stm32l4/src/bin/dac_dma.rs4
37 files changed, 108 insertions, 157 deletions
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs
index 5b6b22ea1..719a52d1d 100644
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@@ -559,6 +559,7 @@ fn main() {
559 fn enable() { 559 fn enable() {
560 critical_section::with(|_cs| { 560 critical_section::with(|_cs| {
561 #before_enable 561 #before_enable
562 #rst
562 #[cfg(feature = "low-power")] 563 #[cfg(feature = "low-power")]
563 crate::rcc::clock_refcount_add(_cs); 564 crate::rcc::clock_refcount_add(_cs);
564 crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true)); 565 crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true));
@@ -573,9 +574,6 @@ fn main() {
573 crate::rcc::clock_refcount_sub(_cs); 574 crate::rcc::clock_refcount_sub(_cs);
574 }) 575 })
575 } 576 }
576 fn reset() {
577 #rst
578 }
579 } 577 }
580 578
581 impl crate::rcc::RccPeripheral for peripherals::#pname {} 579 impl crate::rcc::RccPeripheral for peripherals::#pname {}
diff --git a/embassy-stm32/src/adc/f1.rs b/embassy-stm32/src/adc/f1.rs
index c13264819..5f5bf4bfa 100644
--- a/embassy-stm32/src/adc/f1.rs
+++ b/embassy-stm32/src/adc/f1.rs
@@ -51,8 +51,7 @@ impl<T: Instance> super::sealed::AdcPin<T> for Temperature {
51impl<'d, T: Instance> Adc<'d, T> { 51impl<'d, T: Instance> Adc<'d, T> {
52 pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u32>) -> Self { 52 pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u32>) -> Self {
53 into_ref!(adc); 53 into_ref!(adc);
54 T::enable(); 54 T::reset_and_enable();
55 T::reset();
56 T::regs().cr2().modify(|reg| reg.set_adon(true)); 55 T::regs().cr2().modify(|reg| reg.set_adon(true));
57 56
58 // 11.4: Before starting a calibration, the ADC must have been in power-on state (ADON bit = ‘1’) 57 // 11.4: Before starting a calibration, the ADC must have been in power-on state (ADON bit = ‘1’)
diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs
index 7c13f8106..e94f61413 100644
--- a/embassy-stm32/src/adc/f3.rs
+++ b/embassy-stm32/src/adc/f3.rs
@@ -64,8 +64,7 @@ impl<'d, T: Instance> Adc<'d, T> {
64 64
65 into_ref!(adc); 65 into_ref!(adc);
66 66
67 T::enable(); 67 T::reset_and_enable();
68 T::reset();
69 68
70 // Enable the adc regulator 69 // Enable the adc regulator
71 T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::INTERMEDIATE)); 70 T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::INTERMEDIATE));
diff --git a/embassy-stm32/src/adc/v1.rs b/embassy-stm32/src/adc/v1.rs
index fded26e40..f03acdcf4 100644
--- a/embassy-stm32/src/adc/v1.rs
+++ b/embassy-stm32/src/adc/v1.rs
@@ -61,8 +61,7 @@ impl<'d, T: Instance> Adc<'d, T> {
61 delay: &mut impl DelayUs<u32>, 61 delay: &mut impl DelayUs<u32>,
62 ) -> Self { 62 ) -> Self {
63 into_ref!(adc); 63 into_ref!(adc);
64 T::enable(); 64 T::reset_and_enable();
65 T::reset();
66 65
67 // Delay 1μs when using HSI14 as the ADC clock. 66 // Delay 1μs when using HSI14 as the ADC clock.
68 // 67 //
diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs
index a669013c9..89e7616bc 100644
--- a/embassy-stm32/src/adc/v2.rs
+++ b/embassy-stm32/src/adc/v2.rs
@@ -95,8 +95,7 @@ where
95{ 95{
96 pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u32>) -> Self { 96 pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u32>) -> Self {
97 into_ref!(adc); 97 into_ref!(adc);
98 T::enable(); 98 T::reset_and_enable();
99 T::reset();
100 99
101 let presc = Prescaler::from_pclk2(T::frequency()); 100 let presc = Prescaler::from_pclk2(T::frequency());
102 T::common_regs().ccr().modify(|w| w.set_adcpre(presc.adcpre())); 101 T::common_regs().ccr().modify(|w| w.set_adcpre(presc.adcpre()));
diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs
index 655c0cb6a..6d86e5cdf 100644
--- a/embassy-stm32/src/adc/v4.rs
+++ b/embassy-stm32/src/adc/v4.rs
@@ -127,8 +127,7 @@ impl Prescaler {
127impl<'d, T: Instance> Adc<'d, T> { 127impl<'d, T: Instance> Adc<'d, T> {
128 pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u16>) -> Self { 128 pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u16>) -> Self {
129 embassy_hal_internal::into_ref!(adc); 129 embassy_hal_internal::into_ref!(adc);
130 T::enable(); 130 T::reset_and_enable();
131 T::reset();
132 131
133 let prescaler = Prescaler::from_ker_ck(T::frequency()); 132 let prescaler = Prescaler::from_ker_ck(T::frequency());
134 133
diff --git a/embassy-stm32/src/can/bxcan.rs b/embassy-stm32/src/can/bxcan.rs
index 7ad13cece..903f7e48b 100644
--- a/embassy-stm32/src/can/bxcan.rs
+++ b/embassy-stm32/src/can/bxcan.rs
@@ -136,8 +136,7 @@ impl<'d, T: Instance> Can<'d, T> {
136 rx.set_as_af(rx.af_num(), AFType::Input); 136 rx.set_as_af(rx.af_num(), AFType::Input);
137 tx.set_as_af(tx.af_num(), AFType::OutputPushPull); 137 tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
138 138
139 T::enable(); 139 T::reset_and_enable();
140 T::reset();
141 140
142 { 141 {
143 use crate::pac::can::vals::{Errie, Fmpie, Tmeie}; 142 use crate::pac::can::vals::{Errie, Fmpie, Tmeie};
diff --git a/embassy-stm32/src/crc/v1.rs b/embassy-stm32/src/crc/v1.rs
index 154f2eb91..282e1ad88 100644
--- a/embassy-stm32/src/crc/v1.rs
+++ b/embassy-stm32/src/crc/v1.rs
@@ -16,9 +16,7 @@ impl<'d> Crc<'d> {
16 16
17 // Note: enable and reset come from RccPeripheral. 17 // Note: enable and reset come from RccPeripheral.
18 // enable CRC clock in RCC. 18 // enable CRC clock in RCC.
19 CRC::enable(); 19 CRC::reset_and_enable();
20 // Reset CRC to default values.
21 CRC::reset();
22 // Peripheral the peripheral 20 // Peripheral the peripheral
23 let mut instance = Self { _peri: peripheral }; 21 let mut instance = Self { _peri: peripheral };
24 instance.reset(); 22 instance.reset();
diff --git a/embassy-stm32/src/crc/v2v3.rs b/embassy-stm32/src/crc/v2v3.rs
index de0c08755..2ab25e6fb 100644
--- a/embassy-stm32/src/crc/v2v3.rs
+++ b/embassy-stm32/src/crc/v2v3.rs
@@ -69,16 +69,13 @@ impl<'d> Crc<'d> {
69 /// Instantiates the CRC32 peripheral and initializes it to default values. 69 /// Instantiates the CRC32 peripheral and initializes it to default values.
70 pub fn new(peripheral: impl Peripheral<P = CRC> + 'd, config: Config) -> Self { 70 pub fn new(peripheral: impl Peripheral<P = CRC> + 'd, config: Config) -> Self {
71 // Note: enable and reset come from RccPeripheral. 71 // Note: enable and reset come from RccPeripheral.
72 // enable CRC clock in RCC. 72 // reset to default values and enable CRC clock in RCC.
73 CRC::enable(); 73 CRC::reset_and_enable();
74 // Reset CRC to default values.
75 CRC::reset();
76 into_ref!(peripheral); 74 into_ref!(peripheral);
77 let mut instance = Self { 75 let mut instance = Self {
78 _peripheral: peripheral, 76 _peripheral: peripheral,
79 _config: config, 77 _config: config,
80 }; 78 };
81 CRC::reset();
82 instance.reconfigure(); 79 instance.reconfigure();
83 instance.reset(); 80 instance.reset();
84 instance 81 instance
diff --git a/embassy-stm32/src/dac/mod.rs b/embassy-stm32/src/dac/mod.rs
index 36f6612b2..e93fca954 100644
--- a/embassy-stm32/src/dac/mod.rs
+++ b/embassy-stm32/src/dac/mod.rs
@@ -255,8 +255,7 @@ impl<'d, T: Instance, Tx> DacCh1<'d, T, Tx> {
255 ) -> Self { 255 ) -> Self {
256 pin.set_as_analog(); 256 pin.set_as_analog();
257 into_ref!(peri, dma); 257 into_ref!(peri, dma);
258 T::enable(); 258 T::reset_and_enable();
259 T::reset();
260 259
261 let mut dac = Self { _peri: peri, dma }; 260 let mut dac = Self { _peri: peri, dma };
262 261
@@ -366,8 +365,7 @@ impl<'d, T: Instance, Tx> DacCh2<'d, T, Tx> {
366 ) -> Self { 365 ) -> Self {
367 pin.set_as_analog(); 366 pin.set_as_analog();
368 into_ref!(_peri, dma); 367 into_ref!(_peri, dma);
369 T::enable(); 368 T::reset_and_enable();
370 T::reset();
371 369
372 let mut dac = Self { 370 let mut dac = Self {
373 phantom: PhantomData, 371 phantom: PhantomData,
@@ -483,8 +481,7 @@ impl<'d, T: Instance, TxCh1, TxCh2> Dac<'d, T, TxCh1, TxCh2> {
483 pin_ch1.set_as_analog(); 481 pin_ch1.set_as_analog();
484 pin_ch2.set_as_analog(); 482 pin_ch2.set_as_analog();
485 into_ref!(peri, dma_ch1, dma_ch2); 483 into_ref!(peri, dma_ch1, dma_ch2);
486 T::enable(); 484 T::reset_and_enable();
487 T::reset();
488 485
489 let mut dac_ch1 = DacCh1 { 486 let mut dac_ch1 = DacCh1 {
490 _peri: peri, 487 _peri: peri,
@@ -563,35 +560,30 @@ pub trait DacPin<T: Instance, const C: u8>: crate::gpio::Pin + 'static {}
563 560
564foreach_peripheral!( 561foreach_peripheral!(
565 (dac, $inst:ident) => { 562 (dac, $inst:ident) => {
566 // H7 uses single bit for both DAC1 and DAC2, this is a hack until a proper fix is implemented 563 // H7 uses single bit for both DAC1 and DAC2, this is a hack until a proper fix is implemented
567 #[cfg(any(rcc_h7, rcc_h7rm0433))] 564 #[cfg(any(rcc_h7, rcc_h7rm0433))]
568 impl crate::rcc::sealed::RccPeripheral for peripherals::$inst { 565 impl crate::rcc::sealed::RccPeripheral for peripherals::$inst {
569 fn frequency() -> crate::time::Hertz { 566 fn frequency() -> crate::time::Hertz {
570 critical_section::with(|_| unsafe { crate::rcc::get_freqs().apb1 }) 567 critical_section::with(|_| unsafe { crate::rcc::get_freqs().apb1 })
571 } 568 }
572 569
573 fn reset() { 570 fn reset_and_enable() {
574 critical_section::with(|_| { 571 critical_section::with(|_| {
575 crate::pac::RCC.apb1lrstr().modify(|w| w.set_dac12rst(true)); 572 crate::pac::RCC.apb1lrstr().modify(|w| w.set_dac12rst(true));
576 crate::pac::RCC.apb1lrstr().modify(|w| w.set_dac12rst(false)); 573 crate::pac::RCC.apb1lrstr().modify(|w| w.set_dac12rst(false));
577 }) 574 crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(true));
578 } 575 })
579 576 }
580 fn enable() { 577
581 critical_section::with(|_| { 578 fn disable() {
582 crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(true)); 579 critical_section::with(|_| {
583 }) 580 crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(false))
584 } 581 })
585 582 }
586 fn disable() { 583 }
587 critical_section::with(|_| { 584
588 crate::pac::RCC.apb1lenr().modify(|w| w.set_dac12en(false)) 585 #[cfg(any(rcc_h7, rcc_h7rm0433))]
589 }) 586 impl crate::rcc::RccPeripheral for peripherals::$inst {}
590 }
591 }
592
593 #[cfg(any(rcc_h7, rcc_h7rm0433))]
594 impl crate::rcc::RccPeripheral for peripherals::$inst {}
595 587
596 impl crate::dac::sealed::Instance for peripherals::$inst { 588 impl crate::dac::sealed::Instance for peripherals::$inst {
597 fn regs() -> &'static crate::pac::dac::Dac { 589 fn regs() -> &'static crate::pac::dac::Dac {
diff --git a/embassy-stm32/src/dcmi.rs b/embassy-stm32/src/dcmi.rs
index 7497f4aaa..6a63e6ee5 100644
--- a/embassy-stm32/src/dcmi.rs
+++ b/embassy-stm32/src/dcmi.rs
@@ -330,8 +330,7 @@ where
330 use_embedded_synchronization: bool, 330 use_embedded_synchronization: bool,
331 edm: u8, 331 edm: u8,
332 ) -> Self { 332 ) -> Self {
333 T::reset(); 333 T::reset_and_enable();
334 T::enable();
335 334
336 peri.regs().cr().modify(|r| { 335 peri.regs().cr().modify(|r| {
337 r.set_cm(true); // disable continuous mode (snapshot mode) 336 r.set_cm(true); // disable continuous mode (snapshot mode)
diff --git a/embassy-stm32/src/fmc.rs b/embassy-stm32/src/fmc.rs
index 177e66a91..51c75aeb3 100644
--- a/embassy-stm32/src/fmc.rs
+++ b/embassy-stm32/src/fmc.rs
@@ -19,8 +19,7 @@ where
19 const REGISTERS: *const () = T::REGS.as_ptr() as *const _; 19 const REGISTERS: *const () = T::REGS.as_ptr() as *const _;
20 20
21 fn enable(&mut self) { 21 fn enable(&mut self) {
22 <T as crate::rcc::sealed::RccPeripheral>::enable(); 22 T::reset_and_enable();
23 <T as crate::rcc::sealed::RccPeripheral>::reset();
24 } 23 }
25 24
26 fn memory_controller_enable(&mut self) { 25 fn memory_controller_enable(&mut self) {
diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs
index 58d17f12e..9192f731f 100644
--- a/embassy-stm32/src/gpio.rs
+++ b/embassy-stm32/src/gpio.rs
@@ -759,7 +759,7 @@ foreach_pin!(
759 759
760pub(crate) unsafe fn init() { 760pub(crate) unsafe fn init() {
761 #[cfg(afio)] 761 #[cfg(afio)]
762 <crate::peripherals::AFIO as crate::rcc::sealed::RccPeripheral>::enable(); 762 <crate::peripherals::AFIO as crate::rcc::sealed::RccPeripheral>::reset_and_enable();
763 763
764 crate::_generated::init_gpio(); 764 crate::_generated::init_gpio();
765} 765}
diff --git a/embassy-stm32/src/hrtim/mod.rs b/embassy-stm32/src/hrtim/mod.rs
index c47b0c092..0c730ef7e 100644
--- a/embassy-stm32/src/hrtim/mod.rs
+++ b/embassy-stm32/src/hrtim/mod.rs
@@ -157,8 +157,7 @@ impl<'d, T: Instance> AdvancedPwm<'d, T> {
157 fn new_inner(tim: impl Peripheral<P = T> + 'd) -> Self { 157 fn new_inner(tim: impl Peripheral<P = T> + 'd) -> Self {
158 into_ref!(tim); 158 into_ref!(tim);
159 159
160 T::enable(); 160 T::reset_and_enable();
161 <T as crate::rcc::sealed::RccPeripheral>::reset();
162 161
163 #[cfg(stm32f334)] 162 #[cfg(stm32f334)]
164 if unsafe { get_freqs() }.hrtim.is_some() { 163 if unsafe { get_freqs() }.hrtim.is_some() {
diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs
index 0d2bfc068..cc2b23a7f 100644
--- a/embassy-stm32/src/i2c/v1.rs
+++ b/embassy-stm32/src/i2c/v1.rs
@@ -56,8 +56,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
56 ) -> Self { 56 ) -> Self {
57 into_ref!(scl, sda, tx_dma, rx_dma); 57 into_ref!(scl, sda, tx_dma, rx_dma);
58 58
59 T::enable(); 59 T::reset_and_enable();
60 T::reset();
61 60
62 scl.set_as_af_pull( 61 scl.set_as_af_pull(
63 scl.af_num(), 62 scl.af_num(),
diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
index 543d8f1b4..1a49ecb24 100644
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@@ -86,8 +86,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
86 ) -> Self { 86 ) -> Self {
87 into_ref!(peri, scl, sda, tx_dma, rx_dma); 87 into_ref!(peri, scl, sda, tx_dma, rx_dma);
88 88
89 T::enable(); 89 T::reset_and_enable();
90 T::reset();
91 90
92 scl.set_as_af_pull( 91 scl.set_as_af_pull(
93 scl.af_num(), 92 scl.af_num(),
diff --git a/embassy-stm32/src/ipcc.rs b/embassy-stm32/src/ipcc.rs
index e100ca5cc..2e58fe622 100644
--- a/embassy-stm32/src/ipcc.rs
+++ b/embassy-stm32/src/ipcc.rs
@@ -93,8 +93,7 @@ pub struct Ipcc;
93 93
94impl Ipcc { 94impl Ipcc {
95 pub fn enable(_config: Config) { 95 pub fn enable(_config: Config) {
96 IPCC::enable(); 96 IPCC::reset_and_enable();
97 IPCC::reset();
98 IPCC::set_cpu2(true); 97 IPCC::set_cpu2(true);
99 98
100 _configure_pwr(); 99 _configure_pwr();
diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs
index 37c94f827..438494223 100644
--- a/embassy-stm32/src/lib.rs
+++ b/embassy-stm32/src/lib.rs
@@ -186,11 +186,11 @@ pub fn init(config: Config) -> Peripherals {
186 } 186 }
187 187
188 #[cfg(not(any(stm32f1, stm32wb, stm32wl)))] 188 #[cfg(not(any(stm32f1, stm32wb, stm32wl)))]
189 peripherals::SYSCFG::enable(); 189 peripherals::SYSCFG::reset_and_enable();
190 #[cfg(not(any(stm32h5, stm32h7, stm32wb, stm32wl)))] 190 #[cfg(not(any(stm32h5, stm32h7, stm32wb, stm32wl)))]
191 peripherals::PWR::enable(); 191 peripherals::PWR::reset_and_enable();
192 #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7)))] 192 #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7)))]
193 peripherals::FLASH::enable(); 193 peripherals::FLASH::reset_and_enable();
194 194
195 unsafe { 195 unsafe {
196 #[cfg(feature = "_split-pins-enabled")] 196 #[cfg(feature = "_split-pins-enabled")]
diff --git a/embassy-stm32/src/qspi/mod.rs b/embassy-stm32/src/qspi/mod.rs
index 8fb7df646..1c8bcbae9 100644
--- a/embassy-stm32/src/qspi/mod.rs
+++ b/embassy-stm32/src/qspi/mod.rs
@@ -177,8 +177,7 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> {
177 ) -> Self { 177 ) -> Self {
178 into_ref!(peri, dma); 178 into_ref!(peri, dma);
179 179
180 T::enable(); 180 T::reset_and_enable();
181 T::reset();
182 181
183 while T::REGS.sr().read().busy() {} 182 while T::REGS.sr().read().busy() {}
184 183
diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs
index a4078e38b..1b6b5e85e 100644
--- a/embassy-stm32/src/rcc/g4.rs
+++ b/embassy-stm32/src/rcc/g4.rs
@@ -296,7 +296,7 @@ pub(crate) unsafe fn init(config: Config) {
296 296
297 // Enable and setup CRS if needed 297 // Enable and setup CRS if needed
298 if let Some(crs_config) = crs_config { 298 if let Some(crs_config) = crs_config {
299 crate::peripherals::CRS::enable(); 299 crate::peripherals::CRS::reset_and_enable();
300 300
301 let sync_src = match crs_config.sync_src { 301 let sync_src = match crs_config.sync_src {
302 CrsSyncSource::Gpio => crate::pac::crs::vals::Syncsrc::GPIO, 302 CrsSyncSource::Gpio => crate::pac::crs::vals::Syncsrc::GPIO,
diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs
index 695d41589..451e12fec 100644
--- a/embassy-stm32/src/rcc/mod.rs
+++ b/embassy-stm32/src/rcc/mod.rs
@@ -231,8 +231,7 @@ pub mod low_level {
231pub(crate) mod sealed { 231pub(crate) mod sealed {
232 pub trait RccPeripheral { 232 pub trait RccPeripheral {
233 fn frequency() -> crate::time::Hertz; 233 fn frequency() -> crate::time::Hertz;
234 fn reset(); 234 fn reset_and_enable();
235 fn enable();
236 fn disable(); 235 fn disable();
237 } 236 }
238} 237}
diff --git a/embassy-stm32/src/rng.rs b/embassy-stm32/src/rng.rs
index 2d7ffc620..0a3b966b6 100644
--- a/embassy-stm32/src/rng.rs
+++ b/embassy-stm32/src/rng.rs
@@ -43,8 +43,7 @@ impl<'d, T: Instance> Rng<'d, T> {
43 inner: impl Peripheral<P = T> + 'd, 43 inner: impl Peripheral<P = T> + 'd,
44 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 44 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
45 ) -> Self { 45 ) -> Self {
46 T::enable(); 46 T::reset_and_enable();
47 T::reset();
48 into_ref!(inner); 47 into_ref!(inner);
49 let mut random = Self { _inner: inner }; 48 let mut random = Self { _inner: inner };
50 random.reset(); 49 random.reset();
diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs
index cf34d2191..2eb0cde14 100644
--- a/embassy-stm32/src/rtc/mod.rs
+++ b/embassy-stm32/src/rtc/mod.rs
@@ -184,7 +184,7 @@ impl Default for RtcCalibrationCyclePeriod {
184impl Rtc { 184impl Rtc {
185 pub fn new(_rtc: impl Peripheral<P = RTC>, rtc_config: RtcConfig) -> Self { 185 pub fn new(_rtc: impl Peripheral<P = RTC>, rtc_config: RtcConfig) -> Self {
186 #[cfg(not(any(stm32l0, stm32f3, stm32l1, stm32f0, stm32f2)))] 186 #[cfg(not(any(stm32l0, stm32f3, stm32l1, stm32f0, stm32f2)))]
187 <RTC as crate::rcc::sealed::RccPeripheral>::enable(); 187 <RTC as crate::rcc::sealed::RccPeripheral>::reset_and_enable();
188 188
189 let mut this = Self { 189 let mut this = Self {
190 #[cfg(feature = "low-power")] 190 #[cfg(feature = "low-power")]
diff --git a/embassy-stm32/src/sai/mod.rs b/embassy-stm32/src/sai/mod.rs
index 4c3604e50..a394ba717 100644
--- a/embassy-stm32/src/sai/mod.rs
+++ b/embassy-stm32/src/sai/mod.rs
@@ -531,10 +531,13 @@ pub struct SubBlock<'d, T: Instance, C: Channel, W: word::Word> {
531pub struct SubBlockA {} 531pub struct SubBlockA {}
532pub struct SubBlockB {} 532pub struct SubBlockB {}
533 533
534pub struct SubBlockAPeripheral<'d, T>(PeripheralRef<'d, T>);
535pub struct SubBlockBPeripheral<'d, T>(PeripheralRef<'d, T>);
536
534pub struct Sai<'d, T: Instance> { 537pub struct Sai<'d, T: Instance> {
535 _peri: PeripheralRef<'d, T>, 538 _peri: PeripheralRef<'d, T>,
536 sub_block_a_peri: Option<PeripheralRef<'d, T>>, 539 sub_block_a_peri: Option<SubBlockAPeripheral<'d, T>>,
537 sub_block_b_peri: Option<PeripheralRef<'d, T>>, 540 sub_block_b_peri: Option<SubBlockBPeripheral<'d, T>>,
538} 541}
539 542
540// return the type for (sd, sck) 543// return the type for (sd, sck)
@@ -577,17 +580,16 @@ fn get_ring_buffer<'d, T: Instance, C: Channel, W: word::Word>(
577 580
578impl<'d, T: Instance> Sai<'d, T> { 581impl<'d, T: Instance> Sai<'d, T> {
579 pub fn new(peri: impl Peripheral<P = T> + 'd) -> Self { 582 pub fn new(peri: impl Peripheral<P = T> + 'd) -> Self {
580 T::enable(); 583 T::reset_and_enable();
581 T::reset();
582 584
583 Self { 585 Self {
584 _peri: unsafe { peri.clone_unchecked().into_ref() }, 586 _peri: unsafe { peri.clone_unchecked().into_ref() },
585 sub_block_a_peri: Some(unsafe { peri.clone_unchecked().into_ref() }), 587 sub_block_a_peri: Some(SubBlockAPeripheral(unsafe { peri.clone_unchecked().into_ref() })),
586 sub_block_b_peri: Some(peri.into_ref()), 588 sub_block_b_peri: Some(SubBlockBPeripheral(peri.into_ref())),
587 } 589 }
588 } 590 }
589 591
590 pub fn take_sub_block_a(self: &mut Self) -> Option<PeripheralRef<'d, T>> { 592 pub fn take_sub_block_a(self: &mut Self) -> Option<SubBlockAPeripheral<'d, T>> {
591 if self.sub_block_a_peri.is_some() { 593 if self.sub_block_a_peri.is_some() {
592 self.sub_block_a_peri.take() 594 self.sub_block_a_peri.take()
593 } else { 595 } else {
@@ -595,7 +597,7 @@ impl<'d, T: Instance> Sai<'d, T> {
595 } 597 }
596 } 598 }
597 599
598 pub fn take_sub_block_b(self: &mut Self) -> Option<PeripheralRef<'d, T>> { 600 pub fn take_sub_block_b(self: &mut Self) -> Option<SubBlockBPeripheral<'d, T>> {
599 if self.sub_block_b_peri.is_some() { 601 if self.sub_block_b_peri.is_some() {
600 self.sub_block_b_peri.take() 602 self.sub_block_b_peri.take()
601 } else { 603 } else {
@@ -623,7 +625,7 @@ fn update_synchronous_config(config: &mut Config) {
623 625
624impl SubBlockA { 626impl SubBlockA {
625 pub fn new_asynchronous_with_mclk<'d, T: Instance, C: Channel, W: word::Word>( 627 pub fn new_asynchronous_with_mclk<'d, T: Instance, C: Channel, W: word::Word>(
626 peri: impl Peripheral<P = T> + 'd, 628 peri: SubBlockAPeripheral<'d, T>,
627 sck: impl Peripheral<P = impl SckAPin<T>> + 'd, 629 sck: impl Peripheral<P = impl SckAPin<T>> + 'd,
628 sd: impl Peripheral<P = impl SdAPin<T>> + 'd, 630 sd: impl Peripheral<P = impl SdAPin<T>> + 'd,
629 fs: impl Peripheral<P = impl FsAPin<T>> + 'd, 631 fs: impl Peripheral<P = impl FsAPin<T>> + 'd,
@@ -631,7 +633,7 @@ impl SubBlockA {
631 dma: impl Peripheral<P = C> + 'd, 633 dma: impl Peripheral<P = C> + 'd,
632 dma_buf: &'d mut [W], 634 dma_buf: &'d mut [W],
633 mut config: Config, 635 mut config: Config,
634 ) -> SubBlock<T, C, W> 636 ) -> SubBlock<'d, T, C, W>
635 where 637 where
636 C: Channel + DmaA<T>, 638 C: Channel + DmaA<T>,
637 { 639 {
@@ -650,17 +652,18 @@ impl SubBlockA {
650 } 652 }
651 653
652 pub fn new_asynchronous<'d, T: Instance, C: Channel, W: word::Word>( 654 pub fn new_asynchronous<'d, T: Instance, C: Channel, W: word::Word>(
653 peri: impl Peripheral<P = T> + 'd, 655 peri: SubBlockAPeripheral<'d, T>,
654 sck: impl Peripheral<P = impl SckAPin<T>> + 'd, 656 sck: impl Peripheral<P = impl SckAPin<T>> + 'd,
655 sd: impl Peripheral<P = impl SdAPin<T>> + 'd, 657 sd: impl Peripheral<P = impl SdAPin<T>> + 'd,
656 fs: impl Peripheral<P = impl FsAPin<T>> + 'd, 658 fs: impl Peripheral<P = impl FsAPin<T>> + 'd,
657 dma: impl Peripheral<P = C> + 'd, 659 dma: impl Peripheral<P = C> + 'd,
658 dma_buf: &'d mut [W], 660 dma_buf: &'d mut [W],
659 config: Config, 661 config: Config,
660 ) -> SubBlock<T, C, W> 662 ) -> SubBlock<'d, T, C, W>
661 where 663 where
662 C: Channel + DmaA<T>, 664 C: Channel + DmaA<T>,
663 { 665 {
666 let peri = peri.0;
664 into_ref!(peri, dma, sck, sd, fs); 667 into_ref!(peri, dma, sck, sd, fs);
665 668
666 let (sd_af_type, ck_af_type) = get_af_types(config.mode, config.tx_rx); 669 let (sd_af_type, ck_af_type) = get_af_types(config.mode, config.tx_rx);
@@ -688,17 +691,18 @@ impl SubBlockA {
688 } 691 }
689 692
690 pub fn new_synchronous<'d, T: Instance, C: Channel, W: word::Word>( 693 pub fn new_synchronous<'d, T: Instance, C: Channel, W: word::Word>(
691 peri: impl Peripheral<P = T> + 'd, 694 peri: SubBlockAPeripheral<'d, T>,
692 sd: impl Peripheral<P = impl SdAPin<T>> + 'd, 695 sd: impl Peripheral<P = impl SdAPin<T>> + 'd,
693 dma: impl Peripheral<P = C> + 'd, 696 dma: impl Peripheral<P = C> + 'd,
694 dma_buf: &'d mut [W], 697 dma_buf: &'d mut [W],
695 mut config: Config, 698 mut config: Config,
696 ) -> SubBlock<T, C, W> 699 ) -> SubBlock<'d, T, C, W>
697 where 700 where
698 C: Channel + DmaA<T>, 701 C: Channel + DmaA<T>,
699 { 702 {
700 update_synchronous_config(&mut config); 703 update_synchronous_config(&mut config);
701 704
705 let peri = peri.0;
702 into_ref!(dma, peri, sd); 706 into_ref!(dma, peri, sd);
703 707
704 let (sd_af_type, _ck_af_type) = get_af_types(config.mode, config.tx_rx); 708 let (sd_af_type, _ck_af_type) = get_af_types(config.mode, config.tx_rx);
@@ -724,7 +728,7 @@ impl SubBlockA {
724 728
725impl SubBlockB { 729impl SubBlockB {
726 pub fn new_asynchronous_with_mclk<'d, T: Instance, C: Channel, W: word::Word>( 730 pub fn new_asynchronous_with_mclk<'d, T: Instance, C: Channel, W: word::Word>(
727 peri: impl Peripheral<P = T> + 'd, 731 peri: SubBlockBPeripheral<'d, T>,
728 sck: impl Peripheral<P = impl SckBPin<T>> + 'd, 732 sck: impl Peripheral<P = impl SckBPin<T>> + 'd,
729 sd: impl Peripheral<P = impl SdBPin<T>> + 'd, 733 sd: impl Peripheral<P = impl SdBPin<T>> + 'd,
730 fs: impl Peripheral<P = impl FsBPin<T>> + 'd, 734 fs: impl Peripheral<P = impl FsBPin<T>> + 'd,
@@ -732,7 +736,7 @@ impl SubBlockB {
732 dma: impl Peripheral<P = C> + 'd, 736 dma: impl Peripheral<P = C> + 'd,
733 dma_buf: &'d mut [W], 737 dma_buf: &'d mut [W],
734 mut config: Config, 738 mut config: Config,
735 ) -> SubBlock<T, C, W> 739 ) -> SubBlock<'d, T, C, W>
736 where 740 where
737 C: Channel + DmaB<T>, 741 C: Channel + DmaB<T>,
738 { 742 {
@@ -751,17 +755,18 @@ impl SubBlockB {
751 } 755 }
752 756
753 pub fn new_asynchronous<'d, T: Instance, C: Channel, W: word::Word>( 757 pub fn new_asynchronous<'d, T: Instance, C: Channel, W: word::Word>(
754 peri: impl Peripheral<P = T> + 'd, 758 peri: SubBlockBPeripheral<'d, T>,
755 sck: impl Peripheral<P = impl SckBPin<T>> + 'd, 759 sck: impl Peripheral<P = impl SckBPin<T>> + 'd,
756 sd: impl Peripheral<P = impl SdBPin<T>> + 'd, 760 sd: impl Peripheral<P = impl SdBPin<T>> + 'd,
757 fs: impl Peripheral<P = impl FsBPin<T>> + 'd, 761 fs: impl Peripheral<P = impl FsBPin<T>> + 'd,
758 dma: impl Peripheral<P = C> + 'd, 762 dma: impl Peripheral<P = C> + 'd,
759 dma_buf: &'d mut [W], 763 dma_buf: &'d mut [W],
760 config: Config, 764 config: Config,
761 ) -> SubBlock<T, C, W> 765 ) -> SubBlock<'d, T, C, W>
762 where 766 where
763 C: Channel + DmaB<T>, 767 C: Channel + DmaB<T>,
764 { 768 {
769 let peri = peri.0;
765 into_ref!(dma, peri, sck, sd, fs); 770 into_ref!(dma, peri, sck, sd, fs);
766 771
767 let (sd_af_type, ck_af_type) = get_af_types(config.mode, config.tx_rx); 772 let (sd_af_type, ck_af_type) = get_af_types(config.mode, config.tx_rx);
@@ -790,17 +795,17 @@ impl SubBlockB {
790 } 795 }
791 796
792 pub fn new_synchronous<'d, T: Instance, C: Channel, W: word::Word>( 797 pub fn new_synchronous<'d, T: Instance, C: Channel, W: word::Word>(
793 peri: impl Peripheral<P = T> + 'd, 798 peri: SubBlockBPeripheral<'d, T>,
794 sd: impl Peripheral<P = impl SdBPin<T>> + 'd, 799 sd: impl Peripheral<P = impl SdBPin<T>> + 'd,
795 dma: impl Peripheral<P = C> + 'd, 800 dma: impl Peripheral<P = C> + 'd,
796 dma_buf: &'d mut [W], 801 dma_buf: &'d mut [W],
797 mut config: Config, 802 mut config: Config,
798 ) -> SubBlock<T, C, W> 803 ) -> SubBlock<'d, T, C, W>
799 where 804 where
800 C: Channel + DmaB<T>, 805 C: Channel + DmaB<T>,
801 { 806 {
802 update_synchronous_config(&mut config); 807 update_synchronous_config(&mut config);
803 808 let peri = peri.0;
804 into_ref!(dma, peri, sd); 809 into_ref!(dma, peri, sd);
805 810
806 let (sd_af_type, _ck_af_type) = get_af_types(config.mode, config.tx_rx); 811 let (sd_af_type, _ck_af_type) = get_af_types(config.mode, config.tx_rx);
@@ -853,10 +858,6 @@ impl<'d, T: Instance, C: Channel, W: word::Word> SubBlock<'d, T, C, W> {
853 ring_buffer: RingBuffer<'d, C, W>, 858 ring_buffer: RingBuffer<'d, C, W>,
854 config: Config, 859 config: Config,
855 ) -> Self { 860 ) -> Self {
856 T::enable();
857
858 // can't reset here because the other sub-block might be in use
859
860 #[cfg(any(sai_v1, sai_v2, sai_v3, sai_v4))] 861 #[cfg(any(sai_v1, sai_v2, sai_v3, sai_v4))]
861 { 862 {
862 let ch = T::REGS.ch(sub_block as usize); 863 let ch = T::REGS.ch(sub_block as usize);
@@ -959,8 +960,7 @@ impl<'d, T: Instance, C: Channel, W: word::Word> SubBlock<'d, T, C, W> {
959 } 960 }
960 961
961 pub fn reset() { 962 pub fn reset() {
962 T::enable(); 963 T::reset_and_enable();
963 T::reset();
964 } 964 }
965 965
966 pub fn flush(&mut self) { 966 pub fn flush(&mut self) {
diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs
index 9fb380fd6..595d2c199 100644
--- a/embassy-stm32/src/sdmmc/mod.rs
+++ b/embassy-stm32/src/sdmmc/mod.rs
@@ -452,8 +452,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
452 ) -> Self { 452 ) -> Self {
453 into_ref!(sdmmc, dma); 453 into_ref!(sdmmc, dma);
454 454
455 T::enable(); 455 T::reset_and_enable();
456 T::reset();
457 456
458 T::Interrupt::unpend(); 457 T::Interrupt::unpend();
459 unsafe { T::Interrupt::enable() }; 458 unsafe { T::Interrupt::enable() };
diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs
index bd70342c1..ea7132e06 100644
--- a/embassy-stm32/src/spi/mod.rs
+++ b/embassy-stm32/src/spi/mod.rs
@@ -230,8 +230,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
230 230
231 let lsbfirst = config.raw_byte_order(); 231 let lsbfirst = config.raw_byte_order();
232 232
233 T::enable(); 233 T::reset_and_enable();
234 T::reset();
235 234
236 #[cfg(any(spi_v1, spi_f1))] 235 #[cfg(any(spi_v1, spi_f1))]
237 { 236 {
diff --git a/embassy-stm32/src/time_driver.rs b/embassy-stm32/src/time_driver.rs
index e88198e6f..1468d9b6a 100644
--- a/embassy-stm32/src/time_driver.rs
+++ b/embassy-stm32/src/time_driver.rs
@@ -155,8 +155,7 @@ impl RtcDriver {
155 fn init(&'static self) { 155 fn init(&'static self) {
156 let r = T::regs_gp16(); 156 let r = T::regs_gp16();
157 157
158 <T as RccPeripheral>::enable(); 158 <T as RccPeripheral>::reset_and_enable();
159 <T as RccPeripheral>::reset();
160 159
161 let timer_freq = T::frequency(); 160 let timer_freq = T::frequency();
162 161
diff --git a/embassy-stm32/src/timer/complementary_pwm.rs b/embassy-stm32/src/timer/complementary_pwm.rs
index 0ab727344..3818cc03c 100644
--- a/embassy-stm32/src/timer/complementary_pwm.rs
+++ b/embassy-stm32/src/timer/complementary_pwm.rs
@@ -64,8 +64,7 @@ impl<'d, T: ComplementaryCaptureCompare16bitInstance> ComplementaryPwm<'d, T> {
64 fn new_inner(tim: impl Peripheral<P = T> + 'd, freq: Hertz) -> Self { 64 fn new_inner(tim: impl Peripheral<P = T> + 'd, freq: Hertz) -> Self {
65 into_ref!(tim); 65 into_ref!(tim);
66 66
67 T::enable(); 67 T::reset_and_enable();
68 <T as crate::rcc::sealed::RccPeripheral>::reset();
69 68
70 let mut this = Self { inner: tim }; 69 let mut this = Self { inner: tim };
71 70
diff --git a/embassy-stm32/src/timer/qei.rs b/embassy-stm32/src/timer/qei.rs
index 15f2c3a79..ecc9fabc7 100644
--- a/embassy-stm32/src/timer/qei.rs
+++ b/embassy-stm32/src/timer/qei.rs
@@ -55,8 +55,7 @@ impl<'d, T: CaptureCompare16bitInstance> Qei<'d, T> {
55 fn new_inner(tim: impl Peripheral<P = T> + 'd) -> Self { 55 fn new_inner(tim: impl Peripheral<P = T> + 'd) -> Self {
56 into_ref!(tim); 56 into_ref!(tim);
57 57
58 T::enable(); 58 T::reset_and_enable();
59 <T as crate::rcc::sealed::RccPeripheral>::reset();
60 59
61 // Configure TxC1 and TxC2 as captures 60 // Configure TxC1 and TxC2 as captures
62 T::regs_gp16().ccmr_input(0).modify(|w| { 61 T::regs_gp16().ccmr_input(0).modify(|w| {
diff --git a/embassy-stm32/src/timer/simple_pwm.rs b/embassy-stm32/src/timer/simple_pwm.rs
index 2b3a069a7..83c812775 100644
--- a/embassy-stm32/src/timer/simple_pwm.rs
+++ b/embassy-stm32/src/timer/simple_pwm.rs
@@ -63,8 +63,7 @@ impl<'d, T: CaptureCompare16bitInstance> SimplePwm<'d, T> {
63 fn new_inner(tim: impl Peripheral<P = T> + 'd, freq: Hertz) -> Self { 63 fn new_inner(tim: impl Peripheral<P = T> + 'd, freq: Hertz) -> Self {
64 into_ref!(tim); 64 into_ref!(tim);
65 65
66 T::enable(); 66 T::reset_and_enable();
67 <T as crate::rcc::sealed::RccPeripheral>::reset();
68 67
69 let mut this = Self { inner: tim }; 68 let mut this = Self { inner: tim };
70 69
diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs
index 445ca0edc..b4a74dc46 100644
--- a/embassy-stm32/src/usart/buffered.rs
+++ b/embassy-stm32/src/usart/buffered.rs
@@ -152,9 +152,8 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
152 config: Config, 152 config: Config,
153 ) -> Result<Self, ConfigError> { 153 ) -> Result<Self, ConfigError> {
154 // UartRx and UartTx have one refcount ea. 154 // UartRx and UartTx have one refcount ea.
155 T::enable(); 155 T::reset_and_enable();
156 T::enable(); 156 T::reset_and_enable();
157 T::reset();
158 157
159 Self::new_inner(peri, rx, tx, tx_buffer, rx_buffer, config) 158 Self::new_inner(peri, rx, tx, tx_buffer, rx_buffer, config)
160 } 159 }
@@ -173,9 +172,8 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
173 into_ref!(cts, rts); 172 into_ref!(cts, rts);
174 173
175 // UartRx and UartTx have one refcount ea. 174 // UartRx and UartTx have one refcount ea.
176 T::enable(); 175 T::reset_and_enable();
177 T::enable(); 176 T::reset_and_enable();
178 T::reset();
179 177
180 rts.set_as_af(rts.af_num(), AFType::OutputPushPull); 178 rts.set_as_af(rts.af_num(), AFType::OutputPushPull);
181 cts.set_as_af(cts.af_num(), AFType::Input); 179 cts.set_as_af(cts.af_num(), AFType::Input);
@@ -201,9 +199,8 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
201 into_ref!(de); 199 into_ref!(de);
202 200
203 // UartRx and UartTx have one refcount ea. 201 // UartRx and UartTx have one refcount ea.
204 T::enable(); 202 T::reset_and_enable();
205 T::enable(); 203 T::reset_and_enable();
206 T::reset();
207 204
208 de.set_as_af(de.af_num(), AFType::OutputPushPull); 205 de.set_as_af(de.af_num(), AFType::OutputPushPull);
209 T::regs().cr3().write(|w| { 206 T::regs().cr3().write(|w| {
diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs
index 2eb2e4e88..93e21ccb6 100644
--- a/embassy-stm32/src/usart/mod.rs
+++ b/embassy-stm32/src/usart/mod.rs
@@ -228,8 +228,7 @@ impl<'d, T: BasicInstance, TxDma> UartTx<'d, T, TxDma> {
228 tx_dma: impl Peripheral<P = TxDma> + 'd, 228 tx_dma: impl Peripheral<P = TxDma> + 'd,
229 config: Config, 229 config: Config,
230 ) -> Result<Self, ConfigError> { 230 ) -> Result<Self, ConfigError> {
231 T::enable(); 231 T::reset_and_enable();
232 T::reset();
233 232
234 Self::new_inner(peri, tx, tx_dma, config) 233 Self::new_inner(peri, tx, tx_dma, config)
235 } 234 }
@@ -243,8 +242,7 @@ impl<'d, T: BasicInstance, TxDma> UartTx<'d, T, TxDma> {
243 ) -> Result<Self, ConfigError> { 242 ) -> Result<Self, ConfigError> {
244 into_ref!(cts); 243 into_ref!(cts);
245 244
246 T::enable(); 245 T::reset_and_enable();
247 T::reset();
248 246
249 cts.set_as_af(cts.af_num(), AFType::Input); 247 cts.set_as_af(cts.af_num(), AFType::Input);
250 T::regs().cr3().write(|w| { 248 T::regs().cr3().write(|w| {
@@ -321,8 +319,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
321 rx_dma: impl Peripheral<P = RxDma> + 'd, 319 rx_dma: impl Peripheral<P = RxDma> + 'd,
322 config: Config, 320 config: Config,
323 ) -> Result<Self, ConfigError> { 321 ) -> Result<Self, ConfigError> {
324 T::enable(); 322 T::reset_and_enable();
325 T::reset();
326 323
327 Self::new_inner(peri, rx, rx_dma, config) 324 Self::new_inner(peri, rx, rx_dma, config)
328 } 325 }
@@ -337,8 +334,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
337 ) -> Result<Self, ConfigError> { 334 ) -> Result<Self, ConfigError> {
338 into_ref!(rts); 335 into_ref!(rts);
339 336
340 T::enable(); 337 T::reset_and_enable();
341 T::reset();
342 338
343 rts.set_as_af(rts.af_num(), AFType::OutputPushPull); 339 rts.set_as_af(rts.af_num(), AFType::OutputPushPull);
344 T::regs().cr3().write(|w| { 340 T::regs().cr3().write(|w| {
@@ -695,9 +691,8 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
695 config: Config, 691 config: Config,
696 ) -> Result<Self, ConfigError> { 692 ) -> Result<Self, ConfigError> {
697 // UartRx and UartTx have one refcount ea. 693 // UartRx and UartTx have one refcount ea.
698 T::enable(); 694 T::reset_and_enable();
699 T::enable(); 695 T::reset_and_enable();
700 T::reset();
701 696
702 Self::new_inner(peri, rx, tx, tx_dma, rx_dma, config) 697 Self::new_inner(peri, rx, tx, tx_dma, rx_dma, config)
703 } 698 }
@@ -716,9 +711,8 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
716 into_ref!(cts, rts); 711 into_ref!(cts, rts);
717 712
718 // UartRx and UartTx have one refcount ea. 713 // UartRx and UartTx have one refcount ea.
719 T::enable(); 714 T::reset_and_enable();
720 T::enable(); 715 T::reset_and_enable();
721 T::reset();
722 716
723 rts.set_as_af(rts.af_num(), AFType::OutputPushPull); 717 rts.set_as_af(rts.af_num(), AFType::OutputPushPull);
724 cts.set_as_af(cts.af_num(), AFType::Input); 718 cts.set_as_af(cts.af_num(), AFType::Input);
@@ -743,9 +737,8 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
743 into_ref!(de); 737 into_ref!(de);
744 738
745 // UartRx and UartTx have one refcount ea. 739 // UartRx and UartTx have one refcount ea.
746 T::enable(); 740 T::reset_and_enable();
747 T::enable(); 741 T::reset_and_enable();
748 T::reset();
749 742
750 de.set_as_af(de.af_num(), AFType::OutputPushPull); 743 de.set_as_af(de.af_num(), AFType::OutputPushPull);
751 T::regs().cr3().write(|w| { 744 T::regs().cr3().write(|w| {
diff --git a/embassy-stm32/src/usb/usb.rs b/embassy-stm32/src/usb/usb.rs
index b24fc74eb..d05207d1d 100644
--- a/embassy-stm32/src/usb/usb.rs
+++ b/embassy-stm32/src/usb/usb.rs
@@ -269,8 +269,7 @@ impl<'d, T: Instance> Driver<'d, T> {
269 #[cfg(pwr_h5)] 269 #[cfg(pwr_h5)]
270 crate::pac::PWR.usbscr().modify(|w| w.set_usb33sv(true)); 270 crate::pac::PWR.usbscr().modify(|w| w.set_usb33sv(true));
271 271
272 <T as RccPeripheral>::enable(); 272 <T as RccPeripheral>::reset_and_enable();
273 <T as RccPeripheral>::reset();
274 273
275 regs.cntr().write(|w| { 274 regs.cntr().write(|w| {
276 w.set_pdwn(false); 275 w.set_pdwn(false);
diff --git a/embassy-stm32/src/usb_otg/usb.rs b/embassy-stm32/src/usb_otg/usb.rs
index 1fe010bbb..9edffa901 100644
--- a/embassy-stm32/src/usb_otg/usb.rs
+++ b/embassy-stm32/src/usb_otg/usb.rs
@@ -632,8 +632,7 @@ impl<'d, T: Instance> Bus<'d, T> {
632 }); 632 });
633 } 633 }
634 634
635 <T as RccPeripheral>::enable(); 635 <T as RccPeripheral>::reset_and_enable();
636 <T as RccPeripheral>::reset();
637 636
638 T::Interrupt::unpend(); 637 T::Interrupt::unpend();
639 unsafe { T::Interrupt::enable() }; 638 unsafe { T::Interrupt::enable() };
diff --git a/examples/stm32h7/src/bin/dac_dma.rs b/examples/stm32h7/src/bin/dac_dma.rs
index 933641ae4..5f3afbafa 100644
--- a/examples/stm32h7/src/bin/dac_dma.rs
+++ b/examples/stm32h7/src/bin/dac_dma.rs
@@ -79,7 +79,7 @@ async fn dac_task1(mut dac: Dac1Type) {
79 dac.select_trigger(embassy_stm32::dac::Ch1Trigger::Tim6).unwrap(); 79 dac.select_trigger(embassy_stm32::dac::Ch1Trigger::Tim6).unwrap();
80 dac.enable_channel().unwrap(); 80 dac.enable_channel().unwrap();
81 81
82 TIM6::enable(); 82 TIM6::reset_and_enable();
83 TIM6::regs().arr().modify(|w| w.set_arr(reload as u16 - 1)); 83 TIM6::regs().arr().modify(|w| w.set_arr(reload as u16 - 1));
84 TIM6::regs().cr2().modify(|w| w.set_mms(Mms::UPDATE)); 84 TIM6::regs().cr2().modify(|w| w.set_mms(Mms::UPDATE));
85 TIM6::regs().cr1().modify(|w| { 85 TIM6::regs().cr1().modify(|w| {
@@ -118,7 +118,7 @@ async fn dac_task2(mut dac: Dac2Type) {
118 error!("Reload value {} below threshold!", reload); 118 error!("Reload value {} below threshold!", reload);
119 } 119 }
120 120
121 TIM7::enable(); 121 TIM7::reset_and_enable();
122 TIM7::regs().arr().modify(|w| w.set_arr(reload as u16 - 1)); 122 TIM7::regs().arr().modify(|w| w.set_arr(reload as u16 - 1));
123 TIM7::regs().cr2().modify(|w| w.set_mms(Mms::UPDATE)); 123 TIM7::regs().cr2().modify(|w| w.set_mms(Mms::UPDATE));
124 TIM7::regs().cr1().modify(|w| { 124 TIM7::regs().cr1().modify(|w| {
diff --git a/examples/stm32h7/src/bin/low_level_timer_api.rs b/examples/stm32h7/src/bin/low_level_timer_api.rs
index f4fa06909..757ee3286 100644
--- a/examples/stm32h7/src/bin/low_level_timer_api.rs
+++ b/examples/stm32h7/src/bin/low_level_timer_api.rs
@@ -73,8 +73,7 @@ impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> {
73 ) -> Self { 73 ) -> Self {
74 into_ref!(tim, ch1, ch2, ch3, ch4); 74 into_ref!(tim, ch1, ch2, ch3, ch4);
75 75
76 T::enable(); 76 T::reset_and_enable();
77 <T as embassy_stm32::rcc::low_level::RccPeripheral>::reset();
78 77
79 ch1.set_speed(Speed::VeryHigh); 78 ch1.set_speed(Speed::VeryHigh);
80 ch1.set_as_af(ch1.af_num(), AFType::OutputPushPull); 79 ch1.set_as_af(ch1.af_num(), AFType::OutputPushPull);
diff --git a/examples/stm32l4/src/bin/dac_dma.rs b/examples/stm32l4/src/bin/dac_dma.rs
index c27cc03e1..83d48f221 100644
--- a/examples/stm32l4/src/bin/dac_dma.rs
+++ b/examples/stm32l4/src/bin/dac_dma.rs
@@ -51,7 +51,7 @@ async fn dac_task1(mut dac: Dac1Type) {
51 dac.select_trigger(embassy_stm32::dac::Ch1Trigger::Tim6).unwrap(); 51 dac.select_trigger(embassy_stm32::dac::Ch1Trigger::Tim6).unwrap();
52 dac.enable_channel().unwrap(); 52 dac.enable_channel().unwrap();
53 53
54 TIM6::enable(); 54 TIM6::reset_and_enable();
55 TIM6::regs().arr().modify(|w| w.set_arr(reload as u16 - 1)); 55 TIM6::regs().arr().modify(|w| w.set_arr(reload as u16 - 1));
56 TIM6::regs().cr2().modify(|w| w.set_mms(Mms::UPDATE)); 56 TIM6::regs().cr2().modify(|w| w.set_mms(Mms::UPDATE));
57 TIM6::regs().cr1().modify(|w| { 57 TIM6::regs().cr1().modify(|w| {
@@ -90,7 +90,7 @@ async fn dac_task2(mut dac: Dac2Type) {
90 error!("Reload value {} below threshold!", reload); 90 error!("Reload value {} below threshold!", reload);
91 } 91 }
92 92
93 TIM7::enable(); 93 TIM7::reset_and_enable();
94 TIM7::regs().arr().modify(|w| w.set_arr(reload as u16 - 1)); 94 TIM7::regs().arr().modify(|w| w.set_arr(reload as u16 - 1));
95 TIM7::regs().cr2().modify(|w| w.set_mms(Mms::UPDATE)); 95 TIM7::regs().cr2().modify(|w| w.set_mms(Mms::UPDATE));
96 TIM7::regs().cr1().modify(|w| { 96 TIM7::regs().cr1().modify(|w| {