diff options
| author | Bailey Townsend <[email protected]> | 2024-12-28 17:31:14 -0600 |
|---|---|---|
| committer | Bailey Townsend <[email protected]> | 2024-12-28 17:31:14 -0600 |
| commit | 147fd60255a94292a2e0e685c0cad068cc7760e7 (patch) | |
| tree | e3c5761376a7b904d286b9837492ee6ed9be31a5 /cyw43-pio/src | |
| parent | 388103275e8648492e27514e00048492a55a931c (diff) | |
Removed the cyw43-pio overclock feature
Diffstat (limited to 'cyw43-pio/src')
| -rw-r--r-- | cyw43-pio/src/lib.rs | 99 |
1 files changed, 50 insertions, 49 deletions
diff --git a/cyw43-pio/src/lib.rs b/cyw43-pio/src/lib.rs index abf3830d9..5fe7af95d 100644 --- a/cyw43-pio/src/lib.rs +++ b/cyw43-pio/src/lib.rs | |||
| @@ -40,7 +40,6 @@ pub const OVERCLOCK_CLOCK_DIVIDER: FixedU32<U8> = FixedU32::from_bits(0x0100); | |||
| 40 | 40 | ||
| 41 | /// The clock divider for the RM2 module. Found to be needed for the Pimoroni Pico Plus 2 W, | 41 | /// The clock divider for the RM2 module. Found to be needed for the Pimoroni Pico Plus 2 W, |
| 42 | /// Pico Plus 2 Non w with the RM2 breakout module, and the Pico 2 with the RM2 breakout module. | 42 | /// Pico Plus 2 Non w with the RM2 breakout module, and the Pico 2 with the RM2 breakout module. |
| 43 | /// Does not work with the feature "overclock". | ||
| 44 | pub const RM2_CLOCK_DIVIDER: FixedU32<U8> = FixedU32::from_bits(0x0300); | 43 | pub const RM2_CLOCK_DIVIDER: FixedU32<U8> = FixedU32::from_bits(0x0300); |
| 45 | 44 | ||
| 46 | impl<'d, PIO, const SM: usize, DMA> PioSpi<'d, PIO, SM, DMA> | 45 | impl<'d, PIO, const SM: usize, DMA> PioSpi<'d, PIO, SM, DMA> |
| @@ -63,53 +62,56 @@ where | |||
| 63 | DIO: PioPin, | 62 | DIO: PioPin, |
| 64 | CLK: PioPin, | 63 | CLK: PioPin, |
| 65 | { | 64 | { |
| 66 | #[cfg(feature = "overclock")] | 65 | let loaded_program = if clock_divider < DEFAULT_CLOCK_DIVIDER { |
| 67 | let program = pio_asm!( | 66 | let overclock_program = pio_asm!( |
| 68 | ".side_set 1" | 67 | ".side_set 1" |
| 69 | 68 | ||
| 70 | ".wrap_target" | 69 | ".wrap_target" |
| 71 | // write out x-1 bits | 70 | // write out x-1 bits |
| 72 | "lp:" | 71 | "lp:" |
| 73 | "out pins, 1 side 0" | 72 | "out pins, 1 side 0" |
| 74 | "jmp x-- lp side 1" | 73 | "jmp x-- lp side 1" |
| 75 | // switch directions | 74 | // switch directions |
| 76 | "set pindirs, 0 side 0" | 75 | "set pindirs, 0 side 0" |
| 77 | "nop side 1" // necessary for clkdiv=1. | 76 | "nop side 1" // necessary for clkdiv=1. |
| 78 | "nop side 0" | 77 | "nop side 0" |
| 79 | // read in y-1 bits | 78 | // read in y-1 bits |
| 80 | "lp2:" | 79 | "lp2:" |
| 81 | "in pins, 1 side 1" | 80 | "in pins, 1 side 1" |
| 82 | "jmp y-- lp2 side 0" | 81 | "jmp y-- lp2 side 0" |
| 83 | 82 | ||
| 84 | // wait for event and irq host | 83 | // wait for event and irq host |
| 85 | "wait 1 pin 0 side 0" | 84 | "wait 1 pin 0 side 0" |
| 86 | "irq 0 side 0" | 85 | "irq 0 side 0" |
| 87 | 86 | ||
| 88 | ".wrap" | 87 | ".wrap" |
| 89 | ); | 88 | ); |
| 90 | #[cfg(not(feature = "overclock"))] | 89 | common.load_program(&overclock_program.program) |
| 91 | let program = pio_asm!( | 90 | } else { |
| 92 | ".side_set 1" | 91 | let default_program = pio_asm!( |
| 93 | 92 | ".side_set 1" | |
| 94 | ".wrap_target" | 93 | |
| 95 | // write out x-1 bits | 94 | ".wrap_target" |
| 96 | "lp:" | 95 | // write out x-1 bits |
| 97 | "out pins, 1 side 0" | 96 | "lp:" |
| 98 | "jmp x-- lp side 1" | 97 | "out pins, 1 side 0" |
| 99 | // switch directions | 98 | "jmp x-- lp side 1" |
| 100 | "set pindirs, 0 side 0" | 99 | // switch directions |
| 101 | "nop side 0" | 100 | "set pindirs, 0 side 0" |
| 102 | // read in y-1 bits | 101 | "nop side 0" |
| 103 | "lp2:" | 102 | // read in y-1 bits |
| 104 | "in pins, 1 side 1" | 103 | "lp2:" |
| 105 | "jmp y-- lp2 side 0" | 104 | "in pins, 1 side 1" |
| 106 | 105 | "jmp y-- lp2 side 0" | |
| 107 | // wait for event and irq host | 106 | |
| 108 | "wait 1 pin 0 side 0" | 107 | // wait for event and irq host |
| 109 | "irq 0 side 0" | 108 | "wait 1 pin 0 side 0" |
| 110 | 109 | "irq 0 side 0" | |
| 111 | ".wrap" | 110 | |
| 112 | ); | 111 | ".wrap" |
| 112 | ); | ||
| 113 | common.load_program(&default_program.program) | ||
| 114 | }; | ||
| 113 | 115 | ||
| 114 | let mut pin_io: embassy_rp::pio::Pin<PIO> = common.make_pio_pin(dio); | 116 | let mut pin_io: embassy_rp::pio::Pin<PIO> = common.make_pio_pin(dio); |
| 115 | pin_io.set_pull(Pull::None); | 117 | pin_io.set_pull(Pull::None); |
| @@ -123,7 +125,6 @@ where | |||
| 123 | pin_clk.set_slew_rate(SlewRate::Fast); | 125 | pin_clk.set_slew_rate(SlewRate::Fast); |
| 124 | 126 | ||
| 125 | let mut cfg = Config::default(); | 127 | let mut cfg = Config::default(); |
| 126 | let loaded_program = common.load_program(&program.program); | ||
| 127 | cfg.use_program(&loaded_program, &[&pin_clk]); | 128 | cfg.use_program(&loaded_program, &[&pin_clk]); |
| 128 | cfg.set_out_pins(&[&pin_io]); | 129 | cfg.set_out_pins(&[&pin_io]); |
| 129 | cfg.set_in_pins(&[&pin_io]); | 130 | cfg.set_in_pins(&[&pin_io]); |
