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| author | Aurélien Jacobs <[email protected]> | 2024-11-19 17:26:45 +0100 |
|---|---|---|
| committer | Aurélien Jacobs <[email protected]> | 2024-11-20 16:21:20 +0100 |
| commit | 3402e76f9876d58d271501102e2d80c9b2c389b3 (patch) | |
| tree | 6bec1545e52ad49b665a35b380d983215bf10668 /docs/examples/basic/src | |
| parent | 0f95c72e78e411e0fd10420ebee3c4bd323a210a (diff) | |
stm32/timer: avoid max_compare_value >= u16::MAX
With STM32 32 bits timers, the max_compare_value (AKA, ARR register)
can currently be set greater than u16::MAX, which leads to the following
assert!(max < u16::MAX as u32) in max_duty_cycle() when setting up a 1 kHz
SimplePwm on 84 MHz MCU.
The issue is fixed by forcing a max_compare_value that fits into 16 bits
when setting the frequency for a PWM.
Diffstat (limited to 'docs/examples/basic/src')
0 files changed, 0 insertions, 0 deletions