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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2021-12-16 07:07:39 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2021-12-16 07:07:39 +0000 |
| commit | 2d6111ed439a45a9001ab92ce0b2101836711317 (patch) | |
| tree | 50d4baea15e3cb73b4fa40c795b65041344c7b5e /docs/modules/ROOT/examples/basic/src | |
| parent | 1a7b9e3279b4920392cfb1a6614968d8be4eee2a (diff) | |
| parent | 6597e67036a875924757ace7c7550a0cd69c47a5 (diff) | |
Merge #543
543: Incrementally merge STM32 SPI versions, Part 3 r=Dirbaio a=GrantM11235
Notable changes:
- `SPE` is now disabled before `TXDMAEN` and `RXDMAEN` are disabled. This is the "mandatory" sequence for v2 and v3 (and maybe v1 as well, but I can't find it in the reference manual).
- v1's `write_dma_u8` now waits for idle and disables `TXDMAEN` after the transfer is complete, just like everything else.
Co-authored-by: Grant Miller <[email protected]>
Diffstat (limited to 'docs/modules/ROOT/examples/basic/src')
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