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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2022-05-19 04:00:23 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2022-05-19 04:00:23 +0000 |
| commit | 7743b8e1aeb0d00687ceda407ed30d8c69950ed1 (patch) | |
| tree | f8c85363a14425cdf367a89e694b36d182fda64d /docs/modules/ROOT/examples/basic | |
| parent | 240bef8c9f97998bd4639c714077b7aa59f5e7bc (diff) | |
| parent | 53f65d8b09c15fcedefd41d721f53ebd296229de (diff) | |
Merge #776
776: Automatically set ADC clock prescaler on v2 ADC to respect max frequency r=Dirbaio a=matoushybl
Co-authored-by: Matous Hybl <[email protected]>
Diffstat (limited to 'docs/modules/ROOT/examples/basic')
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