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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2023-04-27 15:28:11 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-04-27 15:28:11 +0000 |
| commit | 03d6363d5af5dcaf21b52734994a466ca593d2b6 (patch) | |
| tree | 1b3fb2b715d2bd60385cbb8d795aac7bd85b498e /docs/modules/ROOT/examples/layer-by-layer | |
| parent | 1cf26f0eb3181b04ce2c520a4814c4b3a99bb407 (diff) | |
| parent | 31b54e0fbd086178090b4899c2f788277bf5daac (diff) | |
Merge #1406
1406: rp: DMA behaviour during flash operations r=Dirbaio a=kalkyl
This PR changes the old behaviour during flash operations where all DMA transfers were paused during the flash operation.
The new approach is to wait for any DMA operating in flash region to finish and let RAM transfers continue.
Co-authored-by: kalkyl <[email protected]>
Diffstat (limited to 'docs/modules/ROOT/examples/layer-by-layer')
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