diff options
| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2022-01-10 12:35:40 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2022-01-10 12:35:40 +0000 |
| commit | 01af8095fdb3d68026c1748730fb125bcbb31410 (patch) | |
| tree | 264630a9e03e9a00083171cfe3124549a785bbd6 /docs/modules/ROOT | |
| parent | 82e5edb94064b51af433b4c3e89a7cf4b6eaa826 (diff) | |
| parent | c54303be755d021f8a5a6b89c3032cfe834c6bc7 (diff) | |
Merge #572
572: Makes the uarte endtx event available r=Dirbaio a=huntc
This PR allows `event_endtx` to be used outside of the `Uarte` itself. As a consequence, PPI can be used to drive tasks given the end of transmission on the Uarte. This is particularly useful for situations like RS485 where a GPIO may be required to be set to high when transmitting, then cleared when done. A non-PPI approach can cause a delay in the clearing of this GPIO as other Embassy tasks might become scheduled. Not clearing the GPIO in a timely manner can be problematic.
Here's an example of our usage with this change:
```rust
let uarte_tx_enable = OutputChannel::new(
p.gpiote_ch,
Output::new(p.uarte_tx_enable_pin, Level::Low, OutputDrive::Standard),
OutputChannelPolarity::Set,
);
let mut ppi = Ppi::new_one_to_one(p.ppi_ch, uarte.event_endtx(), uarte_tx_enable.task_clr());
ppi.enable();
```
...and then later when writing:
```rust
uarte_tx_enable.set();
let _ = uarte_tx.write(&datagram_buf).await;
```
Co-authored-by: huntc <[email protected]>
Diffstat (limited to 'docs/modules/ROOT')
0 files changed, 0 insertions, 0 deletions
