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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2023-01-11 17:05:59 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-01-11 17:05:59 +0000 |
| commit | 88fd521b016be18230b5b3d4b3bf96c29f10e202 (patch) | |
| tree | d416bfda40860e61898e5599809c503c7149285a /docs/modules/ROOT | |
| parent | 96b97c4711af0851f7d3a6785be13b0202b6e902 (diff) | |
| parent | 1af102a1aaa11d03bfa37831a3284546b605efd8 (diff) | |
Merge #1145
1145: STM32 USB OTG #2 r=Dirbaio a=chemicstry
This is a continuation of #799
The usb serial example is already working!
TODO:
- [x] Add critical sections to registers shared with IRQ
- [x] Fix `disable()`
- [x] ~Implement cable disconnect detection~ - postponed
- [x] Fix `endpoint_set_enabled()`
- [x] ~Endpoint `wait_enabled`~ USB OTG does not have enable delay (?)
- [x] HS internal and HS ULPI PHY - untested
Co-authored-by: chemicstry <[email protected]>
Co-authored-by: Dario Nieuwenhuis <[email protected]>
Diffstat (limited to 'docs/modules/ROOT')
0 files changed, 0 insertions, 0 deletions
