Rename Unborrowed -> PeripheralRef, Unborrow -> Peripheral

2 files changed, 6 insertions, 6 deletions

diff --git a/embassy-cortex-m/src/interrupt.rs b/embassy-cortex-m/src/interrupt.rs
index 715f00381..7358caa46 100644
--- a/embassy-cortex-m/src/interrupt.rs
+++ b/embassy-cortex-m/src/interrupt.rs
@@ -3,7 +3,7 @@ use core::{mem, ptr};
 
 use atomic_polyfill::{compiler_fence, AtomicPtr, Ordering};
 use cortex_m::peripheral::NVIC;
-use embassy_hal_common::Unborrow;
+use embassy_hal_common::Peripheral;
 pub use embassy_macros::cortex_m_interrupt_take as take;
 
 /// Implementation detail, do not use outside embassy crates.
@@ -32,7 +32,7 @@ unsafe impl cortex_m::interrupt::InterruptNumber for NrWrap {
 
 /// Represents an interrupt type that can be configured by embassy to handle
 /// interrupts.
-pub unsafe trait Interrupt: Unborrow<Target = Self> {
+pub unsafe trait Interrupt: Peripheral<P = Self> {
     /// Return the NVIC interrupt number for this interrupt.
     fn number(&self) -> u16;
     /// Steal an instance of this interrupt
diff --git a/embassy-cortex-m/src/peripheral.rs b/embassy-cortex-m/src/peripheral.rs
index c5fa20e71..e2f295579 100644
--- a/embassy-cortex-m/src/peripheral.rs
+++ b/embassy-cortex-m/src/peripheral.rs
@@ -3,7 +3,7 @@ use core::mem::MaybeUninit;
 
 use cortex_m::peripheral::scb::VectActive;
 use cortex_m::peripheral::{NVIC, SCB};
-use embassy_hal_common::{unborrow, Unborrow, Unborrowed};
+use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
 
 use crate::interrupt::{Interrupt, InterruptExt, Priority};
 
@@ -33,7 +33,7 @@ impl<S> StateStorage<S> {
 /// a safe way.
 pub struct PeripheralMutex<'a, S: PeripheralState> {
     state: *mut S,
-    irq: Unborrowed<'a, S::Interrupt>,
+    irq: PeripheralRef<'a, S::Interrupt>,
 }
 
 /// Whether `irq` can be preempted by the current interrupt.
@@ -62,11 +62,11 @@ impl<'a, S: PeripheralState> PeripheralMutex<'a, S> {
     ///
     /// Registers `on_interrupt` as the `irq`'s handler, and enables it.
     pub fn new(
-        irq: impl Unborrow<Target = S::Interrupt> + 'a,
+        irq: impl Peripheral<P = S::Interrupt> + 'a,
         storage: &'a mut StateStorage<S>,
         init: impl FnOnce() -> S,
     ) -> Self {
-        unborrow!(irq);
+        into_ref!(irq);
 
         if can_be_preempted(&*irq) {
             panic!(