Associated type

1 files changed, 45 insertions, 44 deletions

diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
index 2bcf47cff..456da8859 100644
--- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
+++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
@@ -76,66 +76,39 @@ where
     }
 }
 
-pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS, CS, C> {
-    bus: &'a Mutex<M, RefCell<BUS>>,
-    cs: CS,
-    config: C,
-}
-
-impl<'a, M: RawMutex, BUS, CS, C> SpiBusDeviceWithConfig<'a, M, BUS, CS, C> {
-    pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: C) -> Self {
-        Self { bus, cs, config }
-    }
-}
-
-impl<'a, M: RawMutex, BUS, CS, C> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS, C>
-where
-    BUS: spi::ErrorType,
-    CS: OutputPin,
-{
-    type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
-}
-
-impl<BUS, M, CS, C> SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS, C>
+impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiBusDevice<'_, M, BUS, CS>
 where
     M: RawMutex,
-    BUS: SpiBusFlush + SetConfig<C>,
-    CS: OutputPin,
+    BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>,
+    CS: OutputPin<Error = CsErr>,
 {
-    type Bus = BUS;
-
-    fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
+    type Error = SpiBusDeviceError<BusErr, CsErr>;
+    fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
         self.bus.lock(|bus| {
             let mut bus = bus.borrow_mut();
-            bus.set_config(&self.config);
             self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
-
-            let f_res = f(&mut bus);
-
-            // On failure, it's important to still flush and deassert CS.
-            let flush_res = bus.flush();
+            let f_res = bus.transfer(words);
             let cs_res = self.cs.set_high();
-
             let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
-            flush_res.map_err(SpiBusDeviceError::Spi)?;
             cs_res.map_err(SpiBusDeviceError::Cs)?;
             Ok(f_res)
         })
     }
 }
 
-impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiBusDevice<'_, M, BUS, CS>
+impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiBusDevice<'_, M, BUS, CS>
 where
     M: RawMutex,
-    BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>,
+    BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>,
     CS: OutputPin<Error = CsErr>,
 {
     type Error = SpiBusDeviceError<BusErr, CsErr>;
-    fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
+
+    fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
         self.bus.lock(|bus| {
             let mut bus = bus.borrow_mut();
             self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
-            let f_res = bus.transfer(words);
+            let f_res = bus.write(words);
             let cs_res = self.cs.set_high();
             let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
             cs_res.map_err(SpiBusDeviceError::Cs)?;
@@ -144,21 +117,49 @@ where
     }
 }
 
-impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiBusDevice<'_, M, BUS, CS>
+pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> {
+    bus: &'a Mutex<M, RefCell<BUS>>,
+    cs: CS,
+    config: BUS::Config,
+}
+
+impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiBusDeviceWithConfig<'a, M, BUS, CS> {
+    pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: BUS::Config) -> Self {
+        Self { bus, cs, config }
+    }
+}
+
+impl<'a, M, BUS, CS> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS>
 where
     M: RawMutex,
-    BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>,
-    CS: OutputPin<Error = CsErr>,
+    BUS: spi::ErrorType + SetConfig,
+    CS: OutputPin,
 {
-    type Error = SpiBusDeviceError<BusErr, CsErr>;
+    type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
+}
 
-    fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
+impl<BUS, M, CS> SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS>
+where
+    M: RawMutex,
+    BUS: SpiBusFlush + SetConfig,
+    CS: OutputPin,
+{
+    type Bus = BUS;
+
+    fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
         self.bus.lock(|bus| {
             let mut bus = bus.borrow_mut();
+            bus.set_config(&self.config);
             self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
-            let f_res = bus.write(words);
+
+            let f_res = f(&mut bus);
+
+            // On failure, it's important to still flush and deassert CS.
+            let flush_res = bus.flush();
             let cs_res = self.cs.set_high();
+
             let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;
+            flush_res.map_err(SpiBusDeviceError::Spi)?;
             cs_res.map_err(SpiBusDeviceError::Cs)?;
             Ok(f_res)
         })