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authorHenrik Alsér <[email protected]>2022-07-06 03:47:55 +0200
committerHenrik Alsér <[email protected]>2022-07-06 03:47:55 +0200
commitba2412ff7ea1eeb5eb1a09dad4399214f0e22d1e (patch)
treeec3d86a0bb49b2734db3b7373dfcc833b65e54be /embassy-embedded-hal
parentd3d82ad87d9f170e4858ae30143fe44ab5ddd0bd (diff)
Mutex for SPI
Diffstat (limited to 'embassy-embedded-hal')
-rw-r--r--embassy-embedded-hal/src/shared_bus/blocking/spi.rs47
1 files changed, 18 insertions, 29 deletions
diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
index 2583c699c..cf9b55db9 100644
--- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
+++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs
@@ -1,42 +1,26 @@
1//! Blocking shared SPI bus 1//! Blocking shared SPI bus
2use core::cell::RefCell; 2use core::cell::RefCell;
3use core::fmt::Debug;
4 3
4use embassy::blocking_mutex::raw::RawMutex;
5use embassy::blocking_mutex::Mutex;
5use embedded_hal_1::digital::blocking::OutputPin; 6use embedded_hal_1::digital::blocking::OutputPin;
6use embedded_hal_1::spi; 7use embedded_hal_1::spi;
7use embedded_hal_1::spi::blocking::{SpiBusFlush, SpiDevice}; 8use embedded_hal_1::spi::blocking::{SpiBusFlush, SpiDevice};
8 9
9#[derive(Copy, Clone, Eq, PartialEq, Debug)] 10use crate::shared_bus::spi::SpiBusDeviceError;
10pub enum SpiBusDeviceError<BUS, CS> {
11 Spi(BUS),
12 Cs(CS),
13}
14 11
15impl<BUS, CS> spi::Error for SpiBusDeviceError<BUS, CS> 12pub struct SpiBusDevice<'a, M: RawMutex, BUS, CS> {
16where 13 bus: &'a Mutex<M, RefCell<BUS>>,
17 BUS: spi::Error + Debug,
18 CS: Debug,
19{
20 fn kind(&self) -> spi::ErrorKind {
21 match self {
22 Self::Spi(e) => e.kind(),
23 Self::Cs(_) => spi::ErrorKind::Other,
24 }
25 }
26}
27
28pub struct SpiBusDevice<'a, BUS, CS> {
29 bus: &'a RefCell<BUS>,
30 cs: CS, 14 cs: CS,
31} 15}
32 16
33impl<'a, BUS, CS> SpiBusDevice<'a, BUS, CS> { 17impl<'a, M: RawMutex, BUS, CS> SpiBusDevice<'a, M, BUS, CS> {
34 pub fn new(bus: &'a RefCell<BUS>, cs: CS) -> Self { 18 pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self {
35 Self { bus, cs } 19 Self { bus, cs }
36 } 20 }
37} 21}
38 22
39impl<'a, BUS, CS> spi::ErrorType for SpiBusDevice<'a, BUS, CS> 23impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiBusDevice<'a, M, BUS, CS>
40where 24where
41 BUS: spi::ErrorType, 25 BUS: spi::ErrorType,
42 CS: OutputPin, 26 CS: OutputPin,
@@ -44,20 +28,25 @@ where
44 type Error = SpiBusDeviceError<BUS::Error, CS::Error>; 28 type Error = SpiBusDeviceError<BUS::Error, CS::Error>;
45} 29}
46 30
47impl<BUS, CS> SpiDevice for SpiBusDevice<'_, BUS, CS> 31impl<BUS, M, CS> SpiDevice for SpiBusDevice<'_, M, BUS, CS>
48where 32where
33 M: RawMutex,
49 BUS: SpiBusFlush, 34 BUS: SpiBusFlush,
50 CS: OutputPin, 35 CS: OutputPin,
51{ 36{
52 type Bus = BUS; 37 type Bus = BUS;
38
53 fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> { 39 fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
54 let mut bus = self.bus.borrow_mut();
55 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; 40 self.cs.set_low().map_err(SpiBusDeviceError::Cs)?;
56 41
57 let f_res = f(&mut bus); 42 let (f_res, flush_res) = self.bus.lock(|bus| {
43 let mut bus = bus.borrow_mut();
44 let f_res = f(&mut bus);
45 // On failure, it's important to still flush and deassert CS.
46 let flush_res = bus.flush();
47 (f_res, flush_res)
48 });
58 49
59 // On failure, it's important to still flush and deassert CS.
60 let flush_res = bus.flush();
61 let cs_res = self.cs.set_high(); 50 let cs_res = self.cs.set_high();
62 51
63 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; 52 let f_res = f_res.map_err(SpiBusDeviceError::Spi)?;