diff options
| author | Fabian Wolter <[email protected]> | 2025-09-02 21:17:47 +0200 |
|---|---|---|
| committer | Fabian Wolter <[email protected]> | 2025-09-02 21:18:08 +0200 |
| commit | 56f3c7a8c72356d9e21d5ef13e60d869ffd8cdf2 (patch) | |
| tree | 09cdbbfe7a1f65fc8fddb375ff6e967a74e7e1aa /embassy-executor-timer-queue | |
| parent | 1405b1affa1b81bb50e6a39456793d968d39f63f (diff) | |
stm32/i2c: fix failure of subsequent transmissions after NACK
When a slave responds with a NACK in blocking I²C master mode, all subsequent transmissions send only the address followed immediately by a STOP.
This happens because the current implementation sets I2C_CR2.STOP = 1 whenever any error (including a NACK) occurs. As a result, the STOP bit is already set when the next transmission starts.
According to the reference manual: "If a NACK is received: […] a STOP condition is automatically sent […]"
This bug was not triggered until #4454 was merged.
Diffstat (limited to 'embassy-executor-timer-queue')
0 files changed, 0 insertions, 0 deletions