diff options
| author | James Munns <[email protected]> | 2025-12-12 20:45:15 +0100 |
|---|---|---|
| committer | James Munns <[email protected]> | 2025-12-15 14:31:39 +0100 |
| commit | 5f366957f31d87030182f80dd2d39dc8a8496883 (patch) | |
| tree | 97cbe9d67fa8190a230f30795d0c98eee9d5ab3a /embassy-mcxa/src/clkout.rs | |
| parent | 3588023e3e04b18cf98a2a0d10756e1f236ca351 (diff) | |
Add SOSC support
Diffstat (limited to 'embassy-mcxa/src/clkout.rs')
| -rw-r--r-- | embassy-mcxa/src/clkout.rs | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/embassy-mcxa/src/clkout.rs b/embassy-mcxa/src/clkout.rs index 5b21f24b0..3495eb886 100644 --- a/embassy-mcxa/src/clkout.rs +++ b/embassy-mcxa/src/clkout.rs | |||
| @@ -20,6 +20,7 @@ pub struct ClockOut<'a> { | |||
| 20 | } | 20 | } |
| 21 | 21 | ||
| 22 | /// Selected clock source to output | 22 | /// Selected clock source to output |
| 23 | #[derive(Copy, Clone)] | ||
| 23 | pub enum ClockOutSel { | 24 | pub enum ClockOutSel { |
| 24 | /// 12MHz Internal Oscillator | 25 | /// 12MHz Internal Oscillator |
| 25 | Fro12M, | 26 | Fro12M, |
| @@ -36,6 +37,7 @@ pub enum ClockOutSel { | |||
| 36 | } | 37 | } |
| 37 | 38 | ||
| 38 | /// Configuration for the ClockOut | 39 | /// Configuration for the ClockOut |
| 40 | #[derive(Copy, Clone)] | ||
| 39 | pub struct Config { | 41 | pub struct Config { |
| 40 | /// Selected Source Clock | 42 | /// Selected Source Clock |
| 41 | pub sel: ClockOutSel, | 43 | pub sel: ClockOutSel, |
| @@ -157,6 +159,12 @@ mod sealed { | |||
| 157 | fn mux(&self) { | 159 | fn mux(&self) { |
| 158 | self.set_function(crate::pac::port0::pcr0::Mux::$func); | 160 | self.set_function(crate::pac::port0::pcr0::Mux::$func); |
| 159 | self.set_pull(Pull::Disabled); | 161 | self.set_pull(Pull::Disabled); |
| 162 | |||
| 163 | // TODO: we may want to expose these as options to allow the slew rate | ||
| 164 | // and drive strength for clocks if they are particularly high speed. | ||
| 165 | // | ||
| 166 | // self.set_drive_strength(crate::pac::port0::pcr0::Dse::Dse1); | ||
| 167 | // self.set_slew_rate(crate::pac::port0::pcr0::Sre::Sre0); | ||
| 160 | } | 168 | } |
| 161 | } | 169 | } |
| 162 | }; | 170 | }; |
