diff options
| author | Mathis Deroo <[email protected]> | 2025-12-05 14:37:19 -0800 |
|---|---|---|
| committer | Mathis Deroo <[email protected]> | 2025-12-09 10:51:55 -0800 |
| commit | 1ccf45058db4e77ac2c59357cab196b659201b63 (patch) | |
| tree | bfe1fa9c96db00b8551e44a67d4ecf65139d7061 /embassy-mcxa/src/clocks/mod.rs | |
| parent | 23623d634b88da7bc398f092ac4ab9e571c6e6e1 (diff) | |
ADC driver improvement
Signed-off-by: Mathis Deroo <[email protected]>
Diffstat (limited to 'embassy-mcxa/src/clocks/mod.rs')
| -rw-r--r-- | embassy-mcxa/src/clocks/mod.rs | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/embassy-mcxa/src/clocks/mod.rs b/embassy-mcxa/src/clocks/mod.rs index 014a12519..667d79536 100644 --- a/embassy-mcxa/src/clocks/mod.rs +++ b/embassy-mcxa/src/clocks/mod.rs | |||
| @@ -945,7 +945,10 @@ pub(crate) mod gate { | |||
| 945 | impl_cc_gate!(LPUART3, mrcc_glb_cc0, mrcc_glb_rst0, lpuart3, LpuartConfig); | 945 | impl_cc_gate!(LPUART3, mrcc_glb_cc0, mrcc_glb_rst0, lpuart3, LpuartConfig); |
| 946 | impl_cc_gate!(LPUART4, mrcc_glb_cc0, mrcc_glb_rst0, lpuart4, LpuartConfig); | 946 | impl_cc_gate!(LPUART4, mrcc_glb_cc0, mrcc_glb_rst0, lpuart4, LpuartConfig); |
| 947 | impl_cc_gate!(LPUART5, mrcc_glb_cc1, mrcc_glb_rst1, lpuart5, LpuartConfig); | 947 | impl_cc_gate!(LPUART5, mrcc_glb_cc1, mrcc_glb_rst1, lpuart5, LpuartConfig); |
| 948 | impl_cc_gate!(ADC0, mrcc_glb_cc1, mrcc_glb_rst1, adc0, AdcConfig); | ||
| 948 | impl_cc_gate!(ADC1, mrcc_glb_cc1, mrcc_glb_rst1, adc1, AdcConfig); | 949 | impl_cc_gate!(ADC1, mrcc_glb_cc1, mrcc_glb_rst1, adc1, AdcConfig); |
| 950 | impl_cc_gate!(ADC2, mrcc_glb_cc1, mrcc_glb_rst1, adc2, AdcConfig); | ||
| 951 | impl_cc_gate!(ADC3, mrcc_glb_cc1, mrcc_glb_rst1, adc3, AdcConfig); | ||
| 949 | 952 | ||
| 950 | // DMA0 peripheral - uses NoConfig since it has no selectable clock source | 953 | // DMA0 peripheral - uses NoConfig since it has no selectable clock source |
| 951 | impl_cc_gate!(DMA0, mrcc_glb_cc0, mrcc_glb_rst0, dma0, NoConfig); | 954 | impl_cc_gate!(DMA0, mrcc_glb_cc0, mrcc_glb_rst0, dma0, NoConfig); |
