diff options
| author | Felipe Balbi <[email protected]> | 2025-12-11 09:48:32 -0800 |
|---|---|---|
| committer | Felipe Balbi <[email protected]> | 2025-12-11 09:48:32 -0800 |
| commit | 86de5d04b91f38ab4322eaa8ff5b0f371824b57a (patch) | |
| tree | f758f462bd3cc7f670fdb7613282d1beaedefb95 /embassy-mcxa/src/interrupt.rs | |
| parent | af02ef481498441289a6decfe3baf7f3878f7871 (diff) | |
| parent | 3588023e3e04b18cf98a2a0d10756e1f236ca351 (diff) | |
Merge remote-tracking branch 'upstream/main' into mcxa/trng
Diffstat (limited to 'embassy-mcxa/src/interrupt.rs')
| -rw-r--r-- | embassy-mcxa/src/interrupt.rs | 41 |
1 files changed, 3 insertions, 38 deletions
diff --git a/embassy-mcxa/src/interrupt.rs b/embassy-mcxa/src/interrupt.rs index be2704454..b662f7ee0 100644 --- a/embassy-mcxa/src/interrupt.rs +++ b/embassy-mcxa/src/interrupt.rs | |||
| @@ -9,7 +9,10 @@ | |||
| 9 | mod generated { | 9 | mod generated { |
| 10 | #[rustfmt::skip] | 10 | #[rustfmt::skip] |
| 11 | embassy_hal_internal::interrupt_mod!( | 11 | embassy_hal_internal::interrupt_mod!( |
| 12 | ADC0, | ||
| 12 | ADC1, | 13 | ADC1, |
| 14 | ADC2, | ||
| 15 | ADC3, | ||
| 13 | DMA_CH0, | 16 | DMA_CH0, |
| 14 | DMA_CH1, | 17 | DMA_CH1, |
| 15 | DMA_CH2, | 18 | DMA_CH2, |
| @@ -281,44 +284,6 @@ impl InterruptExt for Rtc { | |||
| 281 | } | 284 | } |
| 282 | } | 285 | } |
| 283 | 286 | ||
| 284 | pub struct Adc; | ||
| 285 | pub const ADC1: Adc = Adc; | ||
| 286 | |||
| 287 | impl InterruptExt for Adc { | ||
| 288 | /// Clear any pending ADC1 in NVIC. | ||
| 289 | #[inline] | ||
| 290 | fn unpend(&self) { | ||
| 291 | cortex_m::peripheral::NVIC::unpend(Interrupt::ADC1); | ||
| 292 | } | ||
| 293 | |||
| 294 | /// Set NVIC priority for ADC1. | ||
| 295 | #[inline] | ||
| 296 | fn set_priority(&self, priority: Priority) { | ||
| 297 | unsafe { | ||
| 298 | let mut nvic = cortex_m::peripheral::Peripherals::steal().NVIC; | ||
| 299 | nvic.set_priority(Interrupt::ADC1, u8::from(priority)); | ||
| 300 | } | ||
| 301 | } | ||
| 302 | |||
| 303 | /// Enable ADC1 in NVIC. | ||
| 304 | #[inline] | ||
| 305 | unsafe fn enable(&self) { | ||
| 306 | cortex_m::peripheral::NVIC::unmask(Interrupt::ADC1); | ||
| 307 | } | ||
| 308 | |||
| 309 | /// Disable ADC1 in NVIC. | ||
| 310 | #[inline] | ||
| 311 | unsafe fn disable(&self) { | ||
| 312 | cortex_m::peripheral::NVIC::mask(Interrupt::ADC1); | ||
| 313 | } | ||
| 314 | |||
| 315 | /// Check if ADC1 is pending in NVIC. | ||
| 316 | #[inline] | ||
| 317 | fn is_pending(&self) -> bool { | ||
| 318 | cortex_m::peripheral::NVIC::is_pending(Interrupt::ADC1) | ||
| 319 | } | ||
| 320 | } | ||
| 321 | |||
| 322 | pub struct Gpio0; | 287 | pub struct Gpio0; |
| 323 | pub const GPIO0: Gpio0 = Gpio0; | 288 | pub const GPIO0: Gpio0 = Gpio0; |
| 324 | 289 | ||
