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authorJames Munns <[email protected]>2025-12-09 16:01:50 +0100
committerJames Munns <[email protected]>2025-12-09 16:01:50 +0100
commite267cb52d774e8f9db87a9b0cfe63cfa51d4fe8b (patch)
treedf388d63575aa821af648cd86bcbf2ce297bc29f /embassy-mcxa/src
parentaf768af11cf10e0376b34c0e5abfc4f0a56398fc (diff)
rustfmt
Diffstat (limited to 'embassy-mcxa/src')
-rw-r--r--embassy-mcxa/src/adc.rs2
-rw-r--r--embassy-mcxa/src/clkout.rs2
-rw-r--r--embassy-mcxa/src/clocks/periph_helpers.rs6
-rw-r--r--embassy-mcxa/src/dma.rs2
-rw-r--r--embassy-mcxa/src/i2c/controller.rs6
-rw-r--r--embassy-mcxa/src/interrupt.rs2
-rw-r--r--embassy-mcxa/src/lpuart/buffered.rs2
-rw-r--r--embassy-mcxa/src/lpuart/mod.rs8
-rw-r--r--embassy-mcxa/src/ostimer.rs8
9 files changed, 17 insertions, 21 deletions
diff --git a/embassy-mcxa/src/adc.rs b/embassy-mcxa/src/adc.rs
index b5ec5983f..7475299ba 100644
--- a/embassy-mcxa/src/adc.rs
+++ b/embassy-mcxa/src/adc.rs
@@ -4,7 +4,7 @@ use core::sync::atomic::{AtomicBool, Ordering};
4use embassy_hal_internal::{Peri, PeripheralType}; 4use embassy_hal_internal::{Peri, PeripheralType};
5 5
6use crate::clocks::periph_helpers::{AdcClockSel, AdcConfig, Div4}; 6use crate::clocks::periph_helpers::{AdcClockSel, AdcConfig, Div4};
7use crate::clocks::{enable_and_reset, Gate, PoweredClock}; 7use crate::clocks::{Gate, PoweredClock, enable_and_reset};
8use crate::pac; 8use crate::pac;
9use crate::pac::adc1::cfg::{HptExdi, Pwrsel, Refsel, Tcmdres, Tprictrl, Tres}; 9use crate::pac::adc1::cfg::{HptExdi, Pwrsel, Refsel, Tcmdres, Tprictrl, Tres};
10use crate::pac::adc1::cmdh1::{Avgs, Cmpen, Next, Sts}; 10use crate::pac::adc1::cmdh1::{Avgs, Cmpen, Next, Sts};
diff --git a/embassy-mcxa/src/clkout.rs b/embassy-mcxa/src/clkout.rs
index 88c731df1..5b21f24b0 100644
--- a/embassy-mcxa/src/clkout.rs
+++ b/embassy-mcxa/src/clkout.rs
@@ -9,7 +9,7 @@ use core::marker::PhantomData;
9use embassy_hal_internal::Peri; 9use embassy_hal_internal::Peri;
10 10
11pub use crate::clocks::periph_helpers::Div4; 11pub use crate::clocks::periph_helpers::Div4;
12use crate::clocks::{with_clocks, ClockError, PoweredClock}; 12use crate::clocks::{ClockError, PoweredClock, with_clocks};
13use crate::pac::mrcc0::mrcc_clkout_clksel::Mux; 13use crate::pac::mrcc0::mrcc_clkout_clksel::Mux;
14use crate::peripherals::CLKOUT; 14use crate::peripherals::CLKOUT;
15 15
diff --git a/embassy-mcxa/src/clocks/periph_helpers.rs b/embassy-mcxa/src/clocks/periph_helpers.rs
index 1ea7a99ed..fed5e558e 100644
--- a/embassy-mcxa/src/clocks/periph_helpers.rs
+++ b/embassy-mcxa/src/clocks/periph_helpers.rs
@@ -108,11 +108,7 @@ impl Div4 {
108 /// by 1, and `Div4::from_raw(15)` will divide the source by 108 /// by 1, and `Div4::from_raw(15)` will divide the source by
109 /// 16. 109 /// 16.
110 pub const fn from_raw(n: u8) -> Option<Self> { 110 pub const fn from_raw(n: u8) -> Option<Self> {
111 if n > 0b1111 { 111 if n > 0b1111 { None } else { Some(Self(n)) }
112 None
113 } else {
114 Some(Self(n))
115 }
116 } 112 }
117 113
118 /// Store a specific divisor value that will divide the source 114 /// Store a specific divisor value that will divide the source
diff --git a/embassy-mcxa/src/dma.rs b/embassy-mcxa/src/dma.rs
index 7996a45bc..1293f8445 100644
--- a/embassy-mcxa/src/dma.rs
+++ b/embassy-mcxa/src/dma.rs
@@ -104,7 +104,7 @@ use core::future::Future;
104use core::marker::PhantomData; 104use core::marker::PhantomData;
105use core::pin::Pin; 105use core::pin::Pin;
106use core::ptr::NonNull; 106use core::ptr::NonNull;
107use core::sync::atomic::{fence, AtomicUsize, Ordering}; 107use core::sync::atomic::{AtomicUsize, Ordering, fence};
108use core::task::{Context, Poll}; 108use core::task::{Context, Poll};
109 109
110use embassy_hal_internal::PeripheralType; 110use embassy_hal_internal::PeripheralType;
diff --git a/embassy-mcxa/src/i2c/controller.rs b/embassy-mcxa/src/i2c/controller.rs
index 182a53aea..c27d508b0 100644
--- a/embassy-mcxa/src/i2c/controller.rs
+++ b/embassy-mcxa/src/i2c/controller.rs
@@ -3,15 +3,15 @@
3use core::future::Future; 3use core::future::Future;
4use core::marker::PhantomData; 4use core::marker::PhantomData;
5 5
6use embassy_hal_internal::drop::OnDrop;
7use embassy_hal_internal::Peri; 6use embassy_hal_internal::Peri;
7use embassy_hal_internal::drop::OnDrop;
8use mcxa_pac::lpi2c0::mtdr::Cmd; 8use mcxa_pac::lpi2c0::mtdr::Cmd;
9 9
10use super::{Async, Blocking, Error, Instance, InterruptHandler, Mode, Result, SclPin, SdaPin}; 10use super::{Async, Blocking, Error, Instance, InterruptHandler, Mode, Result, SclPin, SdaPin};
11use crate::AnyPin;
11use crate::clocks::periph_helpers::{Div4, Lpi2cClockSel, Lpi2cConfig}; 12use crate::clocks::periph_helpers::{Div4, Lpi2cClockSel, Lpi2cConfig};
12use crate::clocks::{enable_and_reset, PoweredClock}; 13use crate::clocks::{PoweredClock, enable_and_reset};
13use crate::interrupt::typelevel::Interrupt; 14use crate::interrupt::typelevel::Interrupt;
14use crate::AnyPin;
15 15
16/// Bus speed (nominal SCL, no clock stretching) 16/// Bus speed (nominal SCL, no clock stretching)
17#[derive(Clone, Copy, Default, PartialEq)] 17#[derive(Clone, Copy, Default, PartialEq)]
diff --git a/embassy-mcxa/src/interrupt.rs b/embassy-mcxa/src/interrupt.rs
index 1b468c6cf..c960af7a2 100644
--- a/embassy-mcxa/src/interrupt.rs
+++ b/embassy-mcxa/src/interrupt.rs
@@ -40,7 +40,7 @@ mod generated {
40 40
41use core::sync::atomic::{AtomicU16, AtomicU32, Ordering}; 41use core::sync::atomic::{AtomicU16, AtomicU32, Ordering};
42 42
43pub use generated::interrupt::{typelevel, Priority}; 43pub use generated::interrupt::{Priority, typelevel};
44 44
45use crate::pac::Interrupt; 45use crate::pac::Interrupt;
46 46
diff --git a/embassy-mcxa/src/lpuart/buffered.rs b/embassy-mcxa/src/lpuart/buffered.rs
index 8eb443ca7..34fdbb76c 100644
--- a/embassy-mcxa/src/lpuart/buffered.rs
+++ b/embassy-mcxa/src/lpuart/buffered.rs
@@ -3,8 +3,8 @@ use core::marker::PhantomData;
3use core::sync::atomic::{AtomicBool, Ordering}; 3use core::sync::atomic::{AtomicBool, Ordering};
4use core::task::Poll; 4use core::task::Poll;
5 5
6use embassy_hal_internal::atomic_ring_buffer::RingBuffer;
7use embassy_hal_internal::Peri; 6use embassy_hal_internal::Peri;
7use embassy_hal_internal::atomic_ring_buffer::RingBuffer;
8use embassy_sync::waitqueue::AtomicWaker; 8use embassy_sync::waitqueue::AtomicWaker;
9 9
10use super::*; 10use super::*;
diff --git a/embassy-mcxa/src/lpuart/mod.rs b/embassy-mcxa/src/lpuart/mod.rs
index 616c7e7e4..e59ce8140 100644
--- a/embassy-mcxa/src/lpuart/mod.rs
+++ b/embassy-mcxa/src/lpuart/mod.rs
@@ -5,13 +5,13 @@ use embassy_hal_internal::{Peri, PeripheralType};
5use paste::paste; 5use paste::paste;
6 6
7use crate::clocks::periph_helpers::{Div4, LpuartClockSel, LpuartConfig}; 7use crate::clocks::periph_helpers::{Div4, LpuartClockSel, LpuartConfig};
8use crate::clocks::{enable_and_reset, ClockError, Gate, PoweredClock}; 8use crate::clocks::{ClockError, Gate, PoweredClock, enable_and_reset};
9use crate::gpio::SealedPin; 9use crate::gpio::SealedPin;
10use crate::pac::lpuart0::baud::Sbns as StopBits; 10use crate::pac::lpuart0::baud::Sbns as StopBits;
11use crate::pac::lpuart0::ctrl::{Idlecfg as IdleConfig, Ilt as IdleType, Pt as Parity, M as DataBits}; 11use crate::pac::lpuart0::ctrl::{Idlecfg as IdleConfig, Ilt as IdleType, M as DataBits, Pt as Parity};
12use crate::pac::lpuart0::modir::{Txctsc as TxCtsConfig, Txctssrc as TxCtsSource}; 12use crate::pac::lpuart0::modir::{Txctsc as TxCtsConfig, Txctssrc as TxCtsSource};
13use crate::pac::lpuart0::stat::Msbf as MsbFirst; 13use crate::pac::lpuart0::stat::Msbf as MsbFirst;
14use crate::{interrupt, pac, AnyPin}; 14use crate::{AnyPin, interrupt, pac};
15 15
16pub mod buffered; 16pub mod buffered;
17 17
@@ -20,7 +20,7 @@ pub mod buffered;
20// ============================================================================ 20// ============================================================================
21 21
22use crate::dma::{ 22use crate::dma::{
23 Channel as DmaChannelTrait, DmaChannel, DmaRequest, EnableInterrupt, RingBuffer, DMA_MAX_TRANSFER_SIZE, 23 Channel as DmaChannelTrait, DMA_MAX_TRANSFER_SIZE, DmaChannel, DmaRequest, EnableInterrupt, RingBuffer,
24}; 24};
25 25
26// ============================================================================ 26// ============================================================================
diff --git a/embassy-mcxa/src/ostimer.rs b/embassy-mcxa/src/ostimer.rs
index c51812e3d..9e66e82d8 100644
--- a/embassy-mcxa/src/ostimer.rs
+++ b/embassy-mcxa/src/ostimer.rs
@@ -32,7 +32,7 @@ use core::sync::atomic::{AtomicBool, Ordering};
32use embassy_hal_internal::{Peri, PeripheralType}; 32use embassy_hal_internal::{Peri, PeripheralType};
33 33
34use crate::clocks::periph_helpers::{OsTimerConfig, OstimerClockSel}; 34use crate::clocks::periph_helpers::{OsTimerConfig, OstimerClockSel};
35use crate::clocks::{assert_reset, enable_and_reset, is_reset_released, release_reset, Gate, PoweredClock}; 35use crate::clocks::{Gate, PoweredClock, assert_reset, enable_and_reset, is_reset_released, release_reset};
36use crate::interrupt::InterruptExt; 36use crate::interrupt::InterruptExt;
37use crate::pac; 37use crate::pac;
38 38
@@ -521,11 +521,11 @@ pub mod time_driver {
521 use embassy_time_driver as etd; 521 use embassy_time_driver as etd;
522 522
523 use super::{ 523 use super::{
524 bin_to_gray, now_ticks_read, Regs, ALARM_ACTIVE, ALARM_CALLBACK, ALARM_FLAG, ALARM_TARGET_TIME, 524 ALARM_ACTIVE, ALARM_CALLBACK, ALARM_FLAG, ALARM_TARGET_TIME, EVTIMER_HI_MASK, EVTIMER_HI_SHIFT,
525 EVTIMER_HI_MASK, EVTIMER_HI_SHIFT, LOW_32_BIT_MASK, 525 LOW_32_BIT_MASK, Regs, bin_to_gray, now_ticks_read,
526 }; 526 };
527 use crate::clocks::periph_helpers::{OsTimerConfig, OstimerClockSel}; 527 use crate::clocks::periph_helpers::{OsTimerConfig, OstimerClockSel};
528 use crate::clocks::{enable_and_reset, PoweredClock}; 528 use crate::clocks::{PoweredClock, enable_and_reset};
529 use crate::pac; 529 use crate::pac;
530 530
531 #[allow(non_camel_case_types)] 531 #[allow(non_camel_case_types)]