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authorMathis Deroo <[email protected]>2025-12-08 10:01:20 -0800
committerMathis Deroo <[email protected]>2025-12-09 10:52:09 -0800
commitf20e4225ddd03f89dc48835355eeff5c2143038a (patch)
treee2bbd09d887f3acf05f8ecbff8e6bf7d80e1f7d7 /embassy-mcxa/src
parent1ccf45058db4e77ac2c59357cab196b659201b63 (diff)
Run cargo fmt
Signed-off-by: Mathis Deroo <[email protected]>
Diffstat (limited to 'embassy-mcxa/src')
-rw-r--r--embassy-mcxa/src/adc.rs58
1 files changed, 23 insertions, 35 deletions
diff --git a/embassy-mcxa/src/adc.rs b/embassy-mcxa/src/adc.rs
index 2e2fb0342..1e3a6952a 100644
--- a/embassy-mcxa/src/adc.rs
+++ b/embassy-mcxa/src/adc.rs
@@ -3,11 +3,11 @@ use core::marker::PhantomData;
3 3
4use embassy_hal_internal::{Peri, PeripheralType}; 4use embassy_hal_internal::{Peri, PeripheralType};
5 5
6use paste::paste;
7use crate::pac;
8use crate::interrupt::typelevel::{Handler, Interrupt};
9use crate::gpio::{GpioPin, SealedPin}; 6use crate::gpio::{GpioPin, SealedPin};
7use crate::interrupt::typelevel::{Handler, Interrupt};
8use crate::pac;
10use maitake_sync::WaitCell; 9use maitake_sync::WaitCell;
10use paste::paste;
11 11
12use crate::clocks::periph_helpers::{AdcClockSel, AdcConfig, Div4}; 12use crate::clocks::periph_helpers::{AdcClockSel, AdcConfig, Div4};
13use crate::clocks::{Gate, PoweredClock, enable_and_reset}; 13use crate::clocks::{Gate, PoweredClock, enable_and_reset};
@@ -42,8 +42,8 @@ pub enum TriggerPriorityPolicy {
42/// Configuration for the LPADC peripheral. 42/// Configuration for the LPADC peripheral.
43#[derive(Debug, Clone, Copy, PartialEq, Eq)] 43#[derive(Debug, Clone, Copy, PartialEq, Eq)]
44pub struct LpadcConfig { 44pub struct LpadcConfig {
45 /// Control system transition to Stop and Wait power modes while ADC is converting. 45 /// Control system transition to Stop and Wait power modes while ADC is converting.
46 /// When enabled in Doze mode, immediate entries to Wait or Stop are allowed. 46 /// When enabled in Doze mode, immediate entries to Wait or Stop are allowed.
47 /// When disabled, the ADC will wait for the current averaging iteration/FIFO storage to complete before acknowledging stop or wait mode entry. 47 /// When disabled, the ADC will wait for the current averaging iteration/FIFO storage to complete before acknowledging stop or wait mode entry.
48 pub enable_in_doze_mode: bool, 48 pub enable_in_doze_mode: bool,
49 /// Auto-Calibration Averages. 49 /// Auto-Calibration Averages.
@@ -58,14 +58,14 @@ pub struct LpadcConfig {
58 pub power_level_mode: Pwrsel, 58 pub power_level_mode: Pwrsel,
59 /// Trigger priority policy for handling multiple triggers 59 /// Trigger priority policy for handling multiple triggers
60 pub trigger_priority_policy: TriggerPriorityPolicy, 60 pub trigger_priority_policy: TriggerPriorityPolicy,
61 /// Enables the ADC pausing function. When enabled, a programmable delay is inserted during command execution sequencing between LOOP iterations, 61 /// Enables the ADC pausing function. When enabled, a programmable delay is inserted during command execution sequencing between LOOP iterations,
62 /// between commands in a sequence, and between conversions when command is executing in "Compare Until True" configuration. 62 /// between commands in a sequence, and between conversions when command is executing in "Compare Until True" configuration.
63 pub enable_conv_pause: bool, 63 pub enable_conv_pause: bool,
64 /// Controls the duration of pausing during command execution sequencing. The pause delay is a count of (convPauseDelay*4) ADCK cycles. 64 /// Controls the duration of pausing during command execution sequencing. The pause delay is a count of (convPauseDelay*4) ADCK cycles.
65 /// Only available when ADC pausing function is enabled. The available value range is in 9-bit. 65 /// Only available when ADC pausing function is enabled. The available value range is in 9-bit.
66 pub conv_pause_delay: u16, 66 pub conv_pause_delay: u16,
67 /// FIFO watermark level for interrupt generation. 67 /// FIFO watermark level for interrupt generation.
68 /// When the number of datawords stored in the ADC Result FIFO is greater than the value in this field, 68 /// When the number of datawords stored in the ADC Result FIFO is greater than the value in this field,
69 /// the ready flag would be asserted to indicate stored data has reached the programmable threshold. 69 /// the ready flag would be asserted to indicate stored data has reached the programmable threshold.
70 pub fifo_watermark: u8, 70 pub fifo_watermark: u8,
71 /// Power configuration (normal/deep sleep behavior) 71 /// Power configuration (normal/deep sleep behavior)
@@ -115,7 +115,6 @@ pub struct ConvCommandConfig {
115 pub enable_wait_trigger: bool, 115 pub enable_wait_trigger: bool,
116} 116}
117 117
118
119/// Configuration for a conversion trigger. 118/// Configuration for a conversion trigger.
120/// 119///
121/// Defines how a trigger initiates ADC conversions. 120/// Defines how a trigger initiates ADC conversions.
@@ -166,7 +165,7 @@ impl<'a, I: Instance> Adc<'a, I> {
166 165
167 I::Interrupt::unpend(); 166 I::Interrupt::unpend();
168 unsafe { I::Interrupt::enable() }; 167 unsafe { I::Interrupt::enable() };
169 168
170 adc 169 adc
171 } 170 }
172 171
@@ -176,20 +175,12 @@ impl<'a, I: Instance> Adc<'a, I> {
176 /// * `_inst` - ADC peripheral instance 175 /// * `_inst` - ADC peripheral instance
177 /// * `pin` - GPIO pin to use for ADC input 176 /// * `pin` - GPIO pin to use for ADC input
178 /// * `config` - ADC configuration 177 /// * `config` - ADC configuration
179 pub fn new_polling( 178 pub fn new_polling(_inst: Peri<'a, I>, pin: Peri<'a, impl AdcPin<I>>, config: LpadcConfig) -> Self {
180 _inst: Peri<'a, I>,
181 pin: Peri<'a, impl AdcPin<I>>,
182 config: LpadcConfig,
183 ) -> Self {
184 Self::new_inner(_inst, pin, config) 179 Self::new_inner(_inst, pin, config)
185 } 180 }
186 181
187 /// Internal initialization function shared by `new` and `new_polling`. 182 /// Internal initialization function shared by `new` and `new_polling`.
188 fn new_inner( 183 fn new_inner(_inst: Peri<'a, I>, pin: Peri<'a, impl AdcPin<I>>, config: LpadcConfig) -> Self {
189 _inst: Peri<'a, I>,
190 pin: Peri<'a, impl AdcPin<I>>,
191 config: LpadcConfig,
192 ) -> Self {
193 let adc = &*I::ptr(); 184 let adc = &*I::ptr();
194 185
195 let _clock_freq = unsafe { 186 let _clock_freq = unsafe {
@@ -284,9 +275,7 @@ impl<'a, I: Instance> Adc<'a, I> {
284 // Enable ADC 275 // Enable ADC
285 adc.ctrl().modify(|_, w| w.adcen().enabled()); 276 adc.ctrl().modify(|_, w| w.adcen().enabled());
286 277
287 Self { 278 Self { _inst: PhantomData }
288 _inst: PhantomData,
289 }
290 } 279 }
291 280
292 /// Deinitialize the ADC peripheral. 281 /// Deinitialize the ADC peripheral.
@@ -565,7 +554,6 @@ trait SealedInstance {
565 fn ptr() -> &'static pac::adc0::RegisterBlock; 554 fn ptr() -> &'static pac::adc0::RegisterBlock;
566} 555}
567 556
568
569/// ADC Instance 557/// ADC Instance
570#[allow(private_bounds)] 558#[allow(private_bounds)]
571pub trait Instance: SealedInstance + PeripheralType + Gate<MrccPeriphConfig = AdcConfig> { 559pub trait Instance: SealedInstance + PeripheralType + Gate<MrccPeriphConfig = AdcConfig> {
@@ -600,17 +588,17 @@ pub trait AdcPin<Instance>: GpioPin + sealed::Sealed + PeripheralType {
600} 588}
601 589
602macro_rules! impl_pin { 590macro_rules! impl_pin {
603 ($pin:ident, $peri:ident, $func:ident, $trait:ident) => { 591 ($pin:ident, $peri:ident, $func:ident, $trait:ident) => {
604 impl $trait<crate::peripherals::$peri> for crate::peripherals::$pin { 592 impl $trait<crate::peripherals::$peri> for crate::peripherals::$pin {
605 fn mux(&self) { 593 fn mux(&self) {
606 self.set_pull(crate::gpio::Pull::Disabled); 594 self.set_pull(crate::gpio::Pull::Disabled);
607 self.set_slew_rate(crate::gpio::SlewRate::Fast.into()); 595 self.set_slew_rate(crate::gpio::SlewRate::Fast.into());
608 self.set_drive_strength(crate::gpio::DriveStrength::Normal.into()); 596 self.set_drive_strength(crate::gpio::DriveStrength::Normal.into());
609 self.set_function(crate::pac::port0::pcr0::Mux::$func); 597 self.set_function(crate::pac::port0::pcr0::Mux::$func);
610 }
611 } 598 }
612 }; 599 }
613 } 600 };
601}
614 602
615impl_pin!(P2_0, ADC0, Mux0, AdcPin); 603impl_pin!(P2_0, ADC0, Mux0, AdcPin);
616impl_pin!(P2_4, ADC0, Mux0, AdcPin); 604impl_pin!(P2_4, ADC0, Mux0, AdcPin);