mspm0: add MSPM0G518x support and new packages for others

G518x is the first MSPM0 part with a USB, I2S and NPU peripheral. There is also a new TIMB peripheral (no PWM, so it is perfect for a time driver).

Unfortunately it also introduces UNICOMM which is a shared peripheral which can be in UART/I2C/SPI modes. This means that the current UART and I2C drivers need some adjustment to work with the new UNICOMM parts (which is the future).

1 files changed, 44 insertions, 8 deletions

diff --git a/embassy-mspm0/build.rs b/embassy-mspm0/build.rs
index 0fe056c4e..ac40adbdf 100644
--- a/embassy-mspm0/build.rs
+++ b/embassy-mspm0/build.rs
@@ -31,7 +31,7 @@ fn generate_code(cfgs: &mut CfgSet) {
         PathBuf::from(env::var_os("OUT_DIR").unwrap()).display(),
     );
 
-    cfgs.declare_all(&["gpio_pb", "gpio_pc", "int_group1"]);
+    cfgs.declare_all(&["gpio_pb", "gpio_pc", "int_group1", "unicomm"]);
 
     let chip_name = match env::vars()
         .map(|(a, _)| a)
@@ -116,6 +116,10 @@ fn get_chip_cfgs(chip_name: &str) -> Vec<String> {
         cfgs.push("mspm0g351x".to_string());
     }
 
+    if chip_name.starts_with("mspm0g518") {
+        cfgs.push("mspm0g518x".to_string());
+    }
+
     if chip_name.starts_with("mspm0h321") {
         cfgs.push("mspm0h321x".to_string());
     }
@@ -300,6 +304,15 @@ fn get_singletons(cfgs: &mut common::CfgSet) -> Vec<Singleton> {
             // by the HAL.
             "iomux" | "cpuss" => true,
 
+            // Unicomm instances get their own singletons, but we need to enable a cfg for unicomm drivers.
+            "unicomm" => {
+                cfgs.enable("unicomm");
+                false
+            }
+
+            // TODO: Remove after TIMB is fixed
+            "tim" if peripheral.name.starts_with("TIMB") => true,
+
             _ => false,
         };
 
@@ -423,6 +436,8 @@ fn time_driver(singletons: &mut Vec<Singleton>, cfgs: &mut CfgSet) {
     // Verify the selected timer is available
     let selected_timer = match time_driver.as_ref().map(|x| x.as_ref()) {
         None => "",
+        // TODO: Fix TIMB0
+        // Some("timb0") => "TIMB0",
         Some("timg0") => "TIMG0",
         Some("timg1") => "TIMG1",
         Some("timg2") => "TIMG2",
@@ -440,16 +455,17 @@ fn time_driver(singletons: &mut Vec<Singleton>, cfgs: &mut CfgSet) {
         Some("tima1") => "TIMA1",
         Some("any") => {
             // Order of timer candidates:
-            // 1. 16-bit, 2 channel
-            // 2. 16-bit, 2 channel with shadow registers
-            // 3. 16-bit, 4 channel
-            // 4. 16-bit with QEI
-            // 5. Advanced timers
+            // 1. Basic timers
+            // 2. 16-bit, 2 channel
+            // 3. 16-bit, 2 channel with shadow registers
+            // 4. 16-bit, 4 channel
+            // 5. 16-bit with QEI
+            // 6. Advanced timers
             //
-            // TODO: Select RTC first if available
             // TODO: 32-bit timers are not considered yet
             [
-                // 16-bit, 2 channel
+                // basic timers. No PWM pins
+                // "TIMB0", // 16-bit, 2 channel
                 "TIMG0", "TIMG1", "TIMG2", "TIMG3", // 16-bit, 2 channel with shadow registers
                 "TIMG4", "TIMG5", "TIMG6", "TIMG7",  // 16-bit, 4 channel
                 "TIMG14", // 16-bit with QEI
@@ -519,6 +535,8 @@ fn generate_timers() -> TokenStream {
         .peripherals
         .iter()
         .filter(|p| p.name.starts_with("TIM"))
+        // TODO: Fix TIMB when used at time driver.
+        .filter(|p| !p.name.starts_with("TIMB"))
         .map(|peripheral| {
             let name = Ident::new(&peripheral.name, Span::call_site());
             let timers = &*TIMERS;
@@ -730,6 +748,24 @@ struct TimerDesc {
 const TIMERS: LazyLock<HashMap<String, TimerDesc>> = LazyLock::new(|| {
     let mut map = HashMap::new();
     map.insert(
+        "TIMB0".into(),
+        TimerDesc {
+            bits: 16,
+            prescaler: true,
+            repeat_counter: false,
+            ccp_channels_internal: 2,
+            ccp_channels_external: 2,
+            external_pwm_channels: 0,
+            phase_load: false,
+            shadow_load: false,
+            shadow_ccs: false,
+            deadband: false,
+            fault_handler: false,
+            qei_hall: false,
+        },
+    );
+
+    map.insert(
         "TIMG0".into(),
         TimerDesc {
             bits: 16,