Merge pull request #3966 from i509VCB/mspm0-init

Embassy for MSPM0

1 files changed, 48 insertions, 0 deletions

diff --git a/embassy-mspm0/src/timer.rs b/embassy-mspm0/src/timer.rs
new file mode 100644
index 000000000..4441e5640
--- /dev/null
+++ b/embassy-mspm0/src/timer.rs
@@ -0,0 +1,48 @@
+#![macro_use]
+
+/// Amount of bits of a timer.
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+pub enum TimerBits {
+    /// 16 bits.
+    Bits16,
+    /// 32 bits.
+    Bits32,
+}
+
+#[allow(private_bounds)]
+pub trait Timer: SealedTimer + 'static {
+    /// Amount of bits this timer has.
+    const BITS: TimerBits;
+}
+
+pub(crate) trait SealedTimer {
+    /// Registers for this timer.
+    ///
+    /// This is a raw pointer to the register block. The actual register block layout varies depending on the
+    /// timer type.
+    fn regs() -> *mut ();
+
+    /// Enable the interrupt corresponding to this timer.
+    unsafe fn enable_interrupt();
+}
+
+macro_rules! impl_timer {
+    ($name: ident, $bits: ident) => {
+        impl crate::timer::SealedTimer for crate::peripherals::$name {
+            fn regs() -> *mut () {
+                crate::pac::$name.as_ptr()
+            }
+
+            unsafe fn enable_interrupt() {
+                use embassy_hal_internal::interrupt::InterruptExt;
+                crate::interrupt::$name.unpend();
+                crate::interrupt::$name.enable();
+            }
+        }
+
+        impl crate::timer::Timer for crate::peripherals::$name {
+            const BITS: crate::timer::TimerBits = crate::timer::TimerBits::$bits;
+        }
+    };
+}