mspm0: add mspm0h321x support

This also changes selection of GPIO interrupt type to be calculated by the buildscript. H321x is yet another exception with GPIOB being a physical interrupt rather than part of an interrupt group.

H3215/6 are true 5V parts. I wonder if that is a first for an embassy hal

2 files changed, 13 insertions, 8 deletions

diff --git a/embassy-mspm0/src/gpio.rs b/embassy-mspm0/src/gpio.rs
index 13da4f30b..d8eb42dc2 100644
--- a/embassy-mspm0/src/gpio.rs
+++ b/embassy-mspm0/src/gpio.rs
@@ -10,7 +10,7 @@ use embassy_sync::waitqueue::AtomicWaker;
 
 use crate::pac::gpio::vals::*;
 use crate::pac::gpio::{self};
-#[cfg(all(feature = "rt", any(mspm0c110x, mspm0c1105_c1106, mspm0l110x)))]
+#[cfg(all(feature = "rt", any(gpioa_interrupt, gpiob_interrupt)))]
 use crate::pac::interrupt;
 use crate::pac::{self};
 
@@ -1110,16 +1110,21 @@ fn irq_handler(gpio: gpio::Gpio, wakers: &[AtomicWaker; 32]) {
     }
 }
 
+#[cfg(all(gpioa_interrupt, gpioa_group))]
+compile_error!("gpioa_interrupt and gpioa_group are mutually exclusive cfgs");
+#[cfg(all(gpiob_interrupt, gpiob_group))]
+compile_error!("gpiob_interrupt and gpiob_group are mutually exclusive cfgs");
+
 // C110x and L110x have a dedicated interrupts just for GPIOA.
 //
 // These chips do not have a GROUP1 interrupt.
-#[cfg(all(feature = "rt", any(mspm0c110x, mspm0c1105_c1106, mspm0l110x)))]
+#[cfg(all(feature = "rt", gpioa_interrupt))]
 #[interrupt]
 fn GPIOA() {
     irq_handler(pac::GPIOA, &PORTA_WAKERS);
 }
 
-#[cfg(all(feature = "rt", mspm0c1105_c1106))]
+#[cfg(all(feature = "rt", gpiob_interrupt))]
 #[interrupt]
 fn GPIOB() {
     irq_handler(pac::GPIOB, &PORTB_WAKERS);
@@ -1129,21 +1134,21 @@ fn GPIOB() {
 //
 // Defining these as no_mangle is required so that the linker will pick these over the default handler.
 
-#[cfg(all(feature = "rt", not(any(mspm0c110x, mspm0c1105_c1106, mspm0l110x))))]
+#[cfg(all(feature = "rt", gpioa_group))]
 #[unsafe(no_mangle)]
 #[allow(non_snake_case)]
 fn GPIOA() {
     irq_handler(pac::GPIOA, &PORTA_WAKERS);
 }
 
-#[cfg(all(feature = "rt", gpio_pb, not(mspm0c1105_c1106)))]
+#[cfg(all(feature = "rt", gpiob_group))]
 #[unsafe(no_mangle)]
 #[allow(non_snake_case)]
 fn GPIOB() {
     irq_handler(pac::GPIOB, &PORTB_WAKERS);
 }
 
-#[cfg(all(feature = "rt", gpio_pc))]
+#[cfg(all(feature = "rt", gpioc_group))]
 #[allow(non_snake_case)]
 #[unsafe(no_mangle)]
 fn GPIOC() {
diff --git a/embassy-mspm0/src/i2c.rs b/embassy-mspm0/src/i2c.rs
index a12b4b4a2..192527dd2 100644
--- a/embassy-mspm0/src/i2c.rs
+++ b/embassy-mspm0/src/i2c.rs
@@ -206,8 +206,8 @@ impl Config {
     }
 
     #[cfg(any(
-        mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x, mspm0l110x, mspm0l122x, mspm0l130x,
-        mspm0l134x, mspm0l222x
+        mspm0g110x, mspm0g150x, mspm0g151x, mspm0g310x, mspm0g350x, mspm0g351x, mspm0h321x, mspm0l110x, mspm0l122x,
+        mspm0l130x, mspm0l134x, mspm0l222x
     ))]
     fn calculate_clock_source(&self) -> u32 {
         // Assume that BusClk has default value.