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authorDario Nieuwenhuis <[email protected]>2023-08-18 15:44:52 +0200
committerDario Nieuwenhuis <[email protected]>2023-08-18 15:44:52 +0200
commit3ebb93e47d47095f35d561cd49f0797a74061465 (patch)
treedae9836b99a39f7fd72728a99997e58419d27885 /embassy-net-enc28j60
parent5329f234ba950fdde6f04c239f8f9f172e4a3afa (diff)
net-enc28j60: remove useless 1ms sleep.
Diffstat (limited to 'embassy-net-enc28j60')
-rw-r--r--embassy-net-enc28j60/src/lib.rs2
1 files changed, 0 insertions, 2 deletions
diff --git a/embassy-net-enc28j60/src/lib.rs b/embassy-net-enc28j60/src/lib.rs
index 09e77bafd..e958e7e31 100644
--- a/embassy-net-enc28j60/src/lib.rs
+++ b/embassy-net-enc28j60/src/lib.rs
@@ -381,8 +381,6 @@ where
381 } 381 }
382 382
383 fn read_phy_register(&mut self, register: phy::Register) -> u16 { 383 fn read_phy_register(&mut self, register: phy::Register) -> u16 {
384 embassy_time::block_for(Duration::from_millis(1));
385
386 // set PHY register address 384 // set PHY register address
387 self.write_control_register(bank2::Register::MIREGADR, register.addr()); 385 self.write_control_register(bank2::Register::MIREGADR, register.addr());
388 386