nrf: port to chiptool-based `nrf-pac`.

2 files changed, 39 insertions, 42 deletions

diff --git a/embassy-net-nrf91/Cargo.toml b/embassy-net-nrf91/Cargo.toml
index 07a0c8886..98356c1ba 100644
--- a/embassy-net-nrf91/Cargo.toml
+++ b/embassy-net-nrf91/Cargo.toml
@@ -17,7 +17,8 @@ log = [ "dep:log" ]
 defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }
 
-nrf9160-pac = { version = "0.12.0" }
+nrf-pac = { git = "https://github.com/embassy-rs/nrf-pac", rev = "875a29629cc1c87aae00cfea647a956b3807d8be" }
+cortex-m = "0.7.7"
 
 embassy-time = { version = "0.3.1", path = "../embassy-time" }
 embassy-sync = { version = "0.6.0", path = "../embassy-sync"}
diff --git a/embassy-net-nrf91/src/lib.rs b/embassy-net-nrf91/src/lib.rs
index 60cdc38c6..80d08f7f5 100644
--- a/embassy-net-nrf91/src/lib.rs
+++ b/embassy-net-nrf91/src/lib.rs
@@ -17,12 +17,12 @@ use core::slice;
 use core::sync::atomic::{compiler_fence, fence, Ordering};
 use core::task::{Poll, Waker};
 
+use cortex_m::peripheral::NVIC;
 use embassy_sync::blocking_mutex::raw::NoopRawMutex;
 use embassy_sync::pipe;
 use embassy_sync::waitqueue::{AtomicWaker, WakerRegistration};
 use heapless::Vec;
-use pac::NVIC;
-use {embassy_net_driver_channel as ch, nrf9160_pac as pac};
+use {embassy_net_driver_channel as ch, nrf_pac as pac};
 
 const RX_SIZE: usize = 8 * 1024;
 const TRACE_SIZE: usize = 16 * 1024;
@@ -38,11 +38,9 @@ static WAKER: AtomicWaker = AtomicWaker::new();
 
 /// Call this function on IPC IRQ
 pub fn on_ipc_irq() {
-    let ipc = unsafe { &*pac::IPC_NS::ptr() };
-
     trace!("irq");
 
-    ipc.inten.write(|w| w);
+    pac::IPC_NS.inten().write(|_| ());
     WAKER.wake();
 }
 
@@ -135,22 +133,21 @@ async fn new_internal<'a>(
         "shmem must be in the lower 128kb of RAM"
     );
 
-    let spu = unsafe { &*pac::SPU_S::ptr() };
+    let spu = pac::SPU_S;
     debug!("Setting IPC RAM as nonsecure...");
     let region_start = (shmem_ptr as usize - 0x2000_0000) / SPU_REGION_SIZE;
     let region_end = region_start + shmem_len / SPU_REGION_SIZE;
     for i in region_start..region_end {
-        spu.ramregion[i].perm.write(|w| {
-            w.execute().set_bit();
-            w.write().set_bit();
-            w.read().set_bit();
-            w.secattr().clear_bit();
-            w.lock().clear_bit();
-            w
+        spu.ramregion(i).perm().write(|w| {
+            w.set_execute(true);
+            w.set_write(true);
+            w.set_read(true);
+            w.set_secattr(false);
+            w.set_lock(false);
         })
     }
 
-    spu.periphid[42].perm.write(|w| w.secattr().non_secure());
+    spu.periphid(42).perm().write(|w| w.set_secattr(false));
 
     let mut alloc = Allocator {
         start: shmem_ptr,
@@ -158,8 +155,8 @@ async fn new_internal<'a>(
         _phantom: PhantomData,
     };
 
-    let ipc = unsafe { &*pac::IPC_NS::ptr() };
-    let power = unsafe { &*pac::POWER_S::ptr() };
+    let ipc = pac::IPC_NS;
+    let power = pac::POWER_S;
 
     let cb: &mut ControlBlock = alloc.alloc().write(unsafe { mem::zeroed() });
     let rx = alloc.alloc_bytes(RX_SIZE);
@@ -177,20 +174,20 @@ async fn new_internal<'a>(
     cb.trace.base = trace.as_mut_ptr() as _;
     cb.trace.size = TRACE_SIZE;
 
-    ipc.gpmem[0].write(|w| unsafe { w.bits(cb as *mut _ as u32) });
-    ipc.gpmem[1].write(|w| unsafe { w.bits(0) });
+    ipc.gpmem(0).write_value(cb as *mut _ as u32);
+    ipc.gpmem(1).write_value(0);
 
     // connect task/event i to channel i
     for i in 0..8 {
-        ipc.send_cnf[i].write(|w| unsafe { w.bits(1 << i) });
-        ipc.receive_cnf[i].write(|w| unsafe { w.bits(1 << i) });
+        ipc.send_cnf(i).write(|w| w.0 = 1 << i);
+        ipc.receive_cnf(i).write(|w| w.0 = 1 << i);
     }
 
     compiler_fence(Ordering::SeqCst);
 
     // POWER.LTEMODEM.STARTN = 0
     // The reg is missing in the PAC??
-    let startn = unsafe { (power as *const _ as *mut u32).add(0x610 / 4) };
+    let startn = unsafe { (power.as_ptr() as *mut u32).add(0x610 / 4) };
     unsafe { startn.write_volatile(0) }
 
     unsafe { NVIC::unmask(pac::Interrupt::IPC) };
@@ -322,15 +319,15 @@ struct StateInner {
 impl StateInner {
     fn poll(&mut self, trace_writer: &mut Option<TraceWriter<'_>>, ch: &mut ch::Runner<MTU>) {
         trace!("poll!");
-        let ipc = unsafe { &*pac::IPC_NS::ptr() };
+        let ipc = pac::IPC_NS;
 
-        if ipc.events_receive[0].read().bits() != 0 {
-            ipc.events_receive[0].reset();
+        if ipc.events_receive(0).read() != 0 {
+            ipc.events_receive(0).write_value(0);
             trace!("ipc 0");
         }
 
-        if ipc.events_receive[2].read().bits() != 0 {
-            ipc.events_receive[2].reset();
+        if ipc.events_receive(2).read() != 0 {
+            ipc.events_receive(2).write_value(0);
             trace!("ipc 2");
 
             if !self.init {
@@ -353,8 +350,8 @@ impl StateInner {
             }
         }
 
-        if ipc.events_receive[4].read().bits() != 0 {
-            ipc.events_receive[4].reset();
+        if ipc.events_receive(4).read() != 0 {
+            ipc.events_receive(4).write_value(0);
             trace!("ipc 4");
 
             loop {
@@ -368,13 +365,13 @@ impl StateInner {
             }
         }
 
-        if ipc.events_receive[6].read().bits() != 0 {
-            ipc.events_receive[6].reset();
+        if ipc.events_receive(6).read() != 0 {
+            ipc.events_receive(6).write_value(0);
             trace!("ipc 6");
         }
 
-        if ipc.events_receive[7].read().bits() != 0 {
-            ipc.events_receive[7].reset();
+        if ipc.events_receive(7).read() != 0 {
+            ipc.events_receive(7).write_value(0);
             trace!("ipc 7: trace");
 
             let msg = unsafe { addr_of!((*self.cb).trace.rx_state).read_volatile() };
@@ -437,13 +434,12 @@ impl StateInner {
             }
         }
 
-        ipc.intenset.write(|w| {
-            w.receive0().set_bit();
-            w.receive2().set_bit();
-            w.receive4().set_bit();
-            w.receive6().set_bit();
-            w.receive7().set_bit();
-            w
+        ipc.intenset().write(|w| {
+            w.set_receive0(true);
+            w.set_receive2(true);
+            w.set_receive4(true);
+            w.set_receive6(true);
+            w.set_receive7(true);
         });
     }
 
@@ -546,8 +542,8 @@ impl StateInner {
         unsafe { addr_of_mut!((*list_item).state).write_volatile((self.tx_seq_no as u32) << 16 | 0x01) }
         self.tx_seq_no = self.tx_seq_no.wrapping_add(1);
 
-        let ipc = unsafe { &*pac::IPC_NS::ptr() };
-        ipc.tasks_send[ipc_ch].write(|w| unsafe { w.bits(1) });
+        let ipc = pac::IPC_NS;
+        ipc.tasks_send(ipc_ch).write_value(1);
         Ok(())
     }