diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-02-01 00:48:33 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-02-01 01:17:41 +0100 |
| commit | b5cf332cc076a0de11ce6a0563a2235c9e57eb5c (patch) | |
| tree | ce14e014dfbe8c3764040d7f9f1ffee84ab5747b /embassy-nrf/src/buffered_uarte.rs | |
| parent | ca10fe7135d10084e38038f3cd433da39e505bea (diff) | |
nrf: docs.
Diffstat (limited to 'embassy-nrf/src/buffered_uarte.rs')
| -rw-r--r-- | embassy-nrf/src/buffered_uarte.rs | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs index ea25236f0..112f084c1 100644 --- a/embassy-nrf/src/buffered_uarte.rs +++ b/embassy-nrf/src/buffered_uarte.rs | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | //! Async buffered UART | 1 | //! Async buffered UART driver. |
| 2 | //! | 2 | //! |
| 3 | //! WARNING!!! The functionality provided here is intended to be used only | 3 | //! WARNING!!! The functionality provided here is intended to be used only |
| 4 | //! in situations where hardware flow control are available i.e. CTS and RTS. | 4 | //! in situations where hardware flow control are available i.e. CTS and RTS. |
| @@ -69,7 +69,7 @@ struct StateInner<'d, U: UarteInstance, T: TimerInstance> { | |||
| 69 | tx_waker: WakerRegistration, | 69 | tx_waker: WakerRegistration, |
| 70 | } | 70 | } |
| 71 | 71 | ||
| 72 | /// Interface to a UARTE instance | 72 | /// Buffered UARTE driver. |
| 73 | pub struct BufferedUarte<'d, U: UarteInstance, T: TimerInstance> { | 73 | pub struct BufferedUarte<'d, U: UarteInstance, T: TimerInstance> { |
| 74 | inner: RefCell<PeripheralMutex<'d, StateInner<'d, U, T>>>, | 74 | inner: RefCell<PeripheralMutex<'d, StateInner<'d, U, T>>>, |
| 75 | } | 75 | } |
| @@ -199,6 +199,9 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { | |||
| 199 | }); | 199 | }); |
| 200 | } | 200 | } |
| 201 | 201 | ||
| 202 | /// Split the UART in reader and writer parts. | ||
| 203 | /// | ||
| 204 | /// This allows reading and writing concurrently from independent tasks. | ||
| 202 | pub fn split<'u>(&'u mut self) -> (BufferedUarteRx<'u, 'd, U, T>, BufferedUarteTx<'u, 'd, U, T>) { | 205 | pub fn split<'u>(&'u mut self) -> (BufferedUarteRx<'u, 'd, U, T>, BufferedUarteTx<'u, 'd, U, T>) { |
| 203 | (BufferedUarteRx { inner: self }, BufferedUarteTx { inner: self }) | 206 | (BufferedUarteRx { inner: self }, BufferedUarteTx { inner: self }) |
| 204 | } | 207 | } |
| @@ -320,10 +323,12 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { | |||
| 320 | } | 323 | } |
| 321 | } | 324 | } |
| 322 | 325 | ||
| 326 | /// Reader part of the buffered UARTE driver. | ||
| 323 | pub struct BufferedUarteTx<'u, 'd, U: UarteInstance, T: TimerInstance> { | 327 | pub struct BufferedUarteTx<'u, 'd, U: UarteInstance, T: TimerInstance> { |
| 324 | inner: &'u BufferedUarte<'d, U, T>, | 328 | inner: &'u BufferedUarte<'d, U, T>, |
| 325 | } | 329 | } |
| 326 | 330 | ||
| 331 | /// Writer part of the buffered UARTE driver. | ||
| 327 | pub struct BufferedUarteRx<'u, 'd, U: UarteInstance, T: TimerInstance> { | 332 | pub struct BufferedUarteRx<'u, 'd, U: UarteInstance, T: TimerInstance> { |
| 328 | inner: &'u BufferedUarte<'d, U, T>, | 333 | inner: &'u BufferedUarte<'d, U, T>, |
| 329 | } | 334 | } |
