diff options
| author | Dario Nieuwenhuis <[email protected]> | 2021-01-06 22:48:54 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2021-01-06 22:48:54 +0100 |
| commit | deb3c9389202c2e98e092ba7ea9b16f39af006d2 (patch) | |
| tree | f2dcdeb3b30bdba3251f508238eeb799badef8c6 /embassy-nrf/src/buffered_uarte.rs | |
| parent | 77bdb5428ee47c50fc1cd24aa9005494a6f37e12 (diff) | |
Simpliify PeripheralMutex a bit.
Diffstat (limited to 'embassy-nrf/src/buffered_uarte.rs')
| -rw-r--r-- | embassy-nrf/src/buffered_uarte.rs | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs index 030fecf87..ceb52916f 100644 --- a/embassy-nrf/src/buffered_uarte.rs +++ b/embassy-nrf/src/buffered_uarte.rs | |||
| @@ -61,7 +61,7 @@ struct State<'a, U: Instance> { | |||
| 61 | /// - nrf52832: Section 15.2 | 61 | /// - nrf52832: Section 15.2 |
| 62 | /// - nrf52840: Section 6.1.2 | 62 | /// - nrf52840: Section 6.1.2 |
| 63 | pub struct BufferedUarte<'a, U: Instance> { | 63 | pub struct BufferedUarte<'a, U: Instance> { |
| 64 | inner: PeripheralMutex<U::Interrupt, State<'a, U>>, | 64 | inner: PeripheralMutex<State<'a, U>>, |
| 65 | } | 65 | } |
| 66 | 66 | ||
| 67 | impl<'a, U: Instance> Unpin for BufferedUarte<'a, U> {} | 67 | impl<'a, U: Instance> Unpin for BufferedUarte<'a, U> {} |
| @@ -143,7 +143,6 @@ impl<'a, U: Instance> BufferedUarte<'a, U> { | |||
| 143 | 143 | ||
| 144 | BufferedUarte { | 144 | BufferedUarte { |
| 145 | inner: PeripheralMutex::new( | 145 | inner: PeripheralMutex::new( |
| 146 | irq, | ||
| 147 | State { | 146 | State { |
| 148 | inner: uarte, | 147 | inner: uarte, |
| 149 | 148 | ||
| @@ -155,11 +154,12 @@ impl<'a, U: Instance> BufferedUarte<'a, U> { | |||
| 155 | tx_state: TxState::Idle, | 154 | tx_state: TxState::Idle, |
| 156 | tx_waker: WakerRegistration::new(), | 155 | tx_waker: WakerRegistration::new(), |
| 157 | }, | 156 | }, |
| 157 | irq, | ||
| 158 | ), | 158 | ), |
| 159 | } | 159 | } |
| 160 | } | 160 | } |
| 161 | 161 | ||
| 162 | fn inner(self: Pin<&mut Self>) -> Pin<&mut PeripheralMutex<U::Interrupt, State<'a, U>>> { | 162 | fn inner(self: Pin<&mut Self>) -> Pin<&mut PeripheralMutex<State<'a, U>>> { |
| 163 | unsafe { Pin::new_unchecked(&mut self.get_unchecked_mut().inner) } | 163 | unsafe { Pin::new_unchecked(&mut self.get_unchecked_mut().inner) } |
| 164 | } | 164 | } |
| 165 | } | 165 | } |
| @@ -173,7 +173,7 @@ impl<'a, U: Instance> Drop for BufferedUarte<'a, U> { | |||
| 173 | 173 | ||
| 174 | impl<'a, U: Instance> AsyncBufRead for BufferedUarte<'a, U> { | 174 | impl<'a, U: Instance> AsyncBufRead for BufferedUarte<'a, U> { |
| 175 | fn poll_fill_buf(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> { | 175 | fn poll_fill_buf(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> { |
| 176 | self.inner().with(|_irq, state| { | 176 | self.inner().with(|state, _irq| { |
| 177 | // Conservative compiler fence to prevent optimizations that do not | 177 | // Conservative compiler fence to prevent optimizations that do not |
| 178 | // take in to account actions by DMA. The fence has been placed here, | 178 | // take in to account actions by DMA. The fence has been placed here, |
| 179 | // before any DMA action has started | 179 | // before any DMA action has started |
| @@ -203,7 +203,7 @@ impl<'a, U: Instance> AsyncBufRead for BufferedUarte<'a, U> { | |||
| 203 | } | 203 | } |
| 204 | 204 | ||
| 205 | fn consume(self: Pin<&mut Self>, amt: usize) { | 205 | fn consume(self: Pin<&mut Self>, amt: usize) { |
| 206 | self.inner().with(|irq, state| { | 206 | self.inner().with(|state, irq| { |
| 207 | trace!("consume {:?}", amt); | 207 | trace!("consume {:?}", amt); |
| 208 | state.rx.pop(amt); | 208 | state.rx.pop(amt); |
| 209 | irq.pend(); | 209 | irq.pend(); |
| @@ -213,7 +213,7 @@ impl<'a, U: Instance> AsyncBufRead for BufferedUarte<'a, U> { | |||
| 213 | 213 | ||
| 214 | impl<'a, U: Instance> AsyncWrite for BufferedUarte<'a, U> { | 214 | impl<'a, U: Instance> AsyncWrite for BufferedUarte<'a, U> { |
| 215 | fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> { | 215 | fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> { |
| 216 | self.inner().with(|irq, state| { | 216 | self.inner().with(|state, irq| { |
| 217 | trace!("poll_write: {:?}", buf.len()); | 217 | trace!("poll_write: {:?}", buf.len()); |
| 218 | 218 | ||
| 219 | let tx_buf = state.tx.push_buf(); | 219 | let tx_buf = state.tx.push_buf(); |
| @@ -242,6 +242,8 @@ impl<'a, U: Instance> AsyncWrite for BufferedUarte<'a, U> { | |||
| 242 | } | 242 | } |
| 243 | 243 | ||
| 244 | impl<'a, U: Instance> PeripheralState for State<'a, U> { | 244 | impl<'a, U: Instance> PeripheralState for State<'a, U> { |
| 245 | type Interrupt = U::Interrupt; | ||
| 246 | |||
| 245 | fn on_interrupt(&mut self) { | 247 | fn on_interrupt(&mut self) { |
| 246 | trace!("irq: start"); | 248 | trace!("irq: start"); |
| 247 | let mut more_work = true; | 249 | let mut more_work = true; |
