diff options
| author | Liam Murphy <[email protected]> | 2021-06-29 10:33:41 +1000 |
|---|---|---|
| committer | Liam Murphy <[email protected]> | 2021-06-29 10:33:41 +1000 |
| commit | e7addf094b4d2cfed32ff3728e1d3d816430cf07 (patch) | |
| tree | 26e4e610312fec75d1c43030e0746bc93340af2a /embassy-nrf/src/buffered_uarte.rs | |
| parent | 02781ed744b6e76d3790844f898235088b0fd8aa (diff) | |
Fix `Cc::wait` never resolving and refactor some APIs
I think the interrupt was getting immediately re-triggered as soon as the handler exited, so I disabled the interrupt in the handler.
Diffstat (limited to 'embassy-nrf/src/buffered_uarte.rs')
| -rw-r--r-- | embassy-nrf/src/buffered_uarte.rs | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs index 39a8cd887..a5a37b982 100644 --- a/embassy-nrf/src/buffered_uarte.rs +++ b/embassy-nrf/src/buffered_uarte.rs | |||
| @@ -82,7 +82,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { | |||
| 82 | 82 | ||
| 83 | let r = U::regs(); | 83 | let r = U::regs(); |
| 84 | 84 | ||
| 85 | let timer = Timer::new_irqless(timer); | 85 | let mut timer = Timer::new_irqless(timer); |
| 86 | 86 | ||
| 87 | rxd.conf().write(|w| w.input().connect().drive().h0h1()); | 87 | rxd.conf().write(|w| w.input().connect().drive().h0h1()); |
| 88 | r.psel.rxd.write(|w| unsafe { w.bits(rxd.psel_bits()) }); | 88 | r.psel.rxd.write(|w| unsafe { w.bits(rxd.psel_bits()) }); |
| @@ -137,9 +137,9 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { | |||
| 137 | let timeout = 0x8000_0000 / (config.baudrate as u32 / 40); | 137 | let timeout = 0x8000_0000 / (config.baudrate as u32 / 40); |
| 138 | 138 | ||
| 139 | timer.set_frequency(Frequency::F16MHz); | 139 | timer.set_frequency(Frequency::F16MHz); |
| 140 | timer.cc0().set(timeout); | 140 | timer.cc(0).write(timeout); |
| 141 | timer.cc0().short_compare_clear(); | 141 | timer.cc(0).short_compare_clear(); |
| 142 | timer.cc0().short_compare_stop(); | 142 | timer.cc(0).short_compare_stop(); |
| 143 | 143 | ||
| 144 | let mut ppi_ch1 = Ppi::new(ppi_ch1.degrade_configurable()); | 144 | let mut ppi_ch1 = Ppi::new(ppi_ch1.degrade_configurable()); |
| 145 | ppi_ch1.set_event(Event::from_reg(&r.events_rxdrdy)); | 145 | ppi_ch1.set_event(Event::from_reg(&r.events_rxdrdy)); |
| @@ -148,7 +148,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { | |||
| 148 | ppi_ch1.enable(); | 148 | ppi_ch1.enable(); |
| 149 | 149 | ||
| 150 | let mut ppi_ch2 = Ppi::new(ppi_ch2.degrade_configurable()); | 150 | let mut ppi_ch2 = Ppi::new(ppi_ch2.degrade_configurable()); |
| 151 | ppi_ch2.set_event(timer.cc0().event_compare()); | 151 | ppi_ch2.set_event(timer.cc(0).event_compare()); |
| 152 | ppi_ch2.set_task(Task::from_reg(&r.tasks_stoprx)); | 152 | ppi_ch2.set_task(Task::from_reg(&r.tasks_stoprx)); |
| 153 | ppi_ch2.enable(); | 153 | ppi_ch2.enable(); |
| 154 | 154 | ||
| @@ -180,7 +180,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { | |||
| 180 | let r = U::regs(); | 180 | let r = U::regs(); |
| 181 | 181 | ||
| 182 | let timeout = 0x8000_0000 / (baudrate as u32 / 40); | 182 | let timeout = 0x8000_0000 / (baudrate as u32 / 40); |
| 183 | state.timer.cc0().set(timeout); | 183 | state.timer.cc(0).write(timeout); |
| 184 | state.timer.clear(); | 184 | state.timer.clear(); |
| 185 | 185 | ||
| 186 | r.baudrate.write(|w| w.baudrate().variant(baudrate)); | 186 | r.baudrate.write(|w| w.baudrate().variant(baudrate)); |
