diff options
| author | goueslati <[email protected]> | 2023-06-12 14:27:53 +0100 |
|---|---|---|
| committer | goueslati <[email protected]> | 2023-06-12 14:27:53 +0100 |
| commit | 2d89cfb18f00aefbfa108728dfea3398e80ea3e4 (patch) | |
| tree | 6485dacac7e61c4378ac522e709edb0a86bd7523 /embassy-nrf/src/chips/nrf52810.rs | |
| parent | 2dd5ce83ec0421564e85b667f5dabd592f313e5c (diff) | |
| parent | ab86b060500ceda1c80e39f35af69cb08a7b63a2 (diff) | |
fix merge conflict
Diffstat (limited to 'embassy-nrf/src/chips/nrf52810.rs')
| -rw-r--r-- | embassy-nrf/src/chips/nrf52810.rs | 62 |
1 files changed, 29 insertions, 33 deletions
diff --git a/embassy-nrf/src/chips/nrf52810.rs b/embassy-nrf/src/chips/nrf52810.rs index 153795e54..5519e8953 100644 --- a/embassy-nrf/src/chips/nrf52810.rs +++ b/embassy-nrf/src/chips/nrf52810.rs | |||
| @@ -234,36 +234,32 @@ impl_saadc_input!(P0_29, ANALOG_INPUT5); | |||
| 234 | impl_saadc_input!(P0_30, ANALOG_INPUT6); | 234 | impl_saadc_input!(P0_30, ANALOG_INPUT6); |
| 235 | impl_saadc_input!(P0_31, ANALOG_INPUT7); | 235 | impl_saadc_input!(P0_31, ANALOG_INPUT7); |
| 236 | 236 | ||
| 237 | pub mod irqs { | 237 | embassy_hal_common::interrupt_mod!( |
| 238 | use embassy_cortex_m::interrupt::_export::declare; | 238 | POWER_CLOCK, |
| 239 | 239 | RADIO, | |
| 240 | use crate::pac::Interrupt as InterruptEnum; | 240 | UARTE0_UART0, |
| 241 | 241 | TWIM0_TWIS0_TWI0, | |
| 242 | declare!(POWER_CLOCK); | 242 | SPIM0_SPIS0_SPI0, |
| 243 | declare!(RADIO); | 243 | GPIOTE, |
| 244 | declare!(UARTE0_UART0); | 244 | SAADC, |
| 245 | declare!(TWIM0_TWIS0_TWI0); | 245 | TIMER0, |
| 246 | declare!(SPIM0_SPIS0_SPI0); | 246 | TIMER1, |
| 247 | declare!(GPIOTE); | 247 | TIMER2, |
| 248 | declare!(SAADC); | 248 | RTC0, |
| 249 | declare!(TIMER0); | 249 | TEMP, |
| 250 | declare!(TIMER1); | 250 | RNG, |
| 251 | declare!(TIMER2); | 251 | ECB, |
| 252 | declare!(RTC0); | 252 | CCM_AAR, |
| 253 | declare!(TEMP); | 253 | WDT, |
| 254 | declare!(RNG); | 254 | RTC1, |
| 255 | declare!(ECB); | 255 | QDEC, |
| 256 | declare!(CCM_AAR); | 256 | COMP, |
| 257 | declare!(WDT); | 257 | SWI0_EGU0, |
| 258 | declare!(RTC1); | 258 | SWI1_EGU1, |
| 259 | declare!(QDEC); | 259 | SWI2, |
| 260 | declare!(COMP); | 260 | SWI3, |
| 261 | declare!(SWI0_EGU0); | 261 | SWI4, |
| 262 | declare!(SWI1_EGU1); | 262 | SWI5, |
| 263 | declare!(SWI2); | 263 | PWM0, |
| 264 | declare!(SWI3); | 264 | PDM, |
| 265 | declare!(SWI4); | 265 | ); |
| 266 | declare!(SWI5); | ||
| 267 | declare!(PWM0); | ||
| 268 | declare!(PDM); | ||
| 269 | } | ||
