diff options
| author | Dion Dokter <[email protected]> | 2021-10-12 11:43:57 +0200 |
|---|---|---|
| committer | Dion Dokter <[email protected]> | 2021-10-12 11:55:38 +0200 |
| commit | 2c2c284482ee57595ad4eef542f4867f6f87bf12 (patch) | |
| tree | 68a5fac20355ad7451a4e10d82f396573942e7f8 /embassy-nrf/src/chips/nrf9160.rs | |
| parent | 995cd01cbcb2470b9ecdd953daae0cfb3aaa2e99 (diff) | |
Undoing unnecessary changes
Diffstat (limited to 'embassy-nrf/src/chips/nrf9160.rs')
| -rw-r--r-- | embassy-nrf/src/chips/nrf9160.rs | 75 |
1 files changed, 44 insertions, 31 deletions
diff --git a/embassy-nrf/src/chips/nrf9160.rs b/embassy-nrf/src/chips/nrf9160.rs index 1086c73c1..42053d081 100644 --- a/embassy-nrf/src/chips/nrf9160.rs +++ b/embassy-nrf/src/chips/nrf9160.rs | |||
| @@ -1,7 +1,32 @@ | |||
| 1 | pub use nrf9160_pac as pac; | 1 | #[allow(unused_imports)] |
| 2 | pub mod pac { | ||
| 3 | // The nRF9160 has a secure and non-secure (NS) mode. | ||
| 4 | // For now we only support the NS mode, but those peripherals have `_ns` appended to them. | ||
| 5 | // To avoid cfg spam, weŕe going to rename the ones we use here. | ||
| 6 | #[rustfmt::skip] | ||
| 7 | pub(crate) use nrf9160_pac::{ | ||
| 8 | p0_ns as p0, | ||
| 9 | pwm0_ns as pwm0, | ||
| 10 | rtc0_ns as rtc0, | ||
| 11 | spim0_ns as spim0, | ||
| 12 | timer0_ns as timer0, | ||
| 13 | twim0_ns as twim0, | ||
| 14 | uarte0_ns as uarte0, | ||
| 15 | DPPIC_NS as PPI, | ||
| 16 | GPIOTE1_NS as GPIOTE, | ||
| 17 | P0_NS as P0, | ||
| 18 | RTC1_NS as RTC1, | ||
| 19 | WDT_NS as WDT, | ||
| 20 | saadc_ns as saadc, | ||
| 21 | SAADC_NS as SAADC, | ||
| 22 | CLOCK_NS as CLOCK, | ||
| 23 | }; | ||
| 24 | |||
| 25 | pub use nrf9160_pac::*; | ||
| 26 | } | ||
| 2 | 27 | ||
| 3 | /// The maximum buffer size that the EasyDMA can send/recv in one operation. | 28 | /// The maximum buffer size that the EasyDMA can send/recv in one operation. |
| 4 | pub const EASY_DMA_SIZE: usize = (1 << 12) - 1; | 29 | pub const EASY_DMA_SIZE: usize = (1 << 13) - 1; |
| 5 | pub const FORCE_COPY_BUFFER_SIZE: usize = 1024; | 30 | pub const FORCE_COPY_BUFFER_SIZE: usize = 1024; |
| 6 | 31 | ||
| 7 | embassy_hal_common::peripherals! { | 32 | embassy_hal_common::peripherals! { |
| @@ -12,23 +37,11 @@ embassy_hal_common::peripherals! { | |||
| 12 | // WDT | 37 | // WDT |
| 13 | WDT, | 38 | WDT, |
| 14 | 39 | ||
| 15 | // UARTE | 40 | // UARTE, TWI & SPI |
| 16 | UARTE0, | 41 | UARTETWISPI0, |
| 17 | UARTE1, | 42 | UARTETWISPI1, |
| 18 | UARTE2, | 43 | UARTETWISPI2, |
| 19 | UARTE3, | 44 | UARTETWISPI3, |
| 20 | |||
| 21 | // TWI | ||
| 22 | TWI0, | ||
| 23 | TWI1, | ||
| 24 | TWI2, | ||
| 25 | TWI3, | ||
| 26 | |||
| 27 | // SPI | ||
| 28 | SPI0, | ||
| 29 | SPI1, | ||
| 30 | SPI2, | ||
| 31 | SPI3, | ||
| 32 | 45 | ||
| 33 | // SAADC | 46 | // SAADC |
| 34 | SAADC, | 47 | SAADC, |
| @@ -114,20 +127,20 @@ embassy_hal_common::peripherals! { | |||
| 114 | P0_31, | 127 | P0_31, |
| 115 | } | 128 | } |
| 116 | 129 | ||
| 117 | impl_uarte!(UARTE0, UARTE0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); | 130 | impl_uarte!(UARTETWISPI0, UARTE0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); |
| 118 | impl_uarte!(UARTE1, UARTE1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); | 131 | impl_uarte!(UARTETWISPI1, UARTE1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); |
| 119 | impl_uarte!(UARTE2, UARTE2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); | 132 | impl_uarte!(UARTETWISPI2, UARTE2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); |
| 120 | impl_uarte!(UARTE3, UARTE3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); | 133 | impl_uarte!(UARTETWISPI3, UARTE3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); |
| 121 | 134 | ||
| 122 | impl_spim!(SPI0, SPIM0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); | 135 | impl_spim!(UARTETWISPI0, SPIM0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); |
| 123 | impl_spim!(SPI1, SPIM1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); | 136 | impl_spim!(UARTETWISPI1, SPIM1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); |
| 124 | impl_spim!(SPI2, SPIM2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); | 137 | impl_spim!(UARTETWISPI2, SPIM2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); |
| 125 | impl_spim!(SPI3, SPIM3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); | 138 | impl_spim!(UARTETWISPI3, SPIM3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); |
| 126 | 139 | ||
| 127 | impl_twim!(TWI0, TWIM0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); | 140 | impl_twim!(UARTETWISPI0, TWIM0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); |
| 128 | impl_twim!(TWI1, TWIM1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); | 141 | impl_twim!(UARTETWISPI1, TWIM1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); |
| 129 | impl_twim!(TWI2, TWIM2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); | 142 | impl_twim!(UARTETWISPI2, TWIM2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); |
| 130 | impl_twim!(TWI3, TWIM3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); | 143 | impl_twim!(UARTETWISPI3, TWIM3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); |
| 131 | 144 | ||
| 132 | impl_pwm!(PWM0, PWM0_NS, PWM0); | 145 | impl_pwm!(PWM0, PWM0_NS, PWM0); |
| 133 | impl_pwm!(PWM1, PWM1_NS, PWM1); | 146 | impl_pwm!(PWM1, PWM1_NS, PWM1); |
