nrf: remove mod sealed.

1 files changed, 39 insertions, 43 deletions

diff --git a/embassy-nrf/src/gpio.rs b/embassy-nrf/src/gpio.rs
index f2353f21d..7b272dca0 100644
--- a/embassy-nrf/src/gpio.rs
+++ b/embassy-nrf/src/gpio.rs
@@ -7,7 +7,6 @@ use core::hint::unreachable_unchecked;
 use cfg_if::cfg_if;
 use embassy_hal_internal::{impl_peripheral, into_ref, PeripheralRef};
 
-use self::sealed::Pin as _;
 #[cfg(feature = "nrf51")]
 use crate::pac::gpio;
 #[cfg(feature = "nrf51")]
@@ -361,59 +360,56 @@ impl<'d> Drop for Flex<'d> {
     }
 }
 
-pub(crate) mod sealed {
-    use super::*;
-
-    pub trait Pin {
-        fn pin_port(&self) -> u8;
+pub(crate) trait SealedPin {
+    fn pin_port(&self) -> u8;
 
-        #[inline]
-        fn _pin(&self) -> u8 {
-            cfg_if! {
-                if #[cfg(feature = "_gpio-p1")] {
-                    self.pin_port() % 32
-                } else {
-                    self.pin_port()
-                }
+    #[inline]
+    fn _pin(&self) -> u8 {
+        cfg_if! {
+            if #[cfg(feature = "_gpio-p1")] {
+                self.pin_port() % 32
+            } else {
+                self.pin_port()
             }
         }
+    }
 
-        #[inline]
-        fn block(&self) -> &gpio::RegisterBlock {
-            unsafe {
-                match self.pin_port() / 32 {
-                    #[cfg(feature = "nrf51")]
-                    0 => &*pac::GPIO::ptr(),
-                    #[cfg(not(feature = "nrf51"))]
-                    0 => &*pac::P0::ptr(),
-                    #[cfg(feature = "_gpio-p1")]
-                    1 => &*pac::P1::ptr(),
-                    _ => unreachable_unchecked(),
-                }
+    #[inline]
+    fn block(&self) -> &gpio::RegisterBlock {
+        unsafe {
+            match self.pin_port() / 32 {
+                #[cfg(feature = "nrf51")]
+                0 => &*pac::GPIO::ptr(),
+                #[cfg(not(feature = "nrf51"))]
+                0 => &*pac::P0::ptr(),
+                #[cfg(feature = "_gpio-p1")]
+                1 => &*pac::P1::ptr(),
+                _ => unreachable_unchecked(),
             }
         }
+    }
 
-        #[inline]
-        fn conf(&self) -> &gpio::PIN_CNF {
-            &self.block().pin_cnf[self._pin() as usize]
-        }
+    #[inline]
+    fn conf(&self) -> &gpio::PIN_CNF {
+        &self.block().pin_cnf[self._pin() as usize]
+    }
 
-        /// Set the output as high.
-        #[inline]
-        fn set_high(&self) {
-            unsafe { self.block().outset.write(|w| w.bits(1u32 << self._pin())) }
-        }
+    /// Set the output as high.
+    #[inline]
+    fn set_high(&self) {
+        unsafe { self.block().outset.write(|w| w.bits(1u32 << self._pin())) }
+    }
 
-        /// Set the output as low.
-        #[inline]
-        fn set_low(&self) {
-            unsafe { self.block().outclr.write(|w| w.bits(1u32 << self._pin())) }
-        }
+    /// Set the output as low.
+    #[inline]
+    fn set_low(&self) {
+        unsafe { self.block().outclr.write(|w| w.bits(1u32 << self._pin())) }
     }
 }
 
 /// Interface for a Pin that can be configured by an [Input] or [Output] driver, or converted to an [AnyPin].
-pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + sealed::Pin + Sized + 'static {
+#[allow(private_bounds)]
+pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + SealedPin + Sized + 'static {
     /// Number of the pin within the port (0..31)
     #[inline]
     fn pin(&self) -> u8 {
@@ -464,7 +460,7 @@ impl AnyPin {
 
 impl_peripheral!(AnyPin);
 impl Pin for AnyPin {}
-impl sealed::Pin for AnyPin {
+impl SealedPin for AnyPin {
     #[inline]
     fn pin_port(&self) -> u8 {
         self.pin_port
@@ -502,7 +498,7 @@ pub(crate) fn deconfigure_pin(psel_bits: u32) {
 macro_rules! impl_pin {
     ($type:ident, $port_num:expr, $pin_num:expr) => {
         impl crate::gpio::Pin for peripherals::$type {}
-        impl crate::gpio::sealed::Pin for peripherals::$type {
+        impl crate::gpio::SealedPin for peripherals::$type {
             #[inline]
             fn pin_port(&self) -> u8 {
                 $port_num * 32 + $pin_num