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authorhuntc <[email protected]>2021-12-17 17:06:46 +1100
committerhuntc <[email protected]>2021-12-17 17:06:46 +1100
commit3d8eecff89b80bccb709447df790a5786ee70349 (patch)
treebca2927f347ce7004ab7c868bc45ef1ee405d76c /embassy-nrf/src/uarte.rs
parent23c16903dbd9ff26e930760a0fa5cb39488f8a97 (diff)
Set Uarte log levels to trace
I noticed lots of logging which really slows things down and is not useful outside of a debugging context, hence set to trace.
Diffstat (limited to 'embassy-nrf/src/uarte.rs')
-rw-r--r--embassy-nrf/src/uarte.rs22
1 files changed, 11 insertions, 11 deletions
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs
index 777948198..131d07465 100644
--- a/embassy-nrf/src/uarte.rs
+++ b/embassy-nrf/src/uarte.rs
@@ -213,7 +213,7 @@ impl<'d, T: Instance> Write for UarteTx<'d, T> {
213 let s = T::state(); 213 let s = T::state();
214 214
215 let drop = OnDrop::new(move || { 215 let drop = OnDrop::new(move || {
216 info!("write drop: stopping"); 216 trace!("write drop: stopping");
217 217
218 r.intenclr.write(|w| w.endtx().clear()); 218 r.intenclr.write(|w| w.endtx().clear());
219 r.events_txstopped.reset(); 219 r.events_txstopped.reset();
@@ -221,7 +221,7 @@ impl<'d, T: Instance> Write for UarteTx<'d, T> {
221 221
222 // TX is stopped almost instantly, spinning is fine. 222 // TX is stopped almost instantly, spinning is fine.
223 while r.events_endtx.read().bits() == 0 {} 223 while r.events_endtx.read().bits() == 0 {}
224 info!("write drop: stopped"); 224 trace!("write drop: stopped");
225 }); 225 });
226 226
227 r.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) }); 227 r.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
@@ -255,12 +255,12 @@ impl<'d, T: Instance> Write for UarteTx<'d, T> {
255 255
256impl<'a, T: Instance> Drop for UarteTx<'a, T> { 256impl<'a, T: Instance> Drop for UarteTx<'a, T> {
257 fn drop(&mut self) { 257 fn drop(&mut self) {
258 info!("uarte tx drop"); 258 trace!("uarte tx drop");
259 259
260 let r = T::regs(); 260 let r = T::regs();
261 261
262 let did_stoptx = r.events_txstarted.read().bits() != 0; 262 let did_stoptx = r.events_txstarted.read().bits() != 0;
263 info!("did_stoptx {}", did_stoptx); 263 trace!("did_stoptx {}", did_stoptx);
264 264
265 // Wait for txstopped, if needed. 265 // Wait for txstopped, if needed.
266 while did_stoptx && r.events_txstopped.read().bits() == 0 {} 266 while did_stoptx && r.events_txstopped.read().bits() == 0 {}
@@ -295,7 +295,7 @@ impl<'d, T: Instance> Read for UarteRx<'d, T> {
295 let s = T::state(); 295 let s = T::state();
296 296
297 let drop = OnDrop::new(move || { 297 let drop = OnDrop::new(move || {
298 info!("read drop: stopping"); 298 trace!("read drop: stopping");
299 299
300 r.intenclr.write(|w| w.endrx().clear()); 300 r.intenclr.write(|w| w.endrx().clear());
301 r.events_rxto.reset(); 301 r.events_rxto.reset();
@@ -303,7 +303,7 @@ impl<'d, T: Instance> Read for UarteRx<'d, T> {
303 303
304 while r.events_endrx.read().bits() == 0 {} 304 while r.events_endrx.read().bits() == 0 {}
305 305
306 info!("read drop: stopped"); 306 trace!("read drop: stopped");
307 }); 307 });
308 308
309 r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) }); 309 r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
@@ -337,12 +337,12 @@ impl<'d, T: Instance> Read for UarteRx<'d, T> {
337 337
338impl<'a, T: Instance> Drop for UarteRx<'a, T> { 338impl<'a, T: Instance> Drop for UarteRx<'a, T> {
339 fn drop(&mut self) { 339 fn drop(&mut self) {
340 info!("uarte rx drop"); 340 trace!("uarte rx drop");
341 341
342 let r = T::regs(); 342 let r = T::regs();
343 343
344 let did_stoprx = r.events_rxstarted.read().bits() != 0; 344 let did_stoprx = r.events_rxstarted.read().bits() != 0;
345 info!("did_stoprx {}", did_stoprx); 345 trace!("did_stoprx {}", did_stoprx);
346 346
347 // Wait for rxto, if needed. 347 // Wait for rxto, if needed.
348 while did_stoprx && r.events_rxto.read().bits() == 0 {} 348 while did_stoprx && r.events_rxto.read().bits() == 0 {}
@@ -417,7 +417,7 @@ pub(in crate) fn drop_tx_rx(r: &pac::uarte0::RegisterBlock, s: &sealed::State) {
417 gpio::deconfigure_pin(r.psel.rts.read().bits()); 417 gpio::deconfigure_pin(r.psel.rts.read().bits());
418 gpio::deconfigure_pin(r.psel.cts.read().bits()); 418 gpio::deconfigure_pin(r.psel.cts.read().bits());
419 419
420 info!("uarte tx and rx drop: done"); 420 trace!("uarte tx and rx drop: done");
421 } 421 }
422} 422}
423 423
@@ -512,7 +512,7 @@ impl<'d, U: Instance, T: TimerInstance> ReadUntilIdle for UarteWithIdle<'d, U, T
512 let s = U::state(); 512 let s = U::state();
513 513
514 let drop = OnDrop::new(|| { 514 let drop = OnDrop::new(|| {
515 info!("read drop: stopping"); 515 trace!("read drop: stopping");
516 516
517 self.timer.stop(); 517 self.timer.stop();
518 518
@@ -522,7 +522,7 @@ impl<'d, U: Instance, T: TimerInstance> ReadUntilIdle for UarteWithIdle<'d, U, T
522 522
523 while r.events_endrx.read().bits() == 0 {} 523 while r.events_endrx.read().bits() == 0 {}
524 524
525 info!("read drop: stopped"); 525 trace!("read drop: stopped");
526 }); 526 });
527 527
528 r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) }); 528 r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });