diff options
| author | Dario Nieuwenhuis <[email protected]> | 2022-02-12 01:04:01 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2022-02-12 01:07:02 +0100 |
| commit | 6de02bb23e270141885e24719dc8fbca0bb97feb (patch) | |
| tree | 01d6d2d13c3df50fff429ec06190ef27ac412e3f /embassy-nrf/src/uarte.rs | |
| parent | 5ae4e20f8654bdc129d152b5364b6864457c2e02 (diff) | |
nrf: remove OptionalPin
Diffstat (limited to 'embassy-nrf/src/uarte.rs')
| -rw-r--r-- | embassy-nrf/src/uarte.rs | 120 |
1 files changed, 102 insertions, 18 deletions
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs index b10e55a05..a1c47cff5 100644 --- a/embassy-nrf/src/uarte.rs +++ b/embassy-nrf/src/uarte.rs | |||
| @@ -24,7 +24,7 @@ use futures::future::poll_fn; | |||
| 24 | 24 | ||
| 25 | use crate::chip::EASY_DMA_SIZE; | 25 | use crate::chip::EASY_DMA_SIZE; |
| 26 | use crate::gpio::sealed::Pin as _; | 26 | use crate::gpio::sealed::Pin as _; |
| 27 | use crate::gpio::{self, OptionalPin as GpioOptionalPin, Pin as GpioPin}; | 27 | use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; |
| 28 | use crate::interrupt::Interrupt; | 28 | use crate::interrupt::Interrupt; |
| 29 | use crate::pac; | 29 | use crate::pac; |
| 30 | use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task}; | 30 | use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task}; |
| @@ -80,18 +80,50 @@ pub struct UarteRx<'d, T: Instance> { | |||
| 80 | } | 80 | } |
| 81 | 81 | ||
| 82 | impl<'d, T: Instance> Uarte<'d, T> { | 82 | impl<'d, T: Instance> Uarte<'d, T> { |
| 83 | /// Creates the interface to a UARTE instance. | 83 | /// Create a new UARTE without hardware flow control |
| 84 | /// Sets the baud rate, parity and assigns the pins to the UARTE peripheral. | ||
| 85 | pub fn new( | 84 | pub fn new( |
| 86 | _uarte: impl Unborrow<Target = T> + 'd, | 85 | uarte: impl Unborrow<Target = T> + 'd, |
| 87 | irq: impl Unborrow<Target = T::Interrupt> + 'd, | 86 | irq: impl Unborrow<Target = T::Interrupt> + 'd, |
| 88 | rxd: impl Unborrow<Target = impl GpioPin> + 'd, | 87 | rxd: impl Unborrow<Target = impl GpioPin> + 'd, |
| 89 | txd: impl Unborrow<Target = impl GpioPin> + 'd, | 88 | txd: impl Unborrow<Target = impl GpioPin> + 'd, |
| 90 | cts: impl Unborrow<Target = impl GpioOptionalPin> + 'd, | ||
| 91 | rts: impl Unborrow<Target = impl GpioOptionalPin> + 'd, | ||
| 92 | config: Config, | 89 | config: Config, |
| 93 | ) -> Self { | 90 | ) -> Self { |
| 94 | unborrow!(irq, rxd, txd, cts, rts); | 91 | unborrow!(rxd, txd); |
| 92 | Self::new_inner(uarte, irq, rxd.degrade(), txd.degrade(), None, None, config) | ||
| 93 | } | ||
| 94 | |||
| 95 | /// Create a new UARTE with hardware flow control (RTS/CTS) | ||
| 96 | pub fn new_with_rtscts( | ||
| 97 | uarte: impl Unborrow<Target = T> + 'd, | ||
| 98 | irq: impl Unborrow<Target = T::Interrupt> + 'd, | ||
| 99 | rxd: impl Unborrow<Target = impl GpioPin> + 'd, | ||
| 100 | txd: impl Unborrow<Target = impl GpioPin> + 'd, | ||
| 101 | cts: impl Unborrow<Target = impl GpioPin> + 'd, | ||
| 102 | rts: impl Unborrow<Target = impl GpioPin> + 'd, | ||
| 103 | config: Config, | ||
| 104 | ) -> Self { | ||
| 105 | unborrow!(rxd, txd, cts, rts); | ||
| 106 | Self::new_inner( | ||
| 107 | uarte, | ||
| 108 | irq, | ||
| 109 | rxd.degrade(), | ||
| 110 | txd.degrade(), | ||
| 111 | Some(cts.degrade()), | ||
| 112 | Some(rts.degrade()), | ||
| 113 | config, | ||
| 114 | ) | ||
| 115 | } | ||
| 116 | |||
| 117 | fn new_inner( | ||
| 118 | _uarte: impl Unborrow<Target = T> + 'd, | ||
| 119 | irq: impl Unborrow<Target = T::Interrupt> + 'd, | ||
| 120 | rxd: AnyPin, | ||
| 121 | txd: AnyPin, | ||
| 122 | cts: Option<AnyPin>, | ||
| 123 | rts: Option<AnyPin>, | ||
| 124 | config: Config, | ||
| 125 | ) -> Self { | ||
| 126 | unborrow!(irq); | ||
| 95 | 127 | ||
| 96 | let r = T::regs(); | 128 | let r = T::regs(); |
| 97 | 129 | ||
| @@ -102,19 +134,19 @@ impl<'d, T: Instance> Uarte<'d, T> { | |||
| 102 | txd.conf().write(|w| w.dir().output().drive().h0h1()); | 134 | txd.conf().write(|w| w.dir().output().drive().h0h1()); |
| 103 | r.psel.txd.write(|w| unsafe { w.bits(txd.psel_bits()) }); | 135 | r.psel.txd.write(|w| unsafe { w.bits(txd.psel_bits()) }); |
| 104 | 136 | ||
| 105 | if let Some(pin) = rts.pin_mut() { | 137 | if let Some(pin) = &cts { |
| 106 | pin.set_high(); | 138 | pin.conf().write(|w| w.input().connect().drive().h0h1()); |
| 107 | pin.conf().write(|w| w.dir().output().drive().h0h1()); | ||
| 108 | } | 139 | } |
| 109 | r.psel.cts.write(|w| unsafe { w.bits(cts.psel_bits()) }); | 140 | r.psel.cts.write(|w| unsafe { w.bits(cts.psel_bits()) }); |
| 110 | 141 | ||
| 111 | if let Some(pin) = cts.pin_mut() { | 142 | if let Some(pin) = &rts { |
| 112 | pin.conf().write(|w| w.input().connect().drive().h0h1()); | 143 | pin.set_high(); |
| 144 | pin.conf().write(|w| w.dir().output().drive().h0h1()); | ||
| 113 | } | 145 | } |
| 114 | r.psel.rts.write(|w| unsafe { w.bits(rts.psel_bits()) }); | 146 | r.psel.rts.write(|w| unsafe { w.bits(rts.psel_bits()) }); |
| 115 | 147 | ||
| 116 | // Configure | 148 | // Configure |
| 117 | let hardware_flow_control = match (rts.pin().is_some(), cts.pin().is_some()) { | 149 | let hardware_flow_control = match (rts.is_some(), cts.is_some()) { |
| 118 | (false, false) => false, | 150 | (false, false) => false, |
| 119 | (true, true) => true, | 151 | (true, true) => true, |
| 120 | _ => panic!("RTS and CTS pins must be either both set or none set."), | 152 | _ => panic!("RTS and CTS pins must be either both set or none set."), |
| @@ -491,8 +523,7 @@ pub struct UarteWithIdle<'d, U: Instance, T: TimerInstance> { | |||
| 491 | } | 523 | } |
| 492 | 524 | ||
| 493 | impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> { | 525 | impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> { |
| 494 | /// Creates the interface to a UARTE instance. | 526 | /// Create a new UARTE without hardware flow control |
| 495 | /// Sets the baud rate, parity and assigns the pins to the UARTE peripheral. | ||
| 496 | pub fn new( | 527 | pub fn new( |
| 497 | uarte: impl Unborrow<Target = U> + 'd, | 528 | uarte: impl Unborrow<Target = U> + 'd, |
| 498 | timer: impl Unborrow<Target = T> + 'd, | 529 | timer: impl Unborrow<Target = T> + 'd, |
| @@ -501,12 +532,65 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> { | |||
| 501 | irq: impl Unborrow<Target = U::Interrupt> + 'd, | 532 | irq: impl Unborrow<Target = U::Interrupt> + 'd, |
| 502 | rxd: impl Unborrow<Target = impl GpioPin> + 'd, | 533 | rxd: impl Unborrow<Target = impl GpioPin> + 'd, |
| 503 | txd: impl Unborrow<Target = impl GpioPin> + 'd, | 534 | txd: impl Unborrow<Target = impl GpioPin> + 'd, |
| 504 | cts: impl Unborrow<Target = impl GpioOptionalPin> + 'd, | 535 | config: Config, |
| 505 | rts: impl Unborrow<Target = impl GpioOptionalPin> + 'd, | 536 | ) -> Self { |
| 537 | unborrow!(rxd, txd); | ||
| 538 | Self::new_inner( | ||
| 539 | uarte, | ||
| 540 | timer, | ||
| 541 | ppi_ch1, | ||
| 542 | ppi_ch2, | ||
| 543 | irq, | ||
| 544 | rxd.degrade(), | ||
| 545 | txd.degrade(), | ||
| 546 | None, | ||
| 547 | None, | ||
| 548 | config, | ||
| 549 | ) | ||
| 550 | } | ||
| 551 | |||
| 552 | /// Create a new UARTE with hardware flow control (RTS/CTS) | ||
| 553 | pub fn new_with_rtscts( | ||
| 554 | uarte: impl Unborrow<Target = U> + 'd, | ||
| 555 | timer: impl Unborrow<Target = T> + 'd, | ||
| 556 | ppi_ch1: impl Unborrow<Target = impl ConfigurableChannel + 'd> + 'd, | ||
| 557 | ppi_ch2: impl Unborrow<Target = impl ConfigurableChannel + 'd> + 'd, | ||
| 558 | irq: impl Unborrow<Target = U::Interrupt> + 'd, | ||
| 559 | rxd: impl Unborrow<Target = impl GpioPin> + 'd, | ||
| 560 | txd: impl Unborrow<Target = impl GpioPin> + 'd, | ||
| 561 | cts: impl Unborrow<Target = impl GpioPin> + 'd, | ||
| 562 | rts: impl Unborrow<Target = impl GpioPin> + 'd, | ||
| 563 | config: Config, | ||
| 564 | ) -> Self { | ||
| 565 | unborrow!(rxd, txd, cts, rts); | ||
| 566 | Self::new_inner( | ||
| 567 | uarte, | ||
| 568 | timer, | ||
| 569 | ppi_ch1, | ||
| 570 | ppi_ch2, | ||
| 571 | irq, | ||
| 572 | rxd.degrade(), | ||
| 573 | txd.degrade(), | ||
| 574 | Some(cts.degrade()), | ||
| 575 | Some(rts.degrade()), | ||
| 576 | config, | ||
| 577 | ) | ||
| 578 | } | ||
| 579 | |||
| 580 | fn new_inner( | ||
| 581 | uarte: impl Unborrow<Target = U> + 'd, | ||
| 582 | timer: impl Unborrow<Target = T> + 'd, | ||
| 583 | ppi_ch1: impl Unborrow<Target = impl ConfigurableChannel + 'd> + 'd, | ||
| 584 | ppi_ch2: impl Unborrow<Target = impl ConfigurableChannel + 'd> + 'd, | ||
| 585 | irq: impl Unborrow<Target = U::Interrupt> + 'd, | ||
| 586 | rxd: AnyPin, | ||
| 587 | txd: AnyPin, | ||
| 588 | cts: Option<AnyPin>, | ||
| 589 | rts: Option<AnyPin>, | ||
| 506 | config: Config, | 590 | config: Config, |
| 507 | ) -> Self { | 591 | ) -> Self { |
| 508 | let baudrate = config.baudrate; | 592 | let baudrate = config.baudrate; |
| 509 | let uarte = Uarte::new(uarte, irq, rxd, txd, cts, rts, config); | 593 | let uarte = Uarte::new_inner(uarte, irq, rxd, txd, cts, rts, config); |
| 510 | let mut timer = Timer::new(timer); | 594 | let mut timer = Timer::new(timer); |
| 511 | 595 | ||
| 512 | unborrow!(ppi_ch1, ppi_ch2); | 596 | unborrow!(ppi_ch1, ppi_ch2); |
