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authoralexmoon <[email protected]>2022-04-06 22:10:18 -0400
committeralexmoon <[email protected]>2022-04-07 10:51:26 -0400
commit6abbfa9a92ec9feb03e30846bccb66272020601d (patch)
tree78ab2f5f6ccbb45e108520395252f0e6b45665a2 /embassy-nrf/src
parenta1754ac8a820d9cae97cf214969faf3090b37c76 (diff)
Async-ify Driver::enable and UsbDeviceBuilder::build
Diffstat (limited to 'embassy-nrf/src')
-rw-r--r--embassy-nrf/src/usb.rs58
1 files changed, 35 insertions, 23 deletions
diff --git a/embassy-nrf/src/usb.rs b/embassy-nrf/src/usb.rs
index b5e173078..0fcbe025d 100644
--- a/embassy-nrf/src/usb.rs
+++ b/embassy-nrf/src/usb.rs
@@ -140,6 +140,7 @@ impl<'d, T: Instance> driver::Driver<'d> for Driver<'d, T> {
140 type EndpointIn = Endpoint<'d, T, In>; 140 type EndpointIn = Endpoint<'d, T, In>;
141 type ControlPipe = ControlPipe<'d, T>; 141 type ControlPipe = ControlPipe<'d, T>;
142 type Bus = Bus<'d, T>; 142 type Bus = Bus<'d, T>;
143 type EnableFuture = impl Future<Output = Self::Bus> + 'd;
143 144
144 fn alloc_endpoint_in( 145 fn alloc_endpoint_in(
145 &mut self, 146 &mut self,
@@ -191,35 +192,46 @@ impl<'d, T: Instance> driver::Driver<'d> for Driver<'d, T> {
191 }) 192 })
192 } 193 }
193 194
194 fn enable(self) -> Self::Bus { 195 fn enable(self) -> Self::EnableFuture {
195 let regs = T::regs(); 196 async move {
196 197 let regs = T::regs();
197 errata::pre_enable();
198 198
199 regs.enable.write(|w| w.enable().enabled()); 199 errata::pre_enable();
200 200
201 // Wait until the peripheral is ready. 201 regs.enable.write(|w| w.enable().enabled());
202 while !regs.eventcause.read().ready().is_ready() {}
203 regs.eventcause.write(|w| w.ready().set_bit()); // Write 1 to clear.
204 202
205 errata::post_enable(); 203 // Wait until the peripheral is ready.
204 regs.intenset.write(|w| w.usbevent().set_bit());
205 poll_fn(|cx| {
206 BUS_WAKER.register(cx.waker());
207 if regs.eventcause.read().ready().is_ready() {
208 Poll::Ready(())
209 } else {
210 Poll::Pending
211 }
212 })
213 .await;
214 regs.eventcause.write(|w| w.ready().set_bit()); // Write 1 to clear.
206 215
207 unsafe { NVIC::unmask(pac::Interrupt::USBD) }; 216 errata::post_enable();
208 217
209 regs.intenset.write(|w| { 218 unsafe { NVIC::unmask(pac::Interrupt::USBD) };
210 w.usbreset().set_bit();
211 w.usbevent().set_bit();
212 w.epdata().set_bit();
213 w
214 });
215 // Enable the USB pullup, allowing enumeration.
216 regs.usbpullup.write(|w| w.connect().enabled());
217 trace!("enabled");
218 219
219 Bus { 220 regs.intenset.write(|w| {
220 phantom: PhantomData, 221 w.usbreset().set_bit();
221 alloc_in: self.alloc_in, 222 w.usbevent().set_bit();
222 alloc_out: self.alloc_out, 223 w.epdata().set_bit();
224 w
225 });
226 // Enable the USB pullup, allowing enumeration.
227 regs.usbpullup.write(|w| w.connect().enabled());
228 trace!("enabled");
229
230 Bus {
231 phantom: PhantomData,
232 alloc_in: self.alloc_in,
233 alloc_out: self.alloc_out,
234 }
223 } 235 }
224 } 236 }
225} 237}