diff options
| author | huntc <[email protected]> | 2021-12-16 07:16:38 +1100 |
|---|---|---|
| committer | huntc <[email protected]> | 2021-12-16 07:16:38 +1100 |
| commit | bb03b5cc0224732b9d61c5facb37a0917172bfb7 (patch) | |
| tree | 9c1f77b5fc8cdc2128f925327924856cdfbc1c1c /embassy-nrf/src | |
| parent | 2493699fb339b835ad0f8ac403355eae468b73b1 (diff) | |
Too much copy/pasta
The tx permitted reads and the rx permitted writes!
Diffstat (limited to 'embassy-nrf/src')
| -rw-r--r-- | embassy-nrf/src/uarte.rs | 109 |
1 files changed, 0 insertions, 109 deletions
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs index b836395ec..5ebcc8975 100644 --- a/embassy-nrf/src/uarte.rs +++ b/embassy-nrf/src/uarte.rs | |||
| @@ -188,60 +188,6 @@ impl<'d, T: Instance> UarteTx<'d, T> { | |||
| 188 | } | 188 | } |
| 189 | } | 189 | } |
| 190 | 190 | ||
| 191 | impl<'d, T: Instance> Read for UarteTx<'d, T> { | ||
| 192 | #[rustfmt::skip] | ||
| 193 | type ReadFuture<'a> where Self: 'a = impl Future<Output = Result<(), TraitError>> + 'a; | ||
| 194 | |||
| 195 | fn read<'a>(&'a mut self, rx_buffer: &'a mut [u8]) -> Self::ReadFuture<'a> { | ||
| 196 | async move { | ||
| 197 | let ptr = rx_buffer.as_ptr(); | ||
| 198 | let len = rx_buffer.len(); | ||
| 199 | assert!(len <= EASY_DMA_SIZE); | ||
| 200 | |||
| 201 | let r = T::regs(); | ||
| 202 | let s = T::state(); | ||
| 203 | |||
| 204 | let drop = OnDrop::new(move || { | ||
| 205 | info!("read drop: stopping"); | ||
| 206 | |||
| 207 | r.intenclr.write(|w| w.endrx().clear()); | ||
| 208 | r.events_rxto.reset(); | ||
| 209 | r.tasks_stoprx.write(|w| unsafe { w.bits(1) }); | ||
| 210 | |||
| 211 | while r.events_endrx.read().bits() == 0 {} | ||
| 212 | |||
| 213 | info!("read drop: stopped"); | ||
| 214 | }); | ||
| 215 | |||
| 216 | r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) }); | ||
| 217 | r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) }); | ||
| 218 | |||
| 219 | r.events_endrx.reset(); | ||
| 220 | r.intenset.write(|w| w.endrx().set()); | ||
| 221 | |||
| 222 | compiler_fence(Ordering::SeqCst); | ||
| 223 | |||
| 224 | trace!("startrx"); | ||
| 225 | r.tasks_startrx.write(|w| unsafe { w.bits(1) }); | ||
| 226 | |||
| 227 | poll_fn(|cx| { | ||
| 228 | s.endrx_waker.register(cx.waker()); | ||
| 229 | if r.events_endrx.read().bits() != 0 { | ||
| 230 | return Poll::Ready(()); | ||
| 231 | } | ||
| 232 | Poll::Pending | ||
| 233 | }) | ||
| 234 | .await; | ||
| 235 | |||
| 236 | compiler_fence(Ordering::SeqCst); | ||
| 237 | r.events_rxstarted.reset(); | ||
| 238 | drop.defuse(); | ||
| 239 | |||
| 240 | Ok(()) | ||
| 241 | } | ||
| 242 | } | ||
| 243 | } | ||
| 244 | |||
| 245 | impl<'d, T: Instance> Write for UarteTx<'d, T> { | 191 | impl<'d, T: Instance> Write for UarteTx<'d, T> { |
| 246 | #[rustfmt::skip] | 192 | #[rustfmt::skip] |
| 247 | type WriteFuture<'a> where Self: 'a = impl Future<Output = Result<(), TraitError>> + 'a; | 193 | type WriteFuture<'a> where Self: 'a = impl Future<Output = Result<(), TraitError>> + 'a; |
| @@ -377,61 +323,6 @@ impl<'d, T: Instance> Read for UarteRx<'d, T> { | |||
| 377 | } | 323 | } |
| 378 | } | 324 | } |
| 379 | 325 | ||
| 380 | impl<'d, T: Instance> Write for UarteRx<'d, T> { | ||
| 381 | #[rustfmt::skip] | ||
| 382 | type WriteFuture<'a> where Self: 'a = impl Future<Output = Result<(), TraitError>> + 'a; | ||
| 383 | |||
| 384 | fn write<'a>(&'a mut self, tx_buffer: &'a [u8]) -> Self::WriteFuture<'a> { | ||
| 385 | async move { | ||
| 386 | let ptr = tx_buffer.as_ptr(); | ||
| 387 | let len = tx_buffer.len(); | ||
| 388 | assert!(len <= EASY_DMA_SIZE); | ||
| 389 | // TODO: panic if buffer is not in SRAM | ||
| 390 | |||
| 391 | let r = T::regs(); | ||
| 392 | let s = T::state(); | ||
| 393 | |||
| 394 | let drop = OnDrop::new(move || { | ||
| 395 | info!("write drop: stopping"); | ||
| 396 | |||
| 397 | r.intenclr.write(|w| w.endtx().clear()); | ||
| 398 | r.events_txstopped.reset(); | ||
| 399 | r.tasks_stoptx.write(|w| unsafe { w.bits(1) }); | ||
| 400 | |||
| 401 | // TX is stopped almost instantly, spinning is fine. | ||
| 402 | while r.events_endtx.read().bits() == 0 {} | ||
| 403 | info!("write drop: stopped"); | ||
| 404 | }); | ||
| 405 | |||
| 406 | r.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) }); | ||
| 407 | r.txd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) }); | ||
| 408 | |||
| 409 | r.events_endtx.reset(); | ||
| 410 | r.intenset.write(|w| w.endtx().set()); | ||
| 411 | |||
| 412 | compiler_fence(Ordering::SeqCst); | ||
| 413 | |||
| 414 | trace!("starttx"); | ||
| 415 | r.tasks_starttx.write(|w| unsafe { w.bits(1) }); | ||
| 416 | |||
| 417 | poll_fn(|cx| { | ||
| 418 | s.endtx_waker.register(cx.waker()); | ||
| 419 | if r.events_endtx.read().bits() != 0 { | ||
| 420 | return Poll::Ready(()); | ||
| 421 | } | ||
| 422 | Poll::Pending | ||
| 423 | }) | ||
| 424 | .await; | ||
| 425 | |||
| 426 | compiler_fence(Ordering::SeqCst); | ||
| 427 | r.events_txstarted.reset(); | ||
| 428 | drop.defuse(); | ||
| 429 | |||
| 430 | Ok(()) | ||
| 431 | } | ||
| 432 | } | ||
| 433 | } | ||
| 434 | |||
| 435 | impl<'a, T: Instance> Drop for UarteRx<'a, T> { | 326 | impl<'a, T: Instance> Drop for UarteRx<'a, T> { |
| 436 | fn drop(&mut self) { | 327 | fn drop(&mut self) { |
| 437 | info!("uarte rx drop"); | 328 | info!("uarte rx drop"); |
