Remove Peripheral trait, rename PeripheralRef->Peri.

29 files changed, 509 insertions, 696 deletions

diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs
index c3fcfd06e..f939be004 100644
--- a/embassy-nrf/src/buffered_uarte.rs
+++ b/embassy-nrf/src/buffered_uarte.rs
@@ -16,7 +16,7 @@ use core::sync::atomic::{compiler_fence, AtomicBool, AtomicU8, AtomicUsize, Orde
 use core::task::Poll;
 
 use embassy_hal_internal::atomic_ring_buffer::RingBuffer;
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::Peri;
 use pac::uarte::vals;
 // Re-export SVD variants to allow user to directly set values
 pub use pac::uarte::vals::{Baudrate, ConfigParity as Parity};
@@ -28,7 +28,7 @@ use crate::ppi::{
 };
 use crate::timer::{Instance as TimerInstance, Timer};
 use crate::uarte::{configure, configure_rx_pins, configure_tx_pins, drop_tx_rx, Config, Instance as UarteInstance};
-use crate::{interrupt, pac, Peripheral, EASY_DMA_SIZE};
+use crate::{interrupt, pac, EASY_DMA_SIZE};
 
 pub(crate) struct State {
     tx_buf: RingBuffer,
@@ -222,27 +222,26 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
     /// Panics if `rx_buffer.len()` is odd.
     #[allow(clippy::too_many_arguments)]
     pub fn new(
-        uarte: impl Peripheral<P = U> + 'd,
-        timer: impl Peripheral<P = T> + 'd,
-        ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd,
-        ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd,
-        ppi_group: impl Peripheral<P = impl Group> + 'd,
+        uarte: Peri<'d, U>,
+        timer: Peri<'d, T>,
+        ppi_ch1: Peri<'d, impl ConfigurableChannel>,
+        ppi_ch2: Peri<'d, impl ConfigurableChannel>,
+        ppi_group: Peri<'d, impl Group>,
         _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
-        rxd: impl Peripheral<P = impl GpioPin> + 'd,
-        txd: impl Peripheral<P = impl GpioPin> + 'd,
+        rxd: Peri<'d, impl GpioPin>,
+        txd: Peri<'d, impl GpioPin>,
         config: Config,
         rx_buffer: &'d mut [u8],
         tx_buffer: &'d mut [u8],
     ) -> Self {
-        into_ref!(uarte, timer, rxd, txd, ppi_ch1, ppi_ch2, ppi_group);
         Self::new_inner(
             uarte,
             timer,
-            ppi_ch1.map_into(),
-            ppi_ch2.map_into(),
-            ppi_group.map_into(),
-            rxd.map_into(),
-            txd.map_into(),
+            ppi_ch1.into(),
+            ppi_ch2.into(),
+            ppi_group.into(),
+            rxd.into(),
+            txd.into(),
             None,
             None,
             config,
@@ -258,31 +257,30 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
     /// Panics if `rx_buffer.len()` is odd.
     #[allow(clippy::too_many_arguments)]
     pub fn new_with_rtscts(
-        uarte: impl Peripheral<P = U> + 'd,
-        timer: impl Peripheral<P = T> + 'd,
-        ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd,
-        ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd,
-        ppi_group: impl Peripheral<P = impl Group> + 'd,
+        uarte: Peri<'d, U>,
+        timer: Peri<'d, T>,
+        ppi_ch1: Peri<'d, impl ConfigurableChannel>,
+        ppi_ch2: Peri<'d, impl ConfigurableChannel>,
+        ppi_group: Peri<'d, impl Group>,
         _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
-        rxd: impl Peripheral<P = impl GpioPin> + 'd,
-        txd: impl Peripheral<P = impl GpioPin> + 'd,
-        cts: impl Peripheral<P = impl GpioPin> + 'd,
-        rts: impl Peripheral<P = impl GpioPin> + 'd,
+        rxd: Peri<'d, impl GpioPin>,
+        txd: Peri<'d, impl GpioPin>,
+        cts: Peri<'d, impl GpioPin>,
+        rts: Peri<'d, impl GpioPin>,
         config: Config,
         rx_buffer: &'d mut [u8],
         tx_buffer: &'d mut [u8],
     ) -> Self {
-        into_ref!(uarte, timer, rxd, txd, cts, rts, ppi_ch1, ppi_ch2, ppi_group);
         Self::new_inner(
             uarte,
             timer,
-            ppi_ch1.map_into(),
-            ppi_ch2.map_into(),
-            ppi_group.map_into(),
-            rxd.map_into(),
-            txd.map_into(),
-            Some(cts.map_into()),
-            Some(rts.map_into()),
+            ppi_ch1.into(),
+            ppi_ch2.into(),
+            ppi_group.into(),
+            rxd.into(),
+            txd.into(),
+            Some(cts.into()),
+            Some(rts.into()),
             config,
             rx_buffer,
             tx_buffer,
@@ -291,15 +289,15 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
 
     #[allow(clippy::too_many_arguments)]
     fn new_inner(
-        peri: PeripheralRef<'d, U>,
-        timer: PeripheralRef<'d, T>,
-        ppi_ch1: PeripheralRef<'d, AnyConfigurableChannel>,
-        ppi_ch2: PeripheralRef<'d, AnyConfigurableChannel>,
-        ppi_group: PeripheralRef<'d, AnyGroup>,
-        rxd: PeripheralRef<'d, AnyPin>,
-        txd: PeripheralRef<'d, AnyPin>,
-        cts: Option<PeripheralRef<'d, AnyPin>>,
-        rts: Option<PeripheralRef<'d, AnyPin>>,
+        peri: Peri<'d, U>,
+        timer: Peri<'d, T>,
+        ppi_ch1: Peri<'d, AnyConfigurableChannel>,
+        ppi_ch2: Peri<'d, AnyConfigurableChannel>,
+        ppi_group: Peri<'d, AnyGroup>,
+        rxd: Peri<'d, AnyPin>,
+        txd: Peri<'d, AnyPin>,
+        cts: Option<Peri<'d, AnyPin>>,
+        rts: Option<Peri<'d, AnyPin>>,
         config: Config,
         rx_buffer: &'d mut [u8],
         tx_buffer: &'d mut [u8],
@@ -372,20 +370,19 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
 
 /// Reader part of the buffered UARTE driver.
 pub struct BufferedUarteTx<'d, U: UarteInstance> {
-    _peri: PeripheralRef<'d, U>,
+    _peri: Peri<'d, U>,
 }
 
 impl<'d, U: UarteInstance> BufferedUarteTx<'d, U> {
     /// Create a new BufferedUarteTx without hardware flow control.
     pub fn new(
-        uarte: impl Peripheral<P = U> + 'd,
+        uarte: Peri<'d, U>,
         _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
-        txd: impl Peripheral<P = impl GpioPin> + 'd,
+        txd: Peri<'d, impl GpioPin>,
         config: Config,
         tx_buffer: &'d mut [u8],
     ) -> Self {
-        into_ref!(uarte, txd);
-        Self::new_inner(uarte, txd.map_into(), None, config, tx_buffer)
+        Self::new_inner(uarte, txd.into(), None, config, tx_buffer)
     }
 
     /// Create a new BufferedUarte with hardware flow control (RTS/CTS)
@@ -394,21 +391,20 @@ impl<'d, U: UarteInstance> BufferedUarteTx<'d, U> {
     ///
     /// Panics if `rx_buffer.len()` is odd.
     pub fn new_with_cts(
-        uarte: impl Peripheral<P = U> + 'd,
+        uarte: Peri<'d, U>,
         _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
-        txd: impl Peripheral<P = impl GpioPin> + 'd,
-        cts: impl Peripheral<P = impl GpioPin> + 'd,
+        txd: Peri<'d, impl GpioPin>,
+        cts: Peri<'d, impl GpioPin>,
         config: Config,
         tx_buffer: &'d mut [u8],
     ) -> Self {
-        into_ref!(uarte, txd, cts);
-        Self::new_inner(uarte, txd.map_into(), Some(cts.map_into()), config, tx_buffer)
+        Self::new_inner(uarte, txd.into(), Some(cts.into()), config, tx_buffer)
     }
 
     fn new_inner(
-        peri: PeripheralRef<'d, U>,
-        txd: PeripheralRef<'d, AnyPin>,
-        cts: Option<PeripheralRef<'d, AnyPin>>,
+        peri: Peri<'d, U>,
+        txd: Peri<'d, AnyPin>,
+        cts: Option<Peri<'d, AnyPin>>,
         config: Config,
         tx_buffer: &'d mut [u8],
     ) -> Self {
@@ -426,9 +422,9 @@ impl<'d, U: UarteInstance> BufferedUarteTx<'d, U> {
     }
 
     fn new_innerer(
-        peri: PeripheralRef<'d, U>,
-        txd: PeripheralRef<'d, AnyPin>,
-        cts: Option<PeripheralRef<'d, AnyPin>>,
+        peri: Peri<'d, U>,
+        txd: Peri<'d, AnyPin>,
+        cts: Option<Peri<'d, AnyPin>>,
         tx_buffer: &'d mut [u8],
     ) -> Self {
         let r = U::regs();
@@ -542,7 +538,7 @@ impl<'a, U: UarteInstance> Drop for BufferedUarteTx<'a, U> {
 
 /// Reader part of the buffered UARTE driver.
 pub struct BufferedUarteRx<'d, U: UarteInstance, T: TimerInstance> {
-    _peri: PeripheralRef<'d, U>,
+    _peri: Peri<'d, U>,
     timer: Timer<'d, T>,
     _ppi_ch1: Ppi<'d, AnyConfigurableChannel, 1, 1>,
     _ppi_ch2: Ppi<'d, AnyConfigurableChannel, 1, 2>,
@@ -557,24 +553,23 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarteRx<'d, U, T> {
     /// Panics if `rx_buffer.len()` is odd.
     #[allow(clippy::too_many_arguments)]
     pub fn new(
-        uarte: impl Peripheral<P = U> + 'd,
-        timer: impl Peripheral<P = T> + 'd,
-        ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd,
-        ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd,
-        ppi_group: impl Peripheral<P = impl Group> + 'd,
+        uarte: Peri<'d, U>,
+        timer: Peri<'d, T>,
+        ppi_ch1: Peri<'d, impl ConfigurableChannel>,
+        ppi_ch2: Peri<'d, impl ConfigurableChannel>,
+        ppi_group: Peri<'d, impl Group>,
         _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
-        rxd: impl Peripheral<P = impl GpioPin> + 'd,
+        rxd: Peri<'d, impl GpioPin>,
         config: Config,
         rx_buffer: &'d mut [u8],
     ) -> Self {
-        into_ref!(uarte, timer, rxd, ppi_ch1, ppi_ch2, ppi_group);
         Self::new_inner(
             uarte,
             timer,
-            ppi_ch1.map_into(),
-            ppi_ch2.map_into(),
-            ppi_group.map_into(),
-            rxd.map_into(),
+            ppi_ch1.into(),
+            ppi_ch2.into(),
+            ppi_group.into(),
+            rxd.into(),
             None,
             config,
             rx_buffer,
@@ -588,26 +583,25 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarteRx<'d, U, T> {
     /// Panics if `rx_buffer.len()` is odd.
     #[allow(clippy::too_many_arguments)]
     pub fn new_with_rts(
-        uarte: impl Peripheral<P = U> + 'd,
-        timer: impl Peripheral<P = T> + 'd,
-        ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd,
-        ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd,
-        ppi_group: impl Peripheral<P = impl Group> + 'd,
+        uarte: Peri<'d, U>,
+        timer: Peri<'d, T>,
+        ppi_ch1: Peri<'d, impl ConfigurableChannel>,
+        ppi_ch2: Peri<'d, impl ConfigurableChannel>,
+        ppi_group: Peri<'d, impl Group>,
         _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
-        rxd: impl Peripheral<P = impl GpioPin> + 'd,
-        rts: impl Peripheral<P = impl GpioPin> + 'd,
+        rxd: Peri<'d, impl GpioPin>,
+        rts: Peri<'d, impl GpioPin>,
         config: Config,
         rx_buffer: &'d mut [u8],
     ) -> Self {
-        into_ref!(uarte, timer, rxd, rts, ppi_ch1, ppi_ch2, ppi_group);
         Self::new_inner(
             uarte,
             timer,
-            ppi_ch1.map_into(),
-            ppi_ch2.map_into(),
-            ppi_group.map_into(),
-            rxd.map_into(),
-            Some(rts.map_into()),
+            ppi_ch1.into(),
+            ppi_ch2.into(),
+            ppi_group.into(),
+            rxd.into(),
+            Some(rts.into()),
             config,
             rx_buffer,
         )
@@ -615,13 +609,13 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarteRx<'d, U, T> {
 
     #[allow(clippy::too_many_arguments)]
     fn new_inner(
-        peri: PeripheralRef<'d, U>,
-        timer: PeripheralRef<'d, T>,
-        ppi_ch1: PeripheralRef<'d, AnyConfigurableChannel>,
-        ppi_ch2: PeripheralRef<'d, AnyConfigurableChannel>,
-        ppi_group: PeripheralRef<'d, AnyGroup>,
-        rxd: PeripheralRef<'d, AnyPin>,
-        rts: Option<PeripheralRef<'d, AnyPin>>,
+        peri: Peri<'d, U>,
+        timer: Peri<'d, T>,
+        ppi_ch1: Peri<'d, AnyConfigurableChannel>,
+        ppi_ch2: Peri<'d, AnyConfigurableChannel>,
+        ppi_group: Peri<'d, AnyGroup>,
+        rxd: Peri<'d, AnyPin>,
+        rts: Option<Peri<'d, AnyPin>>,
         config: Config,
         rx_buffer: &'d mut [u8],
     ) -> Self {
@@ -640,13 +634,13 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarteRx<'d, U, T> {
 
     #[allow(clippy::too_many_arguments)]
     fn new_innerer(
-        peri: PeripheralRef<'d, U>,
-        timer: PeripheralRef<'d, T>,
-        ppi_ch1: PeripheralRef<'d, AnyConfigurableChannel>,
-        ppi_ch2: PeripheralRef<'d, AnyConfigurableChannel>,
-        ppi_group: PeripheralRef<'d, AnyGroup>,
-        rxd: PeripheralRef<'d, AnyPin>,
-        rts: Option<PeripheralRef<'d, AnyPin>>,
+        peri: Peri<'d, U>,
+        timer: Peri<'d, T>,
+        ppi_ch1: Peri<'d, AnyConfigurableChannel>,
+        ppi_ch2: Peri<'d, AnyConfigurableChannel>,
+        ppi_group: Peri<'d, AnyGroup>,
+        rxd: Peri<'d, AnyPin>,
+        rts: Option<Peri<'d, AnyPin>>,
         rx_buffer: &'d mut [u8],
     ) -> Self {
         assert!(rx_buffer.len() % 2 == 0);
diff --git a/embassy-nrf/src/egu.rs b/embassy-nrf/src/egu.rs
index 7f9abdac4..028396c7c 100644
--- a/embassy-nrf/src/egu.rs
+++ b/embassy-nrf/src/egu.rs
@@ -7,20 +7,19 @@
 
 use core::marker::PhantomData;
 
-use embassy_hal_internal::into_ref;
+use embassy_hal_internal::PeripheralType;
 
 use crate::ppi::{Event, Task};
-use crate::{interrupt, pac, Peripheral, PeripheralRef};
+use crate::{interrupt, pac, Peri};
 
 /// An instance of the EGU.
 pub struct Egu<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
 }
 
 impl<'d, T: Instance> Egu<'d, T> {
     /// Create a new EGU instance.
-    pub fn new(_p: impl Peripheral<P = T> + 'd) -> Self {
-        into_ref!(_p);
+    pub fn new(_p: Peri<'d, T>) -> Self {
         Self { _p }
     }
 
@@ -39,7 +38,7 @@ pub(crate) trait SealedInstance {
 
 /// Basic Egu instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static + Send {
+pub trait Instance: SealedInstance + PeripheralType + 'static + Send {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/gpio.rs b/embassy-nrf/src/gpio.rs
index c78fa4df5..d02da9ac5 100644
--- a/embassy-nrf/src/gpio.rs
+++ b/embassy-nrf/src/gpio.rs
@@ -5,14 +5,14 @@ use core::convert::Infallible;
 use core::hint::unreachable_unchecked;
 
 use cfg_if::cfg_if;
-use embassy_hal_internal::{impl_peripheral, into_ref, PeripheralRef};
+use embassy_hal_internal::{impl_peripheral, Peri, PeripheralType};
 
+use crate::pac;
 use crate::pac::common::{Reg, RW};
 use crate::pac::gpio;
 use crate::pac::gpio::vals;
 #[cfg(not(feature = "_nrf51"))]
 use crate::pac::shared::{regs::Psel, vals::Connect};
-use crate::{pac, Peripheral};
 
 /// A GPIO port with up to 32 pins.
 #[derive(Debug, Eq, PartialEq)]
@@ -49,7 +49,7 @@ pub struct Input<'d> {
 impl<'d> Input<'d> {
     /// Create GPIO input driver for a [Pin] with the provided [Pull] configuration.
     #[inline]
-    pub fn new(pin: impl Peripheral<P = impl Pin> + 'd, pull: Pull) -> Self {
+    pub fn new(pin: Peri<'d, impl Pin>, pull: Pull) -> Self {
         let mut pin = Flex::new(pin);
         pin.set_as_input(pull);
 
@@ -210,7 +210,7 @@ pub struct Output<'d> {
 impl<'d> Output<'d> {
     /// Create GPIO output driver for a [Pin] with the provided [Level] and [OutputDriver] configuration.
     #[inline]
-    pub fn new(pin: impl Peripheral<P = impl Pin> + 'd, initial_output: Level, drive: OutputDrive) -> Self {
+    pub fn new(pin: Peri<'d, impl Pin>, initial_output: Level, drive: OutputDrive) -> Self {
         let mut pin = Flex::new(pin);
         match initial_output {
             Level::High => pin.set_high(),
@@ -310,7 +310,7 @@ fn convert_pull(pull: Pull) -> vals::Pull {
 /// set while not in output mode, so the pin's level will be 'remembered' when it is not in output
 /// mode.
 pub struct Flex<'d> {
-    pub(crate) pin: PeripheralRef<'d, AnyPin>,
+    pub(crate) pin: Peri<'d, AnyPin>,
 }
 
 impl<'d> Flex<'d> {
@@ -319,10 +319,9 @@ impl<'d> Flex<'d> {
     /// The pin remains disconnected. The initial output level is unspecified, but can be changed
     /// before the pin is put into output mode.
     #[inline]
-    pub fn new(pin: impl Peripheral<P = impl Pin> + 'd) -> Self {
-        into_ref!(pin);
+    pub fn new(pin: Peri<'d, impl Pin>) -> Self {
         // Pin will be in disconnected state.
-        Self { pin: pin.map_into() }
+        Self { pin: pin.into() }
     }
 
     /// Put the pin into input mode.
@@ -503,7 +502,7 @@ pub(crate) trait SealedPin {
 
 /// Interface for a Pin that can be configured by an [Input] or [Output] driver, or converted to an [AnyPin].
 #[allow(private_bounds)]
-pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + SealedPin + Sized + 'static {
+pub trait Pin: PeripheralType + Into<AnyPin> + SealedPin + Sized + 'static {
     /// Number of the pin within the port (0..31)
     #[inline]
     fn pin(&self) -> u8 {
@@ -529,19 +528,11 @@ pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + SealedPin + Sized + 'static
     fn psel_bits(&self) -> pac::shared::regs::Psel {
         pac::shared::regs::Psel(self.pin_port() as u32)
     }
-
-    /// Convert from concrete pin type PX_XX to type erased `AnyPin`.
-    #[inline]
-    fn degrade(self) -> AnyPin {
-        AnyPin {
-            pin_port: self.pin_port(),
-        }
-    }
 }
 
 /// Type-erased GPIO pin
 pub struct AnyPin {
-    pin_port: u8,
+    pub(crate) pin_port: u8,
 }
 
 impl AnyPin {
@@ -550,8 +541,8 @@ impl AnyPin {
     /// # Safety
     /// - `pin_port` should not in use by another driver.
     #[inline]
-    pub unsafe fn steal(pin_port: u8) -> Self {
-        Self { pin_port }
+    pub unsafe fn steal(pin_port: u8) -> Peri<'static, Self> {
+        Peri::new_unchecked(Self { pin_port })
     }
 }
 
@@ -573,7 +564,7 @@ pub(crate) trait PselBits {
 }
 
 #[cfg(not(feature = "_nrf51"))]
-impl<'a, P: Pin> PselBits for Option<PeripheralRef<'a, P>> {
+impl<'a, P: Pin> PselBits for Option<Peri<'a, P>> {
     #[inline]
     fn psel_bits(&self) -> pac::shared::regs::Psel {
         match self {
@@ -611,8 +602,10 @@ macro_rules! impl_pin {
         }
 
         impl From<peripherals::$type> for crate::gpio::AnyPin {
-            fn from(val: peripherals::$type) -> Self {
-                crate::gpio::Pin::degrade(val)
+            fn from(_val: peripherals::$type) -> Self {
+                Self {
+                    pin_port: $port_num * 32 + $pin_num,
+                }
             }
         }
     };
diff --git a/embassy-nrf/src/gpiote.rs b/embassy-nrf/src/gpiote.rs
index 8771f9f08..d169b49f9 100644
--- a/embassy-nrf/src/gpiote.rs
+++ b/embassy-nrf/src/gpiote.rs
@@ -4,7 +4,7 @@ use core::convert::Infallible;
 use core::future::{poll_fn, Future};
 use core::task::{Context, Poll};
 
-use embassy_hal_internal::{impl_peripheral, into_ref, Peripheral, PeripheralRef};
+use embassy_hal_internal::{impl_peripheral, Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 
 use crate::gpio::{AnyPin, Flex, Input, Output, Pin as GpioPin, SealedPin as _};
@@ -189,7 +189,7 @@ impl Iterator for BitIter {
 
 /// GPIOTE channel driver in input mode
 pub struct InputChannel<'d> {
-    ch: PeripheralRef<'d, AnyChannel>,
+    ch: Peri<'d, AnyChannel>,
     pin: Input<'d>,
 }
 
@@ -204,9 +204,7 @@ impl<'d> Drop for InputChannel<'d> {
 
 impl<'d> InputChannel<'d> {
     /// Create a new GPIOTE input channel driver.
-    pub fn new(ch: impl Peripheral<P = impl Channel> + 'd, pin: Input<'d>, polarity: InputChannelPolarity) -> Self {
-        into_ref!(ch);
-
+    pub fn new(ch: Peri<'d, impl Channel>, pin: Input<'d>, polarity: InputChannelPolarity) -> Self {
         let g = regs();
         let num = ch.number();
 
@@ -228,7 +226,7 @@ impl<'d> InputChannel<'d> {
 
         g.events_in(num).write_value(0);
 
-        InputChannel { ch: ch.map_into(), pin }
+        InputChannel { ch: ch.into(), pin }
     }
 
     /// Asynchronously wait for an event in this channel.
@@ -261,7 +259,7 @@ impl<'d> InputChannel<'d> {
 
 /// GPIOTE channel driver in output mode
 pub struct OutputChannel<'d> {
-    ch: PeripheralRef<'d, AnyChannel>,
+    ch: Peri<'d, AnyChannel>,
     _pin: Output<'d>,
 }
 
@@ -276,8 +274,7 @@ impl<'d> Drop for OutputChannel<'d> {
 
 impl<'d> OutputChannel<'d> {
     /// Create a new GPIOTE output channel driver.
-    pub fn new(ch: impl Peripheral<P = impl Channel> + 'd, pin: Output<'d>, polarity: OutputChannelPolarity) -> Self {
-        into_ref!(ch);
+    pub fn new(ch: Peri<'d, impl Channel>, pin: Output<'d>, polarity: OutputChannelPolarity) -> Self {
         let g = regs();
         let num = ch.number();
 
@@ -301,7 +298,7 @@ impl<'d> OutputChannel<'d> {
         });
 
         OutputChannel {
-            ch: ch.map_into(),
+            ch: ch.into(),
             _pin: pin,
         }
     }
@@ -351,14 +348,12 @@ impl<'d> OutputChannel<'d> {
 
 #[must_use = "futures do nothing unless you `.await` or poll them"]
 pub(crate) struct PortInputFuture<'a> {
-    pin: PeripheralRef<'a, AnyPin>,
+    pin: Peri<'a, AnyPin>,
 }
 
 impl<'a> PortInputFuture<'a> {
-    fn new(pin: impl Peripheral<P = impl GpioPin> + 'a) -> Self {
-        Self {
-            pin: pin.into_ref().map_into(),
-        }
+    fn new(pin: Peri<'a, impl GpioPin>) -> Self {
+        Self { pin: pin.into() }
     }
 }
 
@@ -415,13 +410,13 @@ impl<'d> Flex<'d> {
     /// Wait until the pin is high. If it is already high, return immediately.
     pub async fn wait_for_high(&mut self) {
         self.pin.conf().modify(|w| w.set_sense(Sense::HIGH));
-        PortInputFuture::new(&mut self.pin).await
+        PortInputFuture::new(self.pin.reborrow()).await
     }
 
     /// Wait until the pin is low. If it is already low, return immediately.
     pub async fn wait_for_low(&mut self) {
         self.pin.conf().modify(|w| w.set_sense(Sense::LOW));
-        PortInputFuture::new(&mut self.pin).await
+        PortInputFuture::new(self.pin.reborrow()).await
     }
 
     /// Wait for the pin to undergo a transition from low to high.
@@ -443,7 +438,7 @@ impl<'d> Flex<'d> {
         } else {
             self.pin.conf().modify(|w| w.set_sense(Sense::HIGH));
         }
-        PortInputFuture::new(&mut self.pin).await
+        PortInputFuture::new(self.pin.reborrow()).await
     }
 }
 
@@ -455,24 +450,14 @@ trait SealedChannel {}
 ///
 /// Implemented by all GPIOTE channels.
 #[allow(private_bounds)]
-pub trait Channel: SealedChannel + Into<AnyChannel> + Sized + 'static {
+pub trait Channel: PeripheralType + SealedChannel + Into<AnyChannel> + Sized + 'static {
     /// Get the channel number.
     fn number(&self) -> usize;
-
-    /// Convert this channel to a type-erased `AnyChannel`.
-    ///
-    /// This allows using several channels in situations that might require
-    /// them to be the same type, like putting them in an array.
-    fn degrade(self) -> AnyChannel {
-        AnyChannel {
-            number: self.number() as u8,
-        }
-    }
 }
 
 /// Type-erased channel.
 ///
-/// Obtained by calling `Channel::degrade`.
+/// Obtained by calling `Channel::into()`.
 ///
 /// This allows using several channels in situations that might require
 /// them to be the same type, like putting them in an array.
@@ -498,7 +483,9 @@ macro_rules! impl_channel {
 
         impl From<peripherals::$type> for AnyChannel {
             fn from(val: peripherals::$type) -> Self {
-                Channel::degrade(val)
+                Self {
+                    number: val.number() as u8,
+                }
             }
         }
     };
diff --git a/embassy-nrf/src/i2s.rs b/embassy-nrf/src/i2s.rs
index 384a1637b..a7dde8cd7 100644
--- a/embassy-nrf/src/i2s.rs
+++ b/embassy-nrf/src/i2s.rs
@@ -10,14 +10,14 @@ use core::sync::atomic::{compiler_fence, AtomicBool, Ordering};
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 
 use crate::gpio::{AnyPin, Pin as GpioPin, PselBits};
 use crate::interrupt::typelevel::Interrupt;
 use crate::pac::i2s::vals;
 use crate::util::slice_in_ram_or;
-use crate::{interrupt, pac, Peripheral, EASY_DMA_SIZE};
+use crate::{interrupt, pac, EASY_DMA_SIZE};
 
 /// Type alias for `MultiBuffering` with 2 buffers.
 pub type DoubleBuffering<S, const NS: usize> = MultiBuffering<S, 2, NS>;
@@ -406,12 +406,12 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
 
 /// I2S driver.
 pub struct I2S<'d, T: Instance> {
-    i2s: PeripheralRef<'d, T>,
-    mck: Option<PeripheralRef<'d, AnyPin>>,
-    sck: PeripheralRef<'d, AnyPin>,
-    lrck: PeripheralRef<'d, AnyPin>,
-    sdin: Option<PeripheralRef<'d, AnyPin>>,
-    sdout: Option<PeripheralRef<'d, AnyPin>>,
+    i2s: Peri<'d, T>,
+    mck: Option<Peri<'d, AnyPin>>,
+    sck: Peri<'d, AnyPin>,
+    lrck: Peri<'d, AnyPin>,
+    sdin: Option<Peri<'d, AnyPin>>,
+    sdout: Option<Peri<'d, AnyPin>>,
     master_clock: Option<MasterClock>,
     config: Config,
 }
@@ -419,20 +419,19 @@ pub struct I2S<'d, T: Instance> {
 impl<'d, T: Instance> I2S<'d, T> {
     /// Create a new I2S in master mode
     pub fn new_master(
-        i2s: impl Peripheral<P = T> + 'd,
+        i2s: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        mck: impl Peripheral<P = impl GpioPin> + 'd,
-        sck: impl Peripheral<P = impl GpioPin> + 'd,
-        lrck: impl Peripheral<P = impl GpioPin> + 'd,
+        mck: Peri<'d, impl GpioPin>,
+        sck: Peri<'d, impl GpioPin>,
+        lrck: Peri<'d, impl GpioPin>,
         master_clock: MasterClock,
         config: Config,
     ) -> Self {
-        into_ref!(i2s, mck, sck, lrck);
         Self {
             i2s,
-            mck: Some(mck.map_into()),
-            sck: sck.map_into(),
-            lrck: lrck.map_into(),
+            mck: Some(mck.into()),
+            sck: sck.into(),
+            lrck: lrck.into(),
             sdin: None,
             sdout: None,
             master_clock: Some(master_clock),
@@ -442,18 +441,17 @@ impl<'d, T: Instance> I2S<'d, T> {
 
     /// Create a new I2S in slave mode
     pub fn new_slave(
-        i2s: impl Peripheral<P = T> + 'd,
+        i2s: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        sck: impl Peripheral<P = impl GpioPin> + 'd,
-        lrck: impl Peripheral<P = impl GpioPin> + 'd,
+        sck: Peri<'d, impl GpioPin>,
+        lrck: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(i2s, sck, lrck);
         Self {
             i2s,
             mck: None,
-            sck: sck.map_into(),
-            lrck: lrck.map_into(),
+            sck: sck.into(),
+            lrck: lrck.into(),
             sdin: None,
             sdout: None,
             master_clock: None,
@@ -464,10 +462,10 @@ impl<'d, T: Instance> I2S<'d, T> {
     /// I2S output only
     pub fn output<S: Sample, const NB: usize, const NS: usize>(
         mut self,
-        sdout: impl Peripheral<P = impl GpioPin> + 'd,
+        sdout: Peri<'d, impl GpioPin>,
         buffers: MultiBuffering<S, NB, NS>,
     ) -> OutputStream<'d, T, S, NB, NS> {
-        self.sdout = Some(sdout.into_ref().map_into());
+        self.sdout = Some(sdout.into());
         OutputStream {
             _p: self.build(),
             buffers,
@@ -477,10 +475,10 @@ impl<'d, T: Instance> I2S<'d, T> {
     /// I2S input only
     pub fn input<S: Sample, const NB: usize, const NS: usize>(
         mut self,
-        sdin: impl Peripheral<P = impl GpioPin> + 'd,
+        sdin: Peri<'d, impl GpioPin>,
         buffers: MultiBuffering<S, NB, NS>,
     ) -> InputStream<'d, T, S, NB, NS> {
-        self.sdin = Some(sdin.into_ref().map_into());
+        self.sdin = Some(sdin.into());
         InputStream {
             _p: self.build(),
             buffers,
@@ -490,13 +488,13 @@ impl<'d, T: Instance> I2S<'d, T> {
     /// I2S full duplex (input and output)
     pub fn full_duplex<S: Sample, const NB: usize, const NS: usize>(
         mut self,
-        sdin: impl Peripheral<P = impl GpioPin> + 'd,
-        sdout: impl Peripheral<P = impl GpioPin> + 'd,
+        sdin: Peri<'d, impl GpioPin>,
+        sdout: Peri<'d, impl GpioPin>,
         buffers_out: MultiBuffering<S, NB, NS>,
         buffers_in: MultiBuffering<S, NB, NS>,
     ) -> FullDuplexStream<'d, T, S, NB, NS> {
-        self.sdout = Some(sdout.into_ref().map_into());
-        self.sdin = Some(sdin.into_ref().map_into());
+        self.sdout = Some(sdout.into());
+        self.sdin = Some(sdin.into());
 
         FullDuplexStream {
             _p: self.build(),
@@ -505,7 +503,7 @@ impl<'d, T: Instance> I2S<'d, T> {
         }
     }
 
-    fn build(self) -> PeripheralRef<'d, T> {
+    fn build(self) -> Peri<'d, T> {
         self.apply_config();
         self.select_pins();
         self.setup_interrupt();
@@ -702,7 +700,7 @@ impl<'d, T: Instance> I2S<'d, T> {
 
 /// I2S output
 pub struct OutputStream<'d, T: Instance, S: Sample, const NB: usize, const NS: usize> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
     buffers: MultiBuffering<S, NB, NS>,
 }
 
@@ -756,7 +754,7 @@ impl<'d, T: Instance, S: Sample, const NB: usize, const NS: usize> OutputStream<
 
 /// I2S input
 pub struct InputStream<'d, T: Instance, S: Sample, const NB: usize, const NS: usize> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
     buffers: MultiBuffering<S, NB, NS>,
 }
 
@@ -811,7 +809,7 @@ impl<'d, T: Instance, S: Sample, const NB: usize, const NS: usize> InputStream<'
 
 /// I2S full duplex stream (input & output)
 pub struct FullDuplexStream<'d, T: Instance, S: Sample, const NB: usize, const NS: usize> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
     buffers_out: MultiBuffering<S, NB, NS>,
     buffers_in: MultiBuffering<S, NB, NS>,
 }
@@ -1148,7 +1146,7 @@ pub(crate) trait SealedInstance {
 
 /// I2S peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static + Send {
+pub trait Instance: SealedInstance + PeripheralType + 'static + Send {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/lib.rs b/embassy-nrf/src/lib.rs
index 5cd0efa58..d2ff054f4 100644
--- a/embassy-nrf/src/lib.rs
+++ b/embassy-nrf/src/lib.rs
@@ -263,7 +263,7 @@ pub use chip::pac;
 #[cfg(not(feature = "unstable-pac"))]
 pub(crate) use chip::pac;
 pub use chip::{peripherals, Peripherals, EASY_DMA_SIZE};
-pub use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
+pub use embassy_hal_internal::{Peri, PeripheralType};
 
 pub use crate::chip::interrupt;
 #[cfg(feature = "rt")]
diff --git a/embassy-nrf/src/nfct.rs b/embassy-nrf/src/nfct.rs
index 8b4b6dfe0..8d70ec954 100644
--- a/embassy-nrf/src/nfct.rs
+++ b/embassy-nrf/src/nfct.rs
@@ -13,7 +13,6 @@ use core::future::poll_fn;
 use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::Poll;
 
-use embassy_hal_internal::{into_ref, PeripheralRef};
 use embassy_sync::waitqueue::AtomicWaker;
 pub use vals::{Bitframesdd as SddPat, Discardmode as DiscardMode};
 
@@ -22,7 +21,7 @@ use crate::pac::nfct::vals;
 use crate::pac::NFCT;
 use crate::peripherals::NFCT;
 use crate::util::slice_in_ram;
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac, Peri};
 
 /// NFCID1 (aka UID) of different sizes.
 #[derive(Clone, Eq, PartialEq, Ord, PartialOrd, Hash, Debug)]
@@ -96,7 +95,7 @@ pub enum Error {
 
 /// NFC tag emulator driver.
 pub struct NfcT<'d> {
-    _p: PeripheralRef<'d, NFCT>,
+    _p: Peri<'d, NFCT>,
     rx_buf: [u8; 256],
     tx_buf: [u8; 256],
 }
@@ -104,12 +103,10 @@ pub struct NfcT<'d> {
 impl<'d> NfcT<'d> {
     /// Create an Nfc Tag driver
     pub fn new(
-        _p: impl Peripheral<P = NFCT> + 'd,
+        _p: Peri<'d, NFCT>,
         _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::NFCT, InterruptHandler> + 'd,
         config: &Config,
     ) -> Self {
-        into_ref!(_p);
-
         let r = pac::NFCT;
 
         unsafe {
diff --git a/embassy-nrf/src/nvmc.rs b/embassy-nrf/src/nvmc.rs
index 6973b4847..c46af0b34 100644
--- a/embassy-nrf/src/nvmc.rs
+++ b/embassy-nrf/src/nvmc.rs
@@ -2,14 +2,13 @@
 
 use core::{ptr, slice};
 
-use embassy_hal_internal::{into_ref, PeripheralRef};
 use embedded_storage::nor_flash::{
     ErrorType, MultiwriteNorFlash, NorFlash, NorFlashError, NorFlashErrorKind, ReadNorFlash,
 };
 
 use crate::pac::nvmc::vals;
 use crate::peripherals::NVMC;
-use crate::{pac, Peripheral};
+use crate::{pac, Peri};
 
 #[cfg(not(feature = "_nrf5340-net"))]
 /// Erase size of NVMC flash in bytes.
@@ -42,13 +41,12 @@ impl NorFlashError for Error {
 
 /// Non-Volatile Memory Controller (NVMC) that implements the `embedded-storage` traits.
 pub struct Nvmc<'d> {
-    _p: PeripheralRef<'d, NVMC>,
+    _p: Peri<'d, NVMC>,
 }
 
 impl<'d> Nvmc<'d> {
     /// Create Nvmc driver.
-    pub fn new(_p: impl Peripheral<P = NVMC> + 'd) -> Self {
-        into_ref!(_p);
+    pub fn new(_p: Peri<'d, NVMC>) -> Self {
         Self { _p }
     }
 
diff --git a/embassy-nrf/src/pdm.rs b/embassy-nrf/src/pdm.rs
index 483d1a644..c2a4ba65f 100644
--- a/embassy-nrf/src/pdm.rs
+++ b/embassy-nrf/src/pdm.rs
@@ -8,7 +8,7 @@ use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 use fixed::types::I7F1;
 
@@ -25,7 +25,7 @@ pub use crate::pac::pdm::vals::Freq as Frequency;
     feature = "_nrf91",
 ))]
 pub use crate::pac::pdm::vals::Ratio;
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac};
 
 /// Interrupt handler
 pub struct InterruptHandler<T: Instance> {
@@ -54,7 +54,7 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
 
 /// PDM microphone interface
 pub struct Pdm<'d, T: Instance> {
-    _peri: PeripheralRef<'d, T>,
+    _peri: Peri<'d, T>,
 }
 
 /// PDM error
@@ -89,24 +89,16 @@ pub enum SamplerState {
 impl<'d, T: Instance> Pdm<'d, T> {
     /// Create PDM driver
     pub fn new(
-        pdm: impl Peripheral<P = T> + 'd,
+        pdm: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        clk: impl Peripheral<P = impl GpioPin> + 'd,
-        din: impl Peripheral<P = impl GpioPin> + 'd,
+        clk: Peri<'d, impl GpioPin>,
+        din: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(pdm, clk, din);
-        Self::new_inner(pdm, clk.map_into(), din.map_into(), config)
+        Self::new_inner(pdm, clk.into(), din.into(), config)
     }
 
-    fn new_inner(
-        pdm: PeripheralRef<'d, T>,
-        clk: PeripheralRef<'d, AnyPin>,
-        din: PeripheralRef<'d, AnyPin>,
-        config: Config,
-    ) -> Self {
-        into_ref!(pdm);
-
+    fn new_inner(pdm: Peri<'d, T>, clk: Peri<'d, AnyPin>, din: Peri<'d, AnyPin>, config: Config) -> Self {
         let r = T::regs();
 
         // setup gpio pins
@@ -452,7 +444,7 @@ pub(crate) trait SealedInstance {
 
 /// PDM peripheral instance
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static + Send {
+pub trait Instance: SealedInstance + PeripheralType + 'static + Send {
     /// Interrupt for this peripheral
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/ppi/dppi.rs b/embassy-nrf/src/ppi/dppi.rs
index 3c7b96df7..686f66987 100644
--- a/embassy-nrf/src/ppi/dppi.rs
+++ b/embassy-nrf/src/ppi/dppi.rs
@@ -1,7 +1,5 @@
-use embassy_hal_internal::into_ref;
-
 use super::{Channel, ConfigurableChannel, Event, Ppi, Task};
-use crate::{pac, Peripheral};
+use crate::{pac, Peri};
 
 const DPPI_ENABLE_BIT: u32 = 0x8000_0000;
 const DPPI_CHANNEL_MASK: u32 = 0x0000_00FF;
@@ -12,14 +10,14 @@ pub(crate) fn regs() -> pac::dppic::Dppic {
 
 impl<'d, C: ConfigurableChannel> Ppi<'d, C, 1, 1> {
     /// Configure PPI channel to trigger `task` on `event`.
-    pub fn new_one_to_one(ch: impl Peripheral<P = C> + 'd, event: Event<'d>, task: Task<'d>) -> Self {
+    pub fn new_one_to_one(ch: Peri<'d, C>, event: Event<'d>, task: Task<'d>) -> Self {
         Ppi::new_many_to_many(ch, [event], [task])
     }
 }
 
 impl<'d, C: ConfigurableChannel> Ppi<'d, C, 1, 2> {
     /// Configure PPI channel to trigger both `task1` and `task2` on `event`.
-    pub fn new_one_to_two(ch: impl Peripheral<P = C> + 'd, event: Event<'d>, task1: Task<'d>, task2: Task<'d>) -> Self {
+    pub fn new_one_to_two(ch: Peri<'d, C>, event: Event<'d>, task1: Task<'d>, task2: Task<'d>) -> Self {
         Ppi::new_many_to_many(ch, [event], [task1, task2])
     }
 }
@@ -28,13 +26,7 @@ impl<'d, C: ConfigurableChannel, const EVENT_COUNT: usize, const TASK_COUNT: usi
     Ppi<'d, C, EVENT_COUNT, TASK_COUNT>
 {
     /// Configure a DPPI channel to trigger all `tasks` when any of the `events` fires.
-    pub fn new_many_to_many(
-        ch: impl Peripheral<P = C> + 'd,
-        events: [Event<'d>; EVENT_COUNT],
-        tasks: [Task<'d>; TASK_COUNT],
-    ) -> Self {
-        into_ref!(ch);
-
+    pub fn new_many_to_many(ch: Peri<'d, C>, events: [Event<'d>; EVENT_COUNT], tasks: [Task<'d>; TASK_COUNT]) -> Self {
         let val = DPPI_ENABLE_BIT | (ch.number() as u32 & DPPI_CHANNEL_MASK);
         for task in tasks {
             if unsafe { task.subscribe_reg().read_volatile() } != 0 {
diff --git a/embassy-nrf/src/ppi/mod.rs b/embassy-nrf/src/ppi/mod.rs
index 325e4ce00..531777205 100644
--- a/embassy-nrf/src/ppi/mod.rs
+++ b/embassy-nrf/src/ppi/mod.rs
@@ -18,10 +18,10 @@
 use core::marker::PhantomData;
 use core::ptr::NonNull;
 
-use embassy_hal_internal::{impl_peripheral, into_ref, PeripheralRef};
+use embassy_hal_internal::{impl_peripheral, Peri, PeripheralType};
 
 use crate::pac::common::{Reg, RW, W};
-use crate::{peripherals, Peripheral};
+use crate::peripherals;
 
 #[cfg_attr(feature = "_dppi", path = "dppi.rs")]
 #[cfg_attr(feature = "_ppi", path = "ppi.rs")]
@@ -30,7 +30,7 @@ pub(crate) use _version::*;
 
 /// PPI channel driver.
 pub struct Ppi<'d, C: Channel, const EVENT_COUNT: usize, const TASK_COUNT: usize> {
-    ch: PeripheralRef<'d, C>,
+    ch: Peri<'d, C>,
     #[cfg(feature = "_dppi")]
     events: [Event<'d>; EVENT_COUNT],
     #[cfg(feature = "_dppi")]
@@ -39,16 +39,14 @@ pub struct Ppi<'d, C: Channel, const EVENT_COUNT: usize, const TASK_COUNT: usize
 
 /// PPI channel group driver.
 pub struct PpiGroup<'d, G: Group> {
-    g: PeripheralRef<'d, G>,
+    g: Peri<'d, G>,
 }
 
 impl<'d, G: Group> PpiGroup<'d, G> {
     /// Create a new PPI group driver.
     ///
     /// The group is initialized as containing no channels.
-    pub fn new(g: impl Peripheral<P = G> + 'd) -> Self {
-        into_ref!(g);
-
+    pub fn new(g: Peri<'d, G>) -> Self {
         let r = regs();
         let n = g.number();
         r.chg(n).write(|_| ());
@@ -210,34 +208,22 @@ pub(crate) trait SealedGroup {}
 
 /// Interface for PPI channels.
 #[allow(private_bounds)]
-pub trait Channel: SealedChannel + Peripheral<P = Self> + Sized + 'static {
+pub trait Channel: SealedChannel + PeripheralType + Sized + 'static {
     /// Returns the number of the channel
     fn number(&self) -> usize;
 }
 
 /// Interface for PPI channels that can be configured.
-pub trait ConfigurableChannel: Channel + Into<AnyConfigurableChannel> {
-    /// Convert into a type erased configurable channel.
-    fn degrade(self) -> AnyConfigurableChannel;
-}
+pub trait ConfigurableChannel: Channel + Into<AnyConfigurableChannel> {}
 
 /// Interface for PPI channels that cannot be configured.
-pub trait StaticChannel: Channel + Into<AnyStaticChannel> {
-    /// Convert into a type erased static channel.
-    fn degrade(self) -> AnyStaticChannel;
-}
+pub trait StaticChannel: Channel + Into<AnyStaticChannel> {}
 
 /// Interface for a group of PPI channels.
 #[allow(private_bounds)]
-pub trait Group: SealedGroup + Peripheral<P = Self> + Into<AnyGroup> + Sized + 'static {
+pub trait Group: SealedGroup + PeripheralType + Into<AnyGroup> + Sized + 'static {
     /// Returns the number of the group.
     fn number(&self) -> usize;
-    /// Convert into a type erased group.
-    fn degrade(self) -> AnyGroup {
-        AnyGroup {
-            number: self.number() as u8,
-        }
-    }
 }
 
 // ======================
@@ -255,11 +241,7 @@ impl Channel for AnyStaticChannel {
         self.number as usize
     }
 }
-impl StaticChannel for AnyStaticChannel {
-    fn degrade(self) -> AnyStaticChannel {
-        self
-    }
-}
+impl StaticChannel for AnyStaticChannel {}
 
 /// The any configurable channel can represent any configurable channel at runtime.
 /// This can be used to have fewer generic parameters in some places.
@@ -273,11 +255,7 @@ impl Channel for AnyConfigurableChannel {
         self.number as usize
     }
 }
-impl ConfigurableChannel for AnyConfigurableChannel {
-    fn degrade(self) -> AnyConfigurableChannel {
-        self
-    }
-}
+impl ConfigurableChannel for AnyConfigurableChannel {}
 
 #[cfg(not(feature = "_nrf51"))]
 macro_rules! impl_ppi_channel {
@@ -291,35 +269,23 @@ macro_rules! impl_ppi_channel {
     };
     ($type:ident, $number:expr => static) => {
         impl_ppi_channel!($type, $number);
-        impl crate::ppi::StaticChannel for peripherals::$type {
-            fn degrade(self) -> crate::ppi::AnyStaticChannel {
-                use crate::ppi::Channel;
-                crate::ppi::AnyStaticChannel {
-                    number: self.number() as u8,
-                }
-            }
-        }
-
+        impl crate::ppi::StaticChannel for peripherals::$type {}
         impl From<peripherals::$type> for crate::ppi::AnyStaticChannel {
             fn from(val: peripherals::$type) -> Self {
-                crate::ppi::StaticChannel::degrade(val)
+                Self {
+                    number: crate::ppi::Channel::number(&val) as u8,
+                }
             }
         }
     };
     ($type:ident, $number:expr => configurable) => {
         impl_ppi_channel!($type, $number);
-        impl crate::ppi::ConfigurableChannel for peripherals::$type {
-            fn degrade(self) -> crate::ppi::AnyConfigurableChannel {
-                use crate::ppi::Channel;
-                crate::ppi::AnyConfigurableChannel {
-                    number: self.number() as u8,
-                }
-            }
-        }
-
+        impl crate::ppi::ConfigurableChannel for peripherals::$type {}
         impl From<peripherals::$type> for crate::ppi::AnyConfigurableChannel {
             fn from(val: peripherals::$type) -> Self {
-                crate::ppi::ConfigurableChannel::degrade(val)
+                Self {
+                    number: crate::ppi::Channel::number(&val) as u8,
+                }
             }
         }
     };
@@ -351,7 +317,9 @@ macro_rules! impl_group {
 
         impl From<peripherals::$type> for crate::ppi::AnyGroup {
             fn from(val: peripherals::$type) -> Self {
-                crate::ppi::Group::degrade(val)
+                Self {
+                    number: crate::ppi::Group::number(&val) as u8,
+                }
             }
         }
     };
diff --git a/embassy-nrf/src/ppi/ppi.rs b/embassy-nrf/src/ppi/ppi.rs
index a1beb9dcd..e04dacbc0 100644
--- a/embassy-nrf/src/ppi/ppi.rs
+++ b/embassy-nrf/src/ppi/ppi.rs
@@ -1,7 +1,5 @@
-use embassy_hal_internal::into_ref;
-
 use super::{Channel, ConfigurableChannel, Event, Ppi, Task};
-use crate::{pac, Peripheral};
+use crate::{pac, Peri};
 
 impl<'d> Task<'d> {
     fn reg_val(&self) -> u32 {
@@ -21,9 +19,7 @@ pub(crate) fn regs() -> pac::ppi::Ppi {
 #[cfg(not(feature = "_nrf51"))] // Not for nrf51 because of the fork task
 impl<'d, C: super::StaticChannel> Ppi<'d, C, 0, 1> {
     /// Configure PPI channel to trigger `task`.
-    pub fn new_zero_to_one(ch: impl Peripheral<P = C> + 'd, task: Task) -> Self {
-        into_ref!(ch);
-
+    pub fn new_zero_to_one(ch: Peri<'d, C>, task: Task) -> Self {
         let r = regs();
         let n = ch.number();
         r.fork(n).tep().write_value(task.reg_val());
@@ -34,9 +30,7 @@ impl<'d, C: super::StaticChannel> Ppi<'d, C, 0, 1> {
 
 impl<'d, C: ConfigurableChannel> Ppi<'d, C, 1, 1> {
     /// Configure PPI channel to trigger `task` on `event`.
-    pub fn new_one_to_one(ch: impl Peripheral<P = C> + 'd, event: Event<'d>, task: Task<'d>) -> Self {
-        into_ref!(ch);
-
+    pub fn new_one_to_one(ch: Peri<'d, C>, event: Event<'d>, task: Task<'d>) -> Self {
         let r = regs();
         let n = ch.number();
         r.ch(n).eep().write_value(event.reg_val());
@@ -49,9 +43,7 @@ impl<'d, C: ConfigurableChannel> Ppi<'d, C, 1, 1> {
 #[cfg(not(feature = "_nrf51"))] // Not for nrf51 because of the fork task
 impl<'d, C: ConfigurableChannel> Ppi<'d, C, 1, 2> {
     /// Configure PPI channel to trigger both `task1` and `task2` on `event`.
-    pub fn new_one_to_two(ch: impl Peripheral<P = C> + 'd, event: Event<'d>, task1: Task<'d>, task2: Task<'d>) -> Self {
-        into_ref!(ch);
-
+    pub fn new_one_to_two(ch: Peri<'d, C>, event: Event<'d>, task1: Task<'d>, task2: Task<'d>) -> Self {
         let r = regs();
         let n = ch.number();
         r.ch(n).eep().write_value(event.reg_val());
diff --git a/embassy-nrf/src/pwm.rs b/embassy-nrf/src/pwm.rs
index 6247ff6a5..a2e153e26 100644
--- a/embassy-nrf/src/pwm.rs
+++ b/embassy-nrf/src/pwm.rs
@@ -4,34 +4,34 @@
 
 use core::sync::atomic::{compiler_fence, Ordering};
 
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 
 use crate::gpio::{convert_drive, AnyPin, OutputDrive, Pin as GpioPin, PselBits, SealedPin as _, DISCONNECTED};
 use crate::pac::gpio::vals as gpiovals;
 use crate::pac::pwm::vals;
 use crate::ppi::{Event, Task};
 use crate::util::slice_in_ram_or;
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac};
 
 /// SimplePwm is the traditional pwm interface you're probably used to, allowing
 /// to simply set a duty cycle across up to four channels.
 pub struct SimplePwm<'d, T: Instance> {
-    _peri: PeripheralRef<'d, T>,
+    _peri: Peri<'d, T>,
     duty: [u16; 4],
-    ch0: Option<PeripheralRef<'d, AnyPin>>,
-    ch1: Option<PeripheralRef<'d, AnyPin>>,
-    ch2: Option<PeripheralRef<'d, AnyPin>>,
-    ch3: Option<PeripheralRef<'d, AnyPin>>,
+    ch0: Option<Peri<'d, AnyPin>>,
+    ch1: Option<Peri<'d, AnyPin>>,
+    ch2: Option<Peri<'d, AnyPin>>,
+    ch3: Option<Peri<'d, AnyPin>>,
 }
 
 /// SequencePwm allows you to offload the updating of a sequence of duty cycles
 /// to up to four channels, as well as repeat that sequence n times.
 pub struct SequencePwm<'d, T: Instance> {
-    _peri: PeripheralRef<'d, T>,
-    ch0: Option<PeripheralRef<'d, AnyPin>>,
-    ch1: Option<PeripheralRef<'d, AnyPin>>,
-    ch2: Option<PeripheralRef<'d, AnyPin>>,
-    ch3: Option<PeripheralRef<'d, AnyPin>>,
+    _peri: Peri<'d, T>,
+    ch0: Option<Peri<'d, AnyPin>>,
+    ch1: Option<Peri<'d, AnyPin>>,
+    ch2: Option<Peri<'d, AnyPin>>,
+    ch3: Option<Peri<'d, AnyPin>>,
 }
 
 /// PWM error
@@ -54,78 +54,61 @@ pub const PWM_CLK_HZ: u32 = 16_000_000;
 impl<'d, T: Instance> SequencePwm<'d, T> {
     /// Create a new 1-channel PWM
     #[allow(unused_unsafe)]
-    pub fn new_1ch(
-        pwm: impl Peripheral<P = T> + 'd,
-        ch0: impl Peripheral<P = impl GpioPin> + 'd,
-        config: Config,
-    ) -> Result<Self, Error> {
-        into_ref!(ch0);
-        Self::new_inner(pwm, Some(ch0.map_into()), None, None, None, config)
+    pub fn new_1ch(pwm: Peri<'d, T>, ch0: Peri<'d, impl GpioPin>, config: Config) -> Result<Self, Error> {
+        Self::new_inner(pwm, Some(ch0.into()), None, None, None, config)
     }
 
     /// Create a new 2-channel PWM
     #[allow(unused_unsafe)]
     pub fn new_2ch(
-        pwm: impl Peripheral<P = T> + 'd,
-        ch0: impl Peripheral<P = impl GpioPin> + 'd,
-        ch1: impl Peripheral<P = impl GpioPin> + 'd,
+        pwm: Peri<'d, T>,
+        ch0: Peri<'d, impl GpioPin>,
+        ch1: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Result<Self, Error> {
-        into_ref!(ch0, ch1);
-        Self::new_inner(pwm, Some(ch0.map_into()), Some(ch1.map_into()), None, None, config)
+        Self::new_inner(pwm, Some(ch0.into()), Some(ch1.into()), None, None, config)
     }
 
     /// Create a new 3-channel PWM
     #[allow(unused_unsafe)]
     pub fn new_3ch(
-        pwm: impl Peripheral<P = T> + 'd,
-        ch0: impl Peripheral<P = impl GpioPin> + 'd,
-        ch1: impl Peripheral<P = impl GpioPin> + 'd,
-        ch2: impl Peripheral<P = impl GpioPin> + 'd,
+        pwm: Peri<'d, T>,
+        ch0: Peri<'d, impl GpioPin>,
+        ch1: Peri<'d, impl GpioPin>,
+        ch2: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Result<Self, Error> {
-        into_ref!(ch0, ch1, ch2);
-        Self::new_inner(
-            pwm,
-            Some(ch0.map_into()),
-            Some(ch1.map_into()),
-            Some(ch2.map_into()),
-            None,
-            config,
-        )
+        Self::new_inner(pwm, Some(ch0.into()), Some(ch1.into()), Some(ch2.into()), None, config)
     }
 
     /// Create a new 4-channel PWM
     #[allow(unused_unsafe)]
     pub fn new_4ch(
-        pwm: impl Peripheral<P = T> + 'd,
-        ch0: impl Peripheral<P = impl GpioPin> + 'd,
-        ch1: impl Peripheral<P = impl GpioPin> + 'd,
-        ch2: impl Peripheral<P = impl GpioPin> + 'd,
-        ch3: impl Peripheral<P = impl GpioPin> + 'd,
+        pwm: Peri<'d, T>,
+        ch0: Peri<'d, impl GpioPin>,
+        ch1: Peri<'d, impl GpioPin>,
+        ch2: Peri<'d, impl GpioPin>,
+        ch3: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Result<Self, Error> {
-        into_ref!(ch0, ch1, ch2, ch3);
         Self::new_inner(
             pwm,
-            Some(ch0.map_into()),
-            Some(ch1.map_into()),
-            Some(ch2.map_into()),
-            Some(ch3.map_into()),
+            Some(ch0.into()),
+            Some(ch1.into()),
+            Some(ch2.into()),
+            Some(ch3.into()),
             config,
         )
     }
 
     fn new_inner(
-        _pwm: impl Peripheral<P = T> + 'd,
-        ch0: Option<PeripheralRef<'d, AnyPin>>,
-        ch1: Option<PeripheralRef<'d, AnyPin>>,
-        ch2: Option<PeripheralRef<'d, AnyPin>>,
-        ch3: Option<PeripheralRef<'d, AnyPin>>,
+        _pwm: Peri<'d, T>,
+        ch0: Option<Peri<'d, AnyPin>>,
+        ch1: Option<Peri<'d, AnyPin>>,
+        ch2: Option<Peri<'d, AnyPin>>,
+        ch3: Option<Peri<'d, AnyPin>>,
         config: Config,
     ) -> Result<Self, Error> {
-        into_ref!(_pwm);
-
         let r = T::regs();
 
         if let Some(pin) = &ch0 {
@@ -610,74 +593,54 @@ pub enum CounterMode {
 impl<'d, T: Instance> SimplePwm<'d, T> {
     /// Create a new 1-channel PWM
     #[allow(unused_unsafe)]
-    pub fn new_1ch(pwm: impl Peripheral<P = T> + 'd, ch0: impl Peripheral<P = impl GpioPin> + 'd) -> Self {
-        unsafe {
-            into_ref!(ch0);
-            Self::new_inner(pwm, Some(ch0.map_into()), None, None, None)
-        }
+    pub fn new_1ch(pwm: Peri<'d, T>, ch0: Peri<'d, impl GpioPin>) -> Self {
+        unsafe { Self::new_inner(pwm, Some(ch0.into()), None, None, None) }
     }
 
     /// Create a new 2-channel PWM
     #[allow(unused_unsafe)]
-    pub fn new_2ch(
-        pwm: impl Peripheral<P = T> + 'd,
-        ch0: impl Peripheral<P = impl GpioPin> + 'd,
-        ch1: impl Peripheral<P = impl GpioPin> + 'd,
-    ) -> Self {
-        into_ref!(ch0, ch1);
-        Self::new_inner(pwm, Some(ch0.map_into()), Some(ch1.map_into()), None, None)
+    pub fn new_2ch(pwm: Peri<'d, T>, ch0: Peri<'d, impl GpioPin>, ch1: Peri<'d, impl GpioPin>) -> Self {
+        Self::new_inner(pwm, Some(ch0.into()), Some(ch1.into()), None, None)
     }
 
     /// Create a new 3-channel PWM
     #[allow(unused_unsafe)]
     pub fn new_3ch(
-        pwm: impl Peripheral<P = T> + 'd,
-        ch0: impl Peripheral<P = impl GpioPin> + 'd,
-        ch1: impl Peripheral<P = impl GpioPin> + 'd,
-        ch2: impl Peripheral<P = impl GpioPin> + 'd,
+        pwm: Peri<'d, T>,
+        ch0: Peri<'d, impl GpioPin>,
+        ch1: Peri<'d, impl GpioPin>,
+        ch2: Peri<'d, impl GpioPin>,
     ) -> Self {
-        unsafe {
-            into_ref!(ch0, ch1, ch2);
-            Self::new_inner(
-                pwm,
-                Some(ch0.map_into()),
-                Some(ch1.map_into()),
-                Some(ch2.map_into()),
-                None,
-            )
-        }
+        unsafe { Self::new_inner(pwm, Some(ch0.into()), Some(ch1.into()), Some(ch2.into()), None) }
     }
 
     /// Create a new 4-channel PWM
     #[allow(unused_unsafe)]
     pub fn new_4ch(
-        pwm: impl Peripheral<P = T> + 'd,
-        ch0: impl Peripheral<P = impl GpioPin> + 'd,
-        ch1: impl Peripheral<P = impl GpioPin> + 'd,
-        ch2: impl Peripheral<P = impl GpioPin> + 'd,
-        ch3: impl Peripheral<P = impl GpioPin> + 'd,
+        pwm: Peri<'d, T>,
+        ch0: Peri<'d, impl GpioPin>,
+        ch1: Peri<'d, impl GpioPin>,
+        ch2: Peri<'d, impl GpioPin>,
+        ch3: Peri<'d, impl GpioPin>,
     ) -> Self {
         unsafe {
-            into_ref!(ch0, ch1, ch2, ch3);
             Self::new_inner(
                 pwm,
-                Some(ch0.map_into()),
-                Some(ch1.map_into()),
-                Some(ch2.map_into()),
-                Some(ch3.map_into()),
+                Some(ch0.into()),
+                Some(ch1.into()),
+                Some(ch2.into()),
+                Some(ch3.into()),
             )
         }
     }
 
     fn new_inner(
-        _pwm: impl Peripheral<P = T> + 'd,
-        ch0: Option<PeripheralRef<'d, AnyPin>>,
-        ch1: Option<PeripheralRef<'d, AnyPin>>,
-        ch2: Option<PeripheralRef<'d, AnyPin>>,
-        ch3: Option<PeripheralRef<'d, AnyPin>>,
+        _pwm: Peri<'d, T>,
+        ch0: Option<Peri<'d, AnyPin>>,
+        ch1: Option<Peri<'d, AnyPin>>,
+        ch2: Option<Peri<'d, AnyPin>>,
+        ch3: Option<Peri<'d, AnyPin>>,
     ) -> Self {
-        into_ref!(_pwm);
-
         let r = T::regs();
 
         for (i, ch) in [&ch0, &ch1, &ch2, &ch3].into_iter().enumerate() {
@@ -896,7 +859,7 @@ pub(crate) trait SealedInstance {
 
 /// PWM peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static {
+pub trait Instance: SealedInstance + PeripheralType + 'static {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/qdec.rs b/embassy-nrf/src/qdec.rs
index efd2a134c..69bfab0bb 100644
--- a/embassy-nrf/src/qdec.rs
+++ b/embassy-nrf/src/qdec.rs
@@ -6,18 +6,18 @@ use core::future::poll_fn;
 use core::marker::PhantomData;
 use core::task::Poll;
 
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 
 use crate::gpio::{AnyPin, Pin as GpioPin, SealedPin as _};
 use crate::interrupt::typelevel::Interrupt;
 use crate::pac::gpio::vals as gpiovals;
 use crate::pac::qdec::vals;
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac};
 
 /// Quadrature decoder driver.
 pub struct Qdec<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
 }
 
 /// QDEC config
@@ -62,34 +62,32 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
 impl<'d, T: Instance> Qdec<'d, T> {
     /// Create a new QDEC.
     pub fn new(
-        qdec: impl Peripheral<P = T> + 'd,
+        qdec: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        a: impl Peripheral<P = impl GpioPin> + 'd,
-        b: impl Peripheral<P = impl GpioPin> + 'd,
+        a: Peri<'d, impl GpioPin>,
+        b: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(qdec, a, b);
-        Self::new_inner(qdec, a.map_into(), b.map_into(), None, config)
+        Self::new_inner(qdec, a.into(), b.into(), None, config)
     }
 
     /// Create a new QDEC, with a pin for LED output.
     pub fn new_with_led(
-        qdec: impl Peripheral<P = T> + 'd,
+        qdec: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        a: impl Peripheral<P = impl GpioPin> + 'd,
-        b: impl Peripheral<P = impl GpioPin> + 'd,
-        led: impl Peripheral<P = impl GpioPin> + 'd,
+        a: Peri<'d, impl GpioPin>,
+        b: Peri<'d, impl GpioPin>,
+        led: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(qdec, a, b, led);
-        Self::new_inner(qdec, a.map_into(), b.map_into(), Some(led.map_into()), config)
+        Self::new_inner(qdec, a.into(), b.into(), Some(led.into()), config)
     }
 
     fn new_inner(
-        p: PeripheralRef<'d, T>,
-        a: PeripheralRef<'d, AnyPin>,
-        b: PeripheralRef<'d, AnyPin>,
-        led: Option<PeripheralRef<'d, AnyPin>>,
+        p: Peri<'d, T>,
+        a: Peri<'d, AnyPin>,
+        b: Peri<'d, AnyPin>,
+        led: Option<Peri<'d, AnyPin>>,
         config: Config,
     ) -> Self {
         let r = T::regs();
@@ -272,7 +270,7 @@ pub(crate) trait SealedInstance {
 
 /// qdec peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static + Send {
+pub trait Instance: SealedInstance + PeripheralType + 'static + Send {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/qspi.rs b/embassy-nrf/src/qspi.rs
index 17e127700..e6e829f6e 100755
--- a/embassy-nrf/src/qspi.rs
+++ b/embassy-nrf/src/qspi.rs
@@ -8,7 +8,7 @@ use core::ptr;
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 use embedded_storage::nor_flash::{ErrorType, NorFlash, NorFlashError, NorFlashErrorKind, ReadNorFlash};
 
@@ -19,7 +19,7 @@ use crate::pac::qspi::vals;
 pub use crate::pac::qspi::vals::{
     Addrmode as AddressMode, Ppsize as WritePageSize, Readoc as ReadOpcode, Spimode as SpiMode, Writeoc as WriteOpcode,
 };
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac};
 
 /// Deep power-down config.
 pub struct DeepPowerDownConfig {
@@ -139,7 +139,7 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
 
 /// QSPI flash driver.
 pub struct Qspi<'d, T: Instance> {
-    _peri: PeripheralRef<'d, T>,
+    _peri: Peri<'d, T>,
     dpm_enabled: bool,
     capacity: u32,
 }
@@ -147,18 +147,16 @@ pub struct Qspi<'d, T: Instance> {
 impl<'d, T: Instance> Qspi<'d, T> {
     /// Create a new QSPI driver.
     pub fn new(
-        qspi: impl Peripheral<P = T> + 'd,
+        qspi: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        sck: impl Peripheral<P = impl GpioPin> + 'd,
-        csn: impl Peripheral<P = impl GpioPin> + 'd,
-        io0: impl Peripheral<P = impl GpioPin> + 'd,
-        io1: impl Peripheral<P = impl GpioPin> + 'd,
-        io2: impl Peripheral<P = impl GpioPin> + 'd,
-        io3: impl Peripheral<P = impl GpioPin> + 'd,
+        sck: Peri<'d, impl GpioPin>,
+        csn: Peri<'d, impl GpioPin>,
+        io0: Peri<'d, impl GpioPin>,
+        io1: Peri<'d, impl GpioPin>,
+        io2: Peri<'d, impl GpioPin>,
+        io3: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(qspi, sck, csn, io0, io1, io2, io3);
-
         let r = T::regs();
 
         macro_rules! config_pin {
@@ -664,7 +662,7 @@ pub(crate) trait SealedInstance {
 
 /// QSPI peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static + Send {
+pub trait Instance: SealedInstance + PeripheralType + 'static + Send {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/radio/ble.rs b/embassy-nrf/src/radio/ble.rs
index 682ca1c79..d42bbe5f6 100644
--- a/embassy-nrf/src/radio/ble.rs
+++ b/embassy-nrf/src/radio/ble.rs
@@ -5,7 +5,6 @@ use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
-use embassy_hal_internal::{into_ref, PeripheralRef};
 pub use pac::radio::vals::Mode;
 #[cfg(not(feature = "_nrf51"))]
 use pac::radio::vals::Plen as PreambleLength;
@@ -15,20 +14,19 @@ use crate::pac::radio::vals;
 use crate::radio::*;
 pub use crate::radio::{Error, TxPower};
 use crate::util::slice_in_ram_or;
+use crate::Peri;
 
 /// Radio driver.
 pub struct Radio<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
 }
 
 impl<'d, T: Instance> Radio<'d, T> {
     /// Create a new radio driver.
     pub fn new(
-        radio: impl Peripheral<P = T> + 'd,
+        radio: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
     ) -> Self {
-        into_ref!(radio);
-
         let r = T::regs();
 
         r.pcnf1().write(|w| {
diff --git a/embassy-nrf/src/radio/ieee802154.rs b/embassy-nrf/src/radio/ieee802154.rs
index 083842f4a..2f0bcbe04 100644
--- a/embassy-nrf/src/radio/ieee802154.rs
+++ b/embassy-nrf/src/radio/ieee802154.rs
@@ -4,13 +4,12 @@ use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
-use embassy_hal_internal::{into_ref, PeripheralRef};
 
 use super::{state, Error, Instance, InterruptHandler, RadioState, TxPower};
 use crate::interrupt::typelevel::Interrupt;
 use crate::interrupt::{self};
 use crate::pac::radio::vals;
-use crate::Peripheral;
+use crate::Peri;
 
 /// Default (IEEE compliant) Start of Frame Delimiter
 pub const DEFAULT_SFD: u8 = 0xA7;
@@ -33,18 +32,16 @@ pub enum Cca {
 
 /// IEEE 802.15.4 radio driver.
 pub struct Radio<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
     needs_enable: bool,
 }
 
 impl<'d, T: Instance> Radio<'d, T> {
     /// Create a new IEEE 802.15.4 radio driver.
     pub fn new(
-        radio: impl Peripheral<P = T> + 'd,
+        radio: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
     ) -> Self {
-        into_ref!(radio);
-
         let r = T::regs();
 
         // Disable and enable to reset peripheral
diff --git a/embassy-nrf/src/radio/mod.rs b/embassy-nrf/src/radio/mod.rs
index 251f37d3d..982436266 100644
--- a/embassy-nrf/src/radio/mod.rs
+++ b/embassy-nrf/src/radio/mod.rs
@@ -19,11 +19,12 @@ pub mod ieee802154;
 
 use core::marker::PhantomData;
 
+use embassy_hal_internal::PeripheralType;
 use embassy_sync::waitqueue::AtomicWaker;
 use pac::radio::vals::State as RadioState;
 pub use pac::radio::vals::Txpower as TxPower;
 
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac};
 
 /// RADIO error.
 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
@@ -94,7 +95,7 @@ macro_rules! impl_radio {
 
 /// Radio peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static + Send {
+pub trait Instance: SealedInstance + PeripheralType + 'static + Send {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/rng.rs b/embassy-nrf/src/rng.rs
index 7a98ab2fb..e75ffda00 100644
--- a/embassy-nrf/src/rng.rs
+++ b/embassy-nrf/src/rng.rs
@@ -10,11 +10,11 @@ use core::task::Poll;
 
 use critical_section::{CriticalSection, Mutex};
 use embassy_hal_internal::drop::OnDrop;
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::WakerRegistration;
 
 use crate::interrupt::typelevel::Interrupt;
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac};
 
 /// Interrupt handler.
 pub struct InterruptHandler<T: Instance> {
@@ -56,7 +56,7 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
 ///
 /// It has a non-blocking API, and a blocking api through `rand`.
 pub struct Rng<'d, T: Instance> {
-    _peri: PeripheralRef<'d, T>,
+    _peri: Peri<'d, T>,
 }
 
 impl<'d, T: Instance> Rng<'d, T> {
@@ -67,11 +67,9 @@ impl<'d, T: Instance> Rng<'d, T> {
     ///
     /// The synchronous API is safe.
     pub fn new(
-        rng: impl Peripheral<P = T> + 'd,
+        rng: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
     ) -> Self {
-        into_ref!(rng);
-
         let this = Self { _peri: rng };
 
         this.stop();
@@ -250,7 +248,7 @@ pub(crate) trait SealedInstance {
 
 /// RNG peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static + Send {
+pub trait Instance: SealedInstance + PeripheralType + 'static + Send {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/saadc.rs b/embassy-nrf/src/saadc.rs
index 00e2b7402..92b6fb01f 100644
--- a/embassy-nrf/src/saadc.rs
+++ b/embassy-nrf/src/saadc.rs
@@ -3,11 +3,12 @@
 #![macro_use]
 
 use core::future::poll_fn;
+use core::marker::PhantomData;
 use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
-use embassy_hal_internal::{impl_peripheral, into_ref, PeripheralRef};
+use embassy_hal_internal::{impl_peripheral, Peri};
 use embassy_sync::waitqueue::AtomicWaker;
 pub(crate) use vals::Psel as InputChannel;
 
@@ -15,7 +16,7 @@ use crate::interrupt::InterruptExt;
 use crate::pac::saadc::vals;
 use crate::ppi::{ConfigurableChannel, Event, Ppi, Task};
 use crate::timer::{Frequency, Instance as TimerInstance, Timer};
-use crate::{interrupt, pac, peripherals, Peripheral};
+use crate::{interrupt, pac, peripherals};
 
 /// SAADC error
 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
@@ -87,37 +88,32 @@ pub struct ChannelConfig<'d> {
     /// Acquisition time in microseconds.
     pub time: Time,
     /// Positive channel to sample
-    p_channel: PeripheralRef<'d, AnyInput>,
+    p_channel: AnyInput<'d>,
     /// An optional negative channel to sample
-    n_channel: Option<PeripheralRef<'d, AnyInput>>,
+    n_channel: Option<AnyInput<'d>>,
 }
 
 impl<'d> ChannelConfig<'d> {
     /// Default configuration for single ended channel sampling.
-    pub fn single_ended(input: impl Peripheral<P = impl Input> + 'd) -> Self {
-        into_ref!(input);
+    pub fn single_ended(input: impl Input + 'd) -> Self {
         Self {
             reference: Reference::INTERNAL,
             gain: Gain::GAIN1_6,
             resistor: Resistor::BYPASS,
             time: Time::_10US,
-            p_channel: input.map_into(),
+            p_channel: input.degrade_saadc(),
             n_channel: None,
         }
     }
     /// Default configuration for differential channel sampling.
-    pub fn differential(
-        p_input: impl Peripheral<P = impl Input> + 'd,
-        n_input: impl Peripheral<P = impl Input> + 'd,
-    ) -> Self {
-        into_ref!(p_input, n_input);
+    pub fn differential(p_input: impl Input + 'd, n_input: impl Input + 'd) -> Self {
         Self {
             reference: Reference::INTERNAL,
             gain: Gain::GAIN1_6,
             resistor: Resistor::BYPASS,
             time: Time::_10US,
-            p_channel: p_input.map_into(),
-            n_channel: Some(n_input.map_into()),
+            p_channel: p_input.degrade_saadc(),
+            n_channel: Some(n_input.degrade_saadc()),
         }
     }
 }
@@ -133,19 +129,17 @@ pub enum CallbackResult {
 
 /// One-shot and continuous SAADC.
 pub struct Saadc<'d, const N: usize> {
-    _p: PeripheralRef<'d, peripherals::SAADC>,
+    _p: Peri<'d, peripherals::SAADC>,
 }
 
 impl<'d, const N: usize> Saadc<'d, N> {
     /// Create a new SAADC driver.
     pub fn new(
-        saadc: impl Peripheral<P = peripherals::SAADC> + 'd,
+        saadc: Peri<'d, peripherals::SAADC>,
         _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::SAADC, InterruptHandler> + 'd,
         config: Config,
         channel_configs: [ChannelConfig; N],
     ) -> Self {
-        into_ref!(saadc);
-
         let r = pac::SAADC;
 
         let Config { resolution, oversample } = config;
@@ -284,9 +278,9 @@ impl<'d, const N: usize> Saadc<'d, N> {
 
     pub async fn run_task_sampler<F, T: TimerInstance, const N0: usize>(
         &mut self,
-        timer: &mut T,
-        ppi_ch1: &mut impl ConfigurableChannel,
-        ppi_ch2: &mut impl ConfigurableChannel,
+        timer: Peri<'_, T>,
+        ppi_ch1: Peri<'_, impl ConfigurableChannel>,
+        ppi_ch2: Peri<'_, impl ConfigurableChannel>,
         frequency: Frequency,
         sample_counter: u32,
         bufs: &mut [[[i16; N]; N0]; 2],
@@ -655,14 +649,18 @@ pub(crate) trait SealedInput {
 
 /// An input that can be used as either or negative end of a ADC differential in the SAADC periperhal.
 #[allow(private_bounds)]
-pub trait Input: SealedInput + Into<AnyInput> + Peripheral<P = Self> + Sized + 'static {
+pub trait Input: SealedInput + Sized {
     /// Convert this SAADC input to a type-erased `AnyInput`.
     ///
     /// This allows using several inputs  in situations that might require
     /// them to be the same type, like putting them in an array.
-    fn degrade_saadc(self) -> AnyInput {
+    fn degrade_saadc<'a>(self) -> AnyInput<'a>
+    where
+        Self: 'a,
+    {
         AnyInput {
             channel: self.channel(),
+            _phantom: core::marker::PhantomData,
         }
     }
 }
@@ -671,23 +669,36 @@ pub trait Input: SealedInput + Into<AnyInput> + Peripheral<P = Self> + Sized + '
 ///
 /// This allows using several inputs  in situations that might require
 /// them to be the same type, like putting them in an array.
-pub struct AnyInput {
+pub struct AnyInput<'a> {
     channel: InputChannel,
+    _phantom: PhantomData<&'a ()>,
 }
 
-impl_peripheral!(AnyInput);
+impl<'a> AnyInput<'a> {
+    /// Reborrow into a "child" AnyInput.
+    ///
+    /// `self` will stay borrowed until the child AnyInput is dropped.
+    pub fn reborrow(&mut self) -> AnyInput<'_> {
+        // safety: we're returning the clone inside a new Peripheral that borrows
+        // self, so user code can't use both at the same time.
+        Self {
+            channel: self.channel,
+            _phantom: PhantomData,
+        }
+    }
+}
 
-impl SealedInput for AnyInput {
+impl SealedInput for AnyInput<'_> {
     fn channel(&self) -> InputChannel {
         self.channel
     }
 }
 
-impl Input for AnyInput {}
+impl Input for AnyInput<'_> {}
 
 macro_rules! impl_saadc_input {
     ($pin:ident, $ch:ident) => {
-        impl_saadc_input!(@local, crate::peripherals::$pin, $ch);
+        impl_saadc_input!(@local, crate::Peri<'_, crate::peripherals::$pin>, $ch);
     };
     (@local, $pin:ty, $ch:ident) => {
         impl crate::saadc::SealedInput for $pin {
@@ -696,12 +707,6 @@ macro_rules! impl_saadc_input {
             }
         }
         impl crate::saadc::Input for $pin {}
-
-        impl From<$pin> for crate::saadc::AnyInput {
-            fn from(val: $pin) -> Self {
-                crate::saadc::Input::degrade_saadc(val)
-            }
-        }
     };
 }
 
diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs
index bd193cfe8..59f5b6d58 100644
--- a/embassy-nrf/src/spim.rs
+++ b/embassy-nrf/src/spim.rs
@@ -10,7 +10,7 @@ use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::Poll;
 
 use embassy_embedded_hal::SetConfig;
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
 pub use pac::spim::vals::{Frequency, Order as BitOrder};
@@ -21,7 +21,7 @@ use crate::interrupt::typelevel::Interrupt;
 use crate::pac::gpio::vals as gpiovals;
 use crate::pac::spim::vals;
 use crate::util::slice_in_ram_or;
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac};
 
 /// SPIM error
 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
@@ -100,73 +100,61 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
 
 /// SPIM driver.
 pub struct Spim<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
 }
 
 impl<'d, T: Instance> Spim<'d, T> {
     /// Create a new SPIM driver.
     pub fn new(
-        spim: impl Peripheral<P = T> + 'd,
+        spim: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        sck: impl Peripheral<P = impl GpioPin> + 'd,
-        miso: impl Peripheral<P = impl GpioPin> + 'd,
-        mosi: impl Peripheral<P = impl GpioPin> + 'd,
+        sck: Peri<'d, impl GpioPin>,
+        miso: Peri<'d, impl GpioPin>,
+        mosi: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(sck, miso, mosi);
-        Self::new_inner(
-            spim,
-            Some(sck.map_into()),
-            Some(miso.map_into()),
-            Some(mosi.map_into()),
-            config,
-        )
+        Self::new_inner(spim, Some(sck.into()), Some(miso.into()), Some(mosi.into()), config)
     }
 
     /// Create a new SPIM driver, capable of TX only (MOSI only).
     pub fn new_txonly(
-        spim: impl Peripheral<P = T> + 'd,
+        spim: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        sck: impl Peripheral<P = impl GpioPin> + 'd,
-        mosi: impl Peripheral<P = impl GpioPin> + 'd,
+        sck: Peri<'d, impl GpioPin>,
+        mosi: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(sck, mosi);
-        Self::new_inner(spim, Some(sck.map_into()), None, Some(mosi.map_into()), config)
+        Self::new_inner(spim, Some(sck.into()), None, Some(mosi.into()), config)
     }
 
     /// Create a new SPIM driver, capable of RX only (MISO only).
     pub fn new_rxonly(
-        spim: impl Peripheral<P = T> + 'd,
+        spim: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        sck: impl Peripheral<P = impl GpioPin> + 'd,
-        miso: impl Peripheral<P = impl GpioPin> + 'd,
+        sck: Peri<'d, impl GpioPin>,
+        miso: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(sck, miso);
-        Self::new_inner(spim, Some(sck.map_into()), Some(miso.map_into()), None, config)
+        Self::new_inner(spim, Some(sck.into()), Some(miso.into()), None, config)
     }
 
     /// Create a new SPIM driver, capable of TX only (MOSI only), without SCK pin.
     pub fn new_txonly_nosck(
-        spim: impl Peripheral<P = T> + 'd,
+        spim: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        mosi: impl Peripheral<P = impl GpioPin> + 'd,
+        mosi: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(mosi);
-        Self::new_inner(spim, None, None, Some(mosi.map_into()), config)
+        Self::new_inner(spim, None, None, Some(mosi.into()), config)
     }
 
     fn new_inner(
-        spim: impl Peripheral<P = T> + 'd,
-        sck: Option<PeripheralRef<'d, AnyPin>>,
-        miso: Option<PeripheralRef<'d, AnyPin>>,
-        mosi: Option<PeripheralRef<'d, AnyPin>>,
+        spim: Peri<'d, T>,
+        sck: Option<Peri<'d, AnyPin>>,
+        miso: Option<Peri<'d, AnyPin>>,
+        mosi: Option<Peri<'d, AnyPin>>,
         config: Config,
     ) -> Self {
-        into_ref!(spim);
-
         let r = T::regs();
 
         // Configure pins
@@ -511,7 +499,7 @@ pub(crate) trait SealedInstance {
 
 /// SPIM peripheral instance
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static {
+pub trait Instance: SealedInstance + PeripheralType + 'static {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/spis.rs b/embassy-nrf/src/spis.rs
index 88230fa26..2a3928d25 100644
--- a/embassy-nrf/src/spis.rs
+++ b/embassy-nrf/src/spis.rs
@@ -7,7 +7,7 @@ use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::Poll;
 
 use embassy_embedded_hal::SetConfig;
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
 pub use pac::spis::vals::Order as BitOrder;
@@ -18,7 +18,7 @@ use crate::interrupt::typelevel::Interrupt;
 use crate::pac::gpio::vals as gpiovals;
 use crate::pac::spis::vals;
 use crate::util::slice_in_ram_or;
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac};
 
 /// SPIS error
 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
@@ -98,95 +98,75 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
 
 /// SPIS driver.
 pub struct Spis<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
 }
 
 impl<'d, T: Instance> Spis<'d, T> {
     /// Create a new SPIS driver.
     pub fn new(
-        spis: impl Peripheral<P = T> + 'd,
+        spis: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        cs: impl Peripheral<P = impl GpioPin> + 'd,
-        sck: impl Peripheral<P = impl GpioPin> + 'd,
-        miso: impl Peripheral<P = impl GpioPin> + 'd,
-        mosi: impl Peripheral<P = impl GpioPin> + 'd,
+        cs: Peri<'d, impl GpioPin>,
+        sck: Peri<'d, impl GpioPin>,
+        miso: Peri<'d, impl GpioPin>,
+        mosi: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(cs, sck, miso, mosi);
         Self::new_inner(
             spis,
-            cs.map_into(),
-            Some(sck.map_into()),
-            Some(miso.map_into()),
-            Some(mosi.map_into()),
+            cs.into(),
+            Some(sck.into()),
+            Some(miso.into()),
+            Some(mosi.into()),
             config,
         )
     }
 
     /// Create a new SPIS driver, capable of TX only (MISO only).
     pub fn new_txonly(
-        spis: impl Peripheral<P = T> + 'd,
+        spis: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        cs: impl Peripheral<P = impl GpioPin> + 'd,
-        sck: impl Peripheral<P = impl GpioPin> + 'd,
-        miso: impl Peripheral<P = impl GpioPin> + 'd,
+        cs: Peri<'d, impl GpioPin>,
+        sck: Peri<'d, impl GpioPin>,
+        miso: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(cs, sck, miso);
-        Self::new_inner(
-            spis,
-            cs.map_into(),
-            Some(sck.map_into()),
-            Some(miso.map_into()),
-            None,
-            config,
-        )
+        Self::new_inner(spis, cs.into(), Some(sck.into()), Some(miso.into()), None, config)
     }
 
     /// Create a new SPIS driver, capable of RX only (MOSI only).
     pub fn new_rxonly(
-        spis: impl Peripheral<P = T> + 'd,
+        spis: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        cs: impl Peripheral<P = impl GpioPin> + 'd,
-        sck: impl Peripheral<P = impl GpioPin> + 'd,
-        mosi: impl Peripheral<P = impl GpioPin> + 'd,
+        cs: Peri<'d, impl GpioPin>,
+        sck: Peri<'d, impl GpioPin>,
+        mosi: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(cs, sck, mosi);
-        Self::new_inner(
-            spis,
-            cs.map_into(),
-            Some(sck.map_into()),
-            None,
-            Some(mosi.map_into()),
-            config,
-        )
+        Self::new_inner(spis, cs.into(), Some(sck.into()), None, Some(mosi.into()), config)
     }
 
     /// Create a new SPIS driver, capable of TX only (MISO only) without SCK pin.
     pub fn new_txonly_nosck(
-        spis: impl Peripheral<P = T> + 'd,
+        spis: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        cs: impl Peripheral<P = impl GpioPin> + 'd,
-        miso: impl Peripheral<P = impl GpioPin> + 'd,
+        cs: Peri<'d, impl GpioPin>,
+        miso: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(cs, miso);
-        Self::new_inner(spis, cs.map_into(), None, Some(miso.map_into()), None, config)
+        Self::new_inner(spis, cs.into(), None, Some(miso.into()), None, config)
     }
 
     fn new_inner(
-        spis: impl Peripheral<P = T> + 'd,
-        cs: PeripheralRef<'d, AnyPin>,
-        sck: Option<PeripheralRef<'d, AnyPin>>,
-        miso: Option<PeripheralRef<'d, AnyPin>>,
-        mosi: Option<PeripheralRef<'d, AnyPin>>,
+        spis: Peri<'d, T>,
+        cs: Peri<'d, AnyPin>,
+        sck: Option<Peri<'d, AnyPin>>,
+        miso: Option<Peri<'d, AnyPin>>,
+        mosi: Option<Peri<'d, AnyPin>>,
         config: Config,
     ) -> Self {
         compiler_fence(Ordering::SeqCst);
 
-        into_ref!(spis, cs);
-
         let r = T::regs();
 
         // Configure pins.
@@ -485,7 +465,7 @@ pub(crate) trait SealedInstance {
 
 /// SPIS peripheral instance
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static {
+pub trait Instance: SealedInstance + PeripheralType + 'static {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/temp.rs b/embassy-nrf/src/temp.rs
index 1488c5c24..44be0f6d1 100644
--- a/embassy-nrf/src/temp.rs
+++ b/embassy-nrf/src/temp.rs
@@ -4,13 +4,12 @@ use core::future::poll_fn;
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
-use embassy_hal_internal::{into_ref, PeripheralRef};
 use embassy_sync::waitqueue::AtomicWaker;
 use fixed::types::I30F2;
 
 use crate::interrupt::InterruptExt;
 use crate::peripherals::TEMP;
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac, Peri};
 
 /// Interrupt handler.
 pub struct InterruptHandler {
@@ -27,7 +26,7 @@ impl interrupt::typelevel::Handler<interrupt::typelevel::TEMP> for InterruptHand
 
 /// Builtin temperature sensor driver.
 pub struct Temp<'d> {
-    _peri: PeripheralRef<'d, TEMP>,
+    _peri: Peri<'d, TEMP>,
 }
 
 static WAKER: AtomicWaker = AtomicWaker::new();
@@ -35,11 +34,9 @@ static WAKER: AtomicWaker = AtomicWaker::new();
 impl<'d> Temp<'d> {
     /// Create a new temperature sensor driver.
     pub fn new(
-        _peri: impl Peripheral<P = TEMP> + 'd,
+        _peri: Peri<'d, TEMP>,
         _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::TEMP, InterruptHandler> + 'd,
     ) -> Self {
-        into_ref!(_peri);
-
         // Enable interrupt that signals temperature values
         interrupt::TEMP.unpend();
         unsafe { interrupt::TEMP.enable() };
diff --git a/embassy-nrf/src/timer.rs b/embassy-nrf/src/timer.rs
index a9aeb40fa..5b58b0a50 100644
--- a/embassy-nrf/src/timer.rs
+++ b/embassy-nrf/src/timer.rs
@@ -6,11 +6,11 @@
 
 #![macro_use]
 
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 
+use crate::pac;
 use crate::pac::timer::vals;
 use crate::ppi::{Event, Task};
-use crate::{pac, Peripheral};
 
 pub(crate) trait SealedInstance {
     /// The number of CC registers this instance has.
@@ -20,7 +20,7 @@ pub(crate) trait SealedInstance {
 
 /// Basic Timer instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static + Send {
+pub trait Instance: SealedInstance + PeripheralType + 'static + Send {
     /// Interrupt for this peripheral.
     type Interrupt: crate::interrupt::typelevel::Interrupt;
 }
@@ -84,7 +84,7 @@ pub enum Frequency {
 
 /// Timer driver.
 pub struct Timer<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
 }
 
 impl<'d, T: Instance> Timer<'d, T> {
@@ -92,7 +92,7 @@ impl<'d, T: Instance> Timer<'d, T> {
     ///
     /// This can be useful for triggering tasks via PPI
     /// `Uarte` uses this internally.
-    pub fn new(timer: impl Peripheral<P = T> + 'd) -> Self {
+    pub fn new(timer: Peri<'d, T>) -> Self {
         Self::new_inner(timer, false)
     }
 
@@ -100,13 +100,11 @@ impl<'d, T: Instance> Timer<'d, T> {
     ///
     /// This can be useful for triggering tasks via PPI
     /// `Uarte` uses this internally.
-    pub fn new_counter(timer: impl Peripheral<P = T> + 'd) -> Self {
+    pub fn new_counter(timer: Peri<'d, T>) -> Self {
         Self::new_inner(timer, true)
     }
 
-    fn new_inner(timer: impl Peripheral<P = T> + 'd, _is_counter: bool) -> Self {
-        into_ref!(timer);
-
+    fn new_inner(timer: Peri<'d, T>, _is_counter: bool) -> Self {
         let regs = T::regs();
 
         let this = Self { _p: timer };
@@ -229,7 +227,7 @@ impl<'d, T: Instance> Timer<'d, T> {
 /// When the register's CAPTURE task is triggered, the timer will store the current value of its counter in the register
 pub struct Cc<'d, T: Instance> {
     n: usize,
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
 }
 
 impl<'d, T: Instance> Cc<'d, T> {
diff --git a/embassy-nrf/src/twim.rs b/embassy-nrf/src/twim.rs
index bfce00f1b..083b54b99 100644
--- a/embassy-nrf/src/twim.rs
+++ b/embassy-nrf/src/twim.rs
@@ -10,7 +10,7 @@ use core::sync::atomic::Ordering::SeqCst;
 use core::task::Poll;
 
 use embassy_embedded_hal::SetConfig;
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 #[cfg(feature = "time")]
 use embassy_time::{Duration, Instant};
@@ -23,7 +23,7 @@ use crate::interrupt::typelevel::Interrupt;
 use crate::pac::gpio::vals as gpiovals;
 use crate::pac::twim::vals;
 use crate::util::slice_in_ram;
-use crate::{gpio, interrupt, pac, Peripheral};
+use crate::{gpio, interrupt, pac};
 
 /// TWIM config.
 #[non_exhaustive]
@@ -114,20 +114,18 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
 
 /// TWI driver.
 pub struct Twim<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
 }
 
 impl<'d, T: Instance> Twim<'d, T> {
     /// Create a new TWI driver.
     pub fn new(
-        twim: impl Peripheral<P = T> + 'd,
+        twim: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        sda: impl Peripheral<P = impl GpioPin> + 'd,
-        scl: impl Peripheral<P = impl GpioPin> + 'd,
+        sda: Peri<'d, impl GpioPin>,
+        scl: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(twim, sda, scl);
-
         let r = T::regs();
 
         // Configure pins
@@ -847,7 +845,7 @@ pub(crate) trait SealedInstance {
 
 /// TWIM peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static {
+pub trait Instance: SealedInstance + PeripheralType + 'static {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/twis.rs b/embassy-nrf/src/twis.rs
index 60de2ed9d..3e4d537ae 100644
--- a/embassy-nrf/src/twis.rs
+++ b/embassy-nrf/src/twis.rs
@@ -8,7 +8,7 @@ use core::sync::atomic::compiler_fence;
 use core::sync::atomic::Ordering::SeqCst;
 use core::task::Poll;
 
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 #[cfg(feature = "time")]
 use embassy_time::{Duration, Instant};
@@ -19,7 +19,7 @@ use crate::interrupt::typelevel::Interrupt;
 use crate::pac::gpio::vals as gpiovals;
 use crate::pac::twis::vals;
 use crate::util::slice_in_ram_or;
-use crate::{gpio, interrupt, pac, Peripheral};
+use crate::{gpio, interrupt, pac};
 
 /// TWIS config.
 #[non_exhaustive]
@@ -141,20 +141,18 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
 
 /// TWIS driver.
 pub struct Twis<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
 }
 
 impl<'d, T: Instance> Twis<'d, T> {
     /// Create a new TWIS driver.
     pub fn new(
-        twis: impl Peripheral<P = T> + 'd,
+        twis: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        sda: impl Peripheral<P = impl GpioPin> + 'd,
-        scl: impl Peripheral<P = impl GpioPin> + 'd,
+        sda: Peri<'d, impl GpioPin>,
+        scl: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(twis, sda, scl);
-
         let r = T::regs();
 
         // Configure pins
@@ -791,7 +789,7 @@ pub(crate) trait SealedInstance {
 
 /// TWIS peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static {
+pub trait Instance: SealedInstance + PeripheralType + 'static {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs
index ebb4dd941..b44edfe84 100644
--- a/embassy-nrf/src/uarte.rs
+++ b/embassy-nrf/src/uarte.rs
@@ -19,7 +19,7 @@ use core::sync::atomic::{compiler_fence, AtomicU8, Ordering};
 use core::task::Poll;
 
 use embassy_hal_internal::drop::OnDrop;
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 // Re-export SVD variants to allow user to directly set values.
 pub use pac::uarte::vals::{Baudrate, ConfigParity as Parity};
@@ -32,7 +32,7 @@ use crate::pac::uarte::vals;
 use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task};
 use crate::timer::{Frequency, Instance as TimerInstance, Timer};
 use crate::util::slice_in_ram_or;
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac};
 
 /// UARTE config.
 #[derive(Clone)]
@@ -141,56 +141,54 @@ pub struct Uarte<'d, T: Instance> {
 ///
 /// This can be obtained via [`Uarte::split`], or created directly.
 pub struct UarteTx<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
 }
 
 /// Receiver part of the UARTE driver.
 ///
 /// This can be obtained via [`Uarte::split`], or created directly.
 pub struct UarteRx<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
 }
 
 impl<'d, T: Instance> Uarte<'d, T> {
     /// Create a new UARTE without hardware flow control
     pub fn new(
-        uarte: impl Peripheral<P = T> + 'd,
+        uarte: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        rxd: impl Peripheral<P = impl GpioPin> + 'd,
-        txd: impl Peripheral<P = impl GpioPin> + 'd,
+        rxd: Peri<'d, impl GpioPin>,
+        txd: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(uarte, rxd, txd);
-        Self::new_inner(uarte, rxd.map_into(), txd.map_into(), None, None, config)
+        Self::new_inner(uarte, rxd.into(), txd.into(), None, None, config)
     }
 
     /// Create a new UARTE with hardware flow control (RTS/CTS)
     pub fn new_with_rtscts(
-        uarte: impl Peripheral<P = T> + 'd,
+        uarte: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        rxd: impl Peripheral<P = impl GpioPin> + 'd,
-        txd: impl Peripheral<P = impl GpioPin> + 'd,
-        cts: impl Peripheral<P = impl GpioPin> + 'd,
-        rts: impl Peripheral<P = impl GpioPin> + 'd,
+        rxd: Peri<'d, impl GpioPin>,
+        txd: Peri<'d, impl GpioPin>,
+        cts: Peri<'d, impl GpioPin>,
+        rts: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(uarte, rxd, txd, cts, rts);
         Self::new_inner(
             uarte,
-            rxd.map_into(),
-            txd.map_into(),
-            Some(cts.map_into()),
-            Some(rts.map_into()),
+            rxd.into(),
+            txd.into(),
+            Some(cts.into()),
+            Some(rts.into()),
             config,
         )
     }
 
     fn new_inner(
-        uarte: PeripheralRef<'d, T>,
-        rxd: PeripheralRef<'d, AnyPin>,
-        txd: PeripheralRef<'d, AnyPin>,
-        cts: Option<PeripheralRef<'d, AnyPin>>,
-        rts: Option<PeripheralRef<'d, AnyPin>>,
+        uarte: Peri<'d, T>,
+        rxd: Peri<'d, AnyPin>,
+        txd: Peri<'d, AnyPin>,
+        cts: Option<Peri<'d, AnyPin>>,
+        rts: Option<Peri<'d, AnyPin>>,
         config: Config,
     ) -> Self {
         let r = T::regs();
@@ -239,9 +237,9 @@ impl<'d, T: Instance> Uarte<'d, T> {
     /// This is useful to concurrently transmit and receive from independent tasks.
     pub fn split_with_idle<U: TimerInstance>(
         self,
-        timer: impl Peripheral<P = U> + 'd,
-        ppi_ch1: impl Peripheral<P = impl ConfigurableChannel + 'd> + 'd,
-        ppi_ch2: impl Peripheral<P = impl ConfigurableChannel + 'd> + 'd,
+        timer: Peri<'d, U>,
+        ppi_ch1: Peri<'d, impl ConfigurableChannel + 'd>,
+        ppi_ch2: Peri<'d, impl ConfigurableChannel + 'd>,
     ) -> (UarteTx<'d, T>, UarteRxWithIdle<'d, T, U>) {
         (self.tx, self.rx.with_idle(timer, ppi_ch1, ppi_ch2))
     }
@@ -283,11 +281,7 @@ impl<'d, T: Instance> Uarte<'d, T> {
     }
 }
 
-pub(crate) fn configure_tx_pins(
-    r: pac::uarte::Uarte,
-    txd: PeripheralRef<'_, AnyPin>,
-    cts: Option<PeripheralRef<'_, AnyPin>>,
-) {
+pub(crate) fn configure_tx_pins(r: pac::uarte::Uarte, txd: Peri<'_, AnyPin>, cts: Option<Peri<'_, AnyPin>>) {
     txd.set_high();
     txd.conf().write(|w| {
         w.set_dir(gpiovals::Dir::OUTPUT);
@@ -306,11 +300,7 @@ pub(crate) fn configure_tx_pins(
     r.psel().cts().write_value(cts.psel_bits());
 }
 
-pub(crate) fn configure_rx_pins(
-    r: pac::uarte::Uarte,
-    rxd: PeripheralRef<'_, AnyPin>,
-    rts: Option<PeripheralRef<'_, AnyPin>>,
-) {
+pub(crate) fn configure_rx_pins(r: pac::uarte::Uarte, rxd: Peri<'_, AnyPin>, rts: Option<Peri<'_, AnyPin>>) {
     rxd.conf().write(|w| {
         w.set_dir(gpiovals::Dir::INPUT);
         w.set_input(gpiovals::Input::CONNECT);
@@ -356,33 +346,26 @@ pub(crate) fn configure(r: pac::uarte::Uarte, config: Config, hardware_flow_cont
 impl<'d, T: Instance> UarteTx<'d, T> {
     /// Create a new tx-only UARTE without hardware flow control
     pub fn new(
-        uarte: impl Peripheral<P = T> + 'd,
+        uarte: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        txd: impl Peripheral<P = impl GpioPin> + 'd,
+        txd: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(uarte, txd);
-        Self::new_inner(uarte, txd.map_into(), None, config)
+        Self::new_inner(uarte, txd.into(), None, config)
     }
 
     /// Create a new tx-only UARTE with hardware flow control (RTS/CTS)
     pub fn new_with_rtscts(
-        uarte: impl Peripheral<P = T> + 'd,
+        uarte: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        txd: impl Peripheral<P = impl GpioPin> + 'd,
-        cts: impl Peripheral<P = impl GpioPin> + 'd,
+        txd: Peri<'d, impl GpioPin>,
+        cts: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(uarte, txd, cts);
-        Self::new_inner(uarte, txd.map_into(), Some(cts.map_into()), config)
+        Self::new_inner(uarte, txd.into(), Some(cts.into()), config)
     }
 
-    fn new_inner(
-        uarte: PeripheralRef<'d, T>,
-        txd: PeripheralRef<'d, AnyPin>,
-        cts: Option<PeripheralRef<'d, AnyPin>>,
-        config: Config,
-    ) -> Self {
+    fn new_inner(uarte: Peri<'d, T>, txd: Peri<'d, AnyPin>, cts: Option<Peri<'d, AnyPin>>, config: Config) -> Self {
         let r = T::regs();
 
         configure(r, config, cts.is_some());
@@ -539,25 +522,23 @@ impl<'a, T: Instance> Drop for UarteTx<'a, T> {
 impl<'d, T: Instance> UarteRx<'d, T> {
     /// Create a new rx-only UARTE without hardware flow control
     pub fn new(
-        uarte: impl Peripheral<P = T> + 'd,
+        uarte: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        rxd: impl Peripheral<P = impl GpioPin> + 'd,
+        rxd: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(uarte, rxd);
-        Self::new_inner(uarte, rxd.map_into(), None, config)
+        Self::new_inner(uarte, rxd.into(), None, config)
     }
 
     /// Create a new rx-only UARTE with hardware flow control (RTS/CTS)
     pub fn new_with_rtscts(
-        uarte: impl Peripheral<P = T> + 'd,
+        uarte: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        rxd: impl Peripheral<P = impl GpioPin> + 'd,
-        rts: impl Peripheral<P = impl GpioPin> + 'd,
+        rxd: Peri<'d, impl GpioPin>,
+        rts: Peri<'d, impl GpioPin>,
         config: Config,
     ) -> Self {
-        into_ref!(uarte, rxd, rts);
-        Self::new_inner(uarte, rxd.map_into(), Some(rts.map_into()), config)
+        Self::new_inner(uarte, rxd.into(), Some(rts.into()), config)
     }
 
     /// Check for errors and clear the error register if an error occured.
@@ -568,12 +549,7 @@ impl<'d, T: Instance> UarteRx<'d, T> {
         ErrorSource::from_bits_truncate(err_bits.0).check()
     }
 
-    fn new_inner(
-        uarte: PeripheralRef<'d, T>,
-        rxd: PeripheralRef<'d, AnyPin>,
-        rts: Option<PeripheralRef<'d, AnyPin>>,
-        config: Config,
-    ) -> Self {
+    fn new_inner(uarte: Peri<'d, T>, rxd: Peri<'d, AnyPin>, rts: Option<Peri<'d, AnyPin>>, config: Config) -> Self {
         let r = T::regs();
 
         configure(r, config, rts.is_some());
@@ -592,14 +568,12 @@ impl<'d, T: Instance> UarteRx<'d, T> {
     /// Upgrade to an instance that supports idle line detection.
     pub fn with_idle<U: TimerInstance>(
         self,
-        timer: impl Peripheral<P = U> + 'd,
-        ppi_ch1: impl Peripheral<P = impl ConfigurableChannel + 'd> + 'd,
-        ppi_ch2: impl Peripheral<P = impl ConfigurableChannel + 'd> + 'd,
+        timer: Peri<'d, U>,
+        ppi_ch1: Peri<'d, impl ConfigurableChannel + 'd>,
+        ppi_ch2: Peri<'d, impl ConfigurableChannel + 'd>,
     ) -> UarteRxWithIdle<'d, T, U> {
         let timer = Timer::new(timer);
 
-        into_ref!(ppi_ch1, ppi_ch2);
-
         let r = T::regs();
 
         // BAUDRATE register values are `baudrate * 2^32 / 16000000`
@@ -617,7 +591,7 @@ impl<'d, T: Instance> UarteRx<'d, T> {
         timer.cc(0).short_compare_stop();
 
         let mut ppi_ch1 = Ppi::new_one_to_two(
-            ppi_ch1.map_into(),
+            ppi_ch1.into(),
             Event::from_reg(r.events_rxdrdy()),
             timer.task_clear(),
             timer.task_start(),
@@ -625,7 +599,7 @@ impl<'d, T: Instance> UarteRx<'d, T> {
         ppi_ch1.enable();
 
         let mut ppi_ch2 = Ppi::new_one_to_one(
-            ppi_ch2.map_into(),
+            ppi_ch2.into(),
             timer.cc(0).event_compare(),
             Task::from_reg(r.tasks_stoprx()),
         );
@@ -992,7 +966,7 @@ pub(crate) trait SealedInstance {
 
 /// UARTE peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static + Send {
+pub trait Instance: SealedInstance + PeripheralType + 'static + Send {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/usb/mod.rs b/embassy-nrf/src/usb/mod.rs
index 06dae694b..6cc1b0111 100644
--- a/embassy-nrf/src/usb/mod.rs
+++ b/embassy-nrf/src/usb/mod.rs
@@ -11,7 +11,7 @@ use core::sync::atomic::{compiler_fence, AtomicU32, Ordering};
 use core::task::Poll;
 
 use cortex_m::peripheral::NVIC;
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 use embassy_usb_driver as driver;
 use embassy_usb_driver::{Direction, EndpointAddress, EndpointError, EndpointInfo, EndpointType, Event, Unsupported};
@@ -20,7 +20,7 @@ use self::vbus_detect::VbusDetect;
 use crate::interrupt::typelevel::Interrupt;
 use crate::pac::usbd::vals;
 use crate::util::slice_in_ram;
-use crate::{interrupt, pac, Peripheral};
+use crate::{interrupt, pac};
 
 static BUS_WAKER: AtomicWaker = AtomicWaker::new();
 static EP0_WAKER: AtomicWaker = AtomicWaker::new();
@@ -87,7 +87,7 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
 
 /// USB driver.
 pub struct Driver<'d, T: Instance, V: VbusDetect> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
     alloc_in: Allocator,
     alloc_out: Allocator,
     vbus_detect: V,
@@ -96,12 +96,10 @@ pub struct Driver<'d, T: Instance, V: VbusDetect> {
 impl<'d, T: Instance, V: VbusDetect> Driver<'d, T, V> {
     /// Create a new USB driver.
     pub fn new(
-        usb: impl Peripheral<P = T> + 'd,
+        usb: Peri<'d, T>,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
         vbus_detect: V,
     ) -> Self {
-        into_ref!(usb);
-
         T::Interrupt::unpend();
         unsafe { T::Interrupt::enable() };
 
@@ -169,7 +167,7 @@ impl<'d, T: Instance, V: VbusDetect + 'd> driver::Driver<'d> for Driver<'d, T, V
 
 /// USB bus.
 pub struct Bus<'d, T: Instance, V: VbusDetect> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
     power_available: bool,
     vbus_detect: V,
 }
@@ -592,7 +590,7 @@ impl<'d, T: Instance> driver::EndpointIn for Endpoint<'d, T, In> {
 
 /// USB control pipe.
 pub struct ControlPipe<'d, T: Instance> {
-    _p: PeripheralRef<'d, T>,
+    _p: Peri<'d, T>,
     max_packet_size: u16,
 }
 
@@ -779,7 +777,7 @@ pub(crate) trait SealedInstance {
 
 /// USB peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: Peripheral<P = Self> + SealedInstance + 'static + Send {
+pub trait Instance: SealedInstance + PeripheralType + 'static + Send {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-nrf/src/wdt.rs b/embassy-nrf/src/wdt.rs
index f7812258c..11cfa398e 100644
--- a/embassy-nrf/src/wdt.rs
+++ b/embassy-nrf/src/wdt.rs
@@ -3,9 +3,11 @@
 //! This HAL implements a basic watchdog timer with 1..=8 handles.
 //! Once the watchdog has been started, it cannot be stopped.
 
+use core::marker::PhantomData;
+
 use crate::pac::wdt::vals;
 pub use crate::pac::wdt::vals::{Halt as HaltConfig, Sleep as SleepConfig};
-use crate::peripherals;
+use crate::{peripherals, Peri};
 
 const MIN_TICKS: u32 = 15;
 
@@ -61,7 +63,7 @@ impl Default for Config {
 
 /// Watchdog driver.
 pub struct Watchdog {
-    _private: (),
+    _wdt: Peri<'static, peripherals::WDT>,
 }
 
 impl Watchdog {
@@ -74,9 +76,9 @@ impl Watchdog {
     /// `N` must be between 1 and 8, inclusive.
     #[inline]
     pub fn try_new<const N: usize>(
-        wdt: peripherals::WDT,
+        wdt: Peri<'static, peripherals::WDT>,
         config: Config,
-    ) -> Result<(Self, [WatchdogHandle; N]), peripherals::WDT> {
+    ) -> Result<(Self, [WatchdogHandle; N]), Peri<'static, peripherals::WDT>> {
         assert!(N >= 1 && N <= 8);
 
         let r = crate::pac::WDT;
@@ -110,11 +112,19 @@ impl Watchdog {
             r.tasks_start().write_value(1);
         }
 
-        let this = Self { _private: () };
+        let this = Self { _wdt: wdt };
 
-        let mut handles = [const { WatchdogHandle { index: 0 } }; N];
+        let mut handles = [const {
+            WatchdogHandle {
+                _wdt: PhantomData,
+                index: 0,
+            }
+        }; N];
         for i in 0..N {
-            handles[i] = WatchdogHandle { index: i as u8 };
+            handles[i] = WatchdogHandle {
+                _wdt: PhantomData,
+                index: i as u8,
+            };
             handles[i].pet();
         }
 
@@ -155,6 +165,7 @@ impl Watchdog {
 
 /// Watchdog handle.
 pub struct WatchdogHandle {
+    _wdt: PhantomData<Peri<'static, peripherals::WDT>>,
     index: u8,
 }
 
@@ -183,6 +194,9 @@ impl WatchdogHandle {
     /// Watchdog must be initialized and `index` must be between `0` and `N-1`
     /// where `N` is the handle count when initializing.
     pub unsafe fn steal(index: u8) -> Self {
-        Self { index }
+        Self {
+            _wdt: PhantomData,
+            index,
+        }
     }
 }