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authorAlex Moon <[email protected]>2025-04-29 11:07:58 -0400
committerAlex Moon <[email protected]>2025-04-29 11:07:58 -0400
commitfb7504c2930a3f177a33f1dcc736da0d548d6e97 (patch)
tree1fed8eb067436316e07a253a4606fc45cf907df8 /embassy-nrf/src
parent77d355e0ecb3f5eab4a563981552fdb69175c8c5 (diff)
Add docs
Diffstat (limited to 'embassy-nrf/src')
-rw-r--r--embassy-nrf/src/twim.rs6
1 files changed, 6 insertions, 0 deletions
diff --git a/embassy-nrf/src/twim.rs b/embassy-nrf/src/twim.rs
index 95b24c616..3d5e841d1 100644
--- a/embassy-nrf/src/twim.rs
+++ b/embassy-nrf/src/twim.rs
@@ -119,6 +119,12 @@ pub struct Twim<'d, T: Instance> {
119 119
120impl<'d, T: Instance> Twim<'d, T> { 120impl<'d, T: Instance> Twim<'d, T> {
121 /// Create a new TWI driver. 121 /// Create a new TWI driver.
122 ///
123 /// `tx_ram_buffer` is required if any write operations will be performed with data that is not in RAM.
124 /// Usually this is static data that the compiler locates in flash instead of RAM. The `tx_ram_buffer`
125 /// needs to be at least as large as the largest write operation that will be executed with a buffer
126 /// that is not in RAM. If all write operations will be performed from RAM, an empty buffer (`&[]`) may
127 /// be used.
122 pub fn new( 128 pub fn new(
123 twim: Peri<'d, T>, 129 twim: Peri<'d, T>,
124 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 130 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,