diff options
| author | Dirk Stolle <[email protected]> | 2023-05-08 23:25:01 +0200 |
|---|---|---|
| committer | Dirk Stolle <[email protected]> | 2023-05-08 23:25:01 +0200 |
| commit | 0584312ef0324d2ac67dbb9517176fabf628eec9 (patch) | |
| tree | 1b6e67474474fad99e7035a8e8898f4fb78656ad /embassy-nrf | |
| parent | d0703f83dbe0099c3dca0c912d873365a2188018 (diff) | |
Fix some typos
Diffstat (limited to 'embassy-nrf')
| -rw-r--r-- | embassy-nrf/src/nvmc.rs | 2 | ||||
| -rw-r--r-- | embassy-nrf/src/twim.rs | 2 | ||||
| -rw-r--r-- | embassy-nrf/src/twis.rs | 14 |
3 files changed, 9 insertions, 9 deletions
diff --git a/embassy-nrf/src/nvmc.rs b/embassy-nrf/src/nvmc.rs index 6f48853d5..91a5a272f 100644 --- a/embassy-nrf/src/nvmc.rs +++ b/embassy-nrf/src/nvmc.rs | |||
| @@ -24,7 +24,7 @@ pub const FLASH_SIZE: usize = crate::chip::FLASH_SIZE; | |||
| 24 | #[derive(Debug, Copy, Clone, PartialEq, Eq)] | 24 | #[derive(Debug, Copy, Clone, PartialEq, Eq)] |
| 25 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] | 25 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] |
| 26 | pub enum Error { | 26 | pub enum Error { |
| 27 | /// Opration using a location not in flash. | 27 | /// Operation using a location not in flash. |
| 28 | OutOfBounds, | 28 | OutOfBounds, |
| 29 | /// Unaligned operation or using unaligned buffers. | 29 | /// Unaligned operation or using unaligned buffers. |
| 30 | Unaligned, | 30 | Unaligned, |
diff --git a/embassy-nrf/src/twim.rs b/embassy-nrf/src/twim.rs index 9ae569609..cab36884f 100644 --- a/embassy-nrf/src/twim.rs +++ b/embassy-nrf/src/twim.rs | |||
| @@ -336,7 +336,7 @@ impl<'d, T: Instance> Twim<'d, T> { | |||
| 336 | return Poll::Ready(()); | 336 | return Poll::Ready(()); |
| 337 | } | 337 | } |
| 338 | 338 | ||
| 339 | // stop if an error occured | 339 | // stop if an error occurred |
| 340 | if r.events_error.read().bits() != 0 { | 340 | if r.events_error.read().bits() != 0 { |
| 341 | r.events_error.reset(); | 341 | r.events_error.reset(); |
| 342 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); | 342 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); |
diff --git a/embassy-nrf/src/twis.rs b/embassy-nrf/src/twis.rs index bfa30b044..f68a9940a 100644 --- a/embassy-nrf/src/twis.rs +++ b/embassy-nrf/src/twis.rs | |||
| @@ -320,7 +320,7 @@ impl<'d, T: Instance> Twis<'d, T> { | |||
| 320 | fn blocking_listen_wait_end(&mut self, status: Status) -> Result<Command, Error> { | 320 | fn blocking_listen_wait_end(&mut self, status: Status) -> Result<Command, Error> { |
| 321 | let r = T::regs(); | 321 | let r = T::regs(); |
| 322 | loop { | 322 | loop { |
| 323 | // stop if an error occured | 323 | // stop if an error occurred |
| 324 | if r.events_error.read().bits() != 0 { | 324 | if r.events_error.read().bits() != 0 { |
| 325 | r.events_error.reset(); | 325 | r.events_error.reset(); |
| 326 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); | 326 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); |
| @@ -346,7 +346,7 @@ impl<'d, T: Instance> Twis<'d, T> { | |||
| 346 | fn blocking_wait(&mut self) -> Result<usize, Error> { | 346 | fn blocking_wait(&mut self) -> Result<usize, Error> { |
| 347 | let r = T::regs(); | 347 | let r = T::regs(); |
| 348 | loop { | 348 | loop { |
| 349 | // stop if an error occured | 349 | // stop if an error occurred |
| 350 | if r.events_error.read().bits() != 0 { | 350 | if r.events_error.read().bits() != 0 { |
| 351 | r.events_error.reset(); | 351 | r.events_error.reset(); |
| 352 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); | 352 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); |
| @@ -372,7 +372,7 @@ impl<'d, T: Instance> Twis<'d, T> { | |||
| 372 | let r = T::regs(); | 372 | let r = T::regs(); |
| 373 | let deadline = Instant::now() + timeout; | 373 | let deadline = Instant::now() + timeout; |
| 374 | loop { | 374 | loop { |
| 375 | // stop if an error occured | 375 | // stop if an error occurred |
| 376 | if r.events_error.read().bits() != 0 { | 376 | if r.events_error.read().bits() != 0 { |
| 377 | r.events_error.reset(); | 377 | r.events_error.reset(); |
| 378 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); | 378 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); |
| @@ -432,7 +432,7 @@ impl<'d, T: Instance> Twis<'d, T> { | |||
| 432 | let r = T::regs(); | 432 | let r = T::regs(); |
| 433 | let deadline = Instant::now() + timeout; | 433 | let deadline = Instant::now() + timeout; |
| 434 | loop { | 434 | loop { |
| 435 | // stop if an error occured | 435 | // stop if an error occurred |
| 436 | if r.events_error.read().bits() != 0 { | 436 | if r.events_error.read().bits() != 0 { |
| 437 | r.events_error.reset(); | 437 | r.events_error.reset(); |
| 438 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); | 438 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); |
| @@ -465,7 +465,7 @@ impl<'d, T: Instance> Twis<'d, T> { | |||
| 465 | 465 | ||
| 466 | s.waker.register(cx.waker()); | 466 | s.waker.register(cx.waker()); |
| 467 | 467 | ||
| 468 | // stop if an error occured | 468 | // stop if an error occurred |
| 469 | if r.events_error.read().bits() != 0 { | 469 | if r.events_error.read().bits() != 0 { |
| 470 | r.events_error.reset(); | 470 | r.events_error.reset(); |
| 471 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); | 471 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); |
| @@ -495,7 +495,7 @@ impl<'d, T: Instance> Twis<'d, T> { | |||
| 495 | 495 | ||
| 496 | s.waker.register(cx.waker()); | 496 | s.waker.register(cx.waker()); |
| 497 | 497 | ||
| 498 | // stop if an error occured | 498 | // stop if an error occurred |
| 499 | if r.events_error.read().bits() != 0 { | 499 | if r.events_error.read().bits() != 0 { |
| 500 | r.events_error.reset(); | 500 | r.events_error.reset(); |
| 501 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); | 501 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); |
| @@ -522,7 +522,7 @@ impl<'d, T: Instance> Twis<'d, T> { | |||
| 522 | 522 | ||
| 523 | s.waker.register(cx.waker()); | 523 | s.waker.register(cx.waker()); |
| 524 | 524 | ||
| 525 | // stop if an error occured | 525 | // stop if an error occurred |
| 526 | if r.events_error.read().bits() != 0 { | 526 | if r.events_error.read().bits() != 0 { |
| 527 | r.events_error.reset(); | 527 | r.events_error.reset(); |
| 528 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); | 528 | r.tasks_stop.write(|w| unsafe { w.bits(1) }); |
