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authorJustin Beaurivage <[email protected]>2024-02-05 18:05:59 -0500
committerJustin Beaurivage <[email protected]>2024-02-05 18:05:59 -0500
commit2575f597cc3aafeb9925511b12adf30f6a67bccb (patch)
treef84fbc64d205918a3cf9b3c2c26cae2daee7f867 /embassy-nrf
parentcc12eb9680513f380e9a04e76322ae4355c2b6b2 (diff)
Address @Dirbaio's comments
Diffstat (limited to 'embassy-nrf')
-rw-r--r--embassy-nrf/src/uarte.rs18
1 files changed, 9 insertions, 9 deletions
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs
index f29b5061b..de2966ba5 100644
--- a/embassy-nrf/src/uarte.rs
+++ b/embassy-nrf/src/uarte.rs
@@ -66,18 +66,16 @@ bitflags::bitflags! {
66 } 66 }
67} 67}
68 68
69impl TryFrom<ErrorSource> for () { 69impl ErrorSource {
70 type Error = Error;
71
72 #[inline] 70 #[inline]
73 fn try_from(errors: ErrorSource) -> Result<Self, Self::Error> { 71 fn check(self) -> Result<(), Error> {
74 if errors.contains(ErrorSource::OVERRUN) { 72 if self.contains(ErrorSource::OVERRUN) {
75 Err(Error::Overrun) 73 Err(Error::Overrun)
76 } else if errors.contains(ErrorSource::PARITY) { 74 } else if self.contains(ErrorSource::PARITY) {
77 Err(Error::Parity) 75 Err(Error::Parity)
78 } else if errors.contains(ErrorSource::FRAMING) { 76 } else if self.contains(ErrorSource::FRAMING) {
79 Err(Error::Framing) 77 Err(Error::Framing)
80 } else if errors.contains(ErrorSource::BREAK) { 78 } else if self.contains(ErrorSource::BREAK) {
81 Err(Error::Break) 79 Err(Error::Break)
82 } else { 80 } else {
83 Ok(()) 81 Ok(())
@@ -539,7 +537,7 @@ impl<'d, T: Instance> UarteRx<'d, T> {
539 let r = T::regs(); 537 let r = T::regs();
540 let err_bits = r.errorsrc.read().bits(); 538 let err_bits = r.errorsrc.read().bits();
541 r.errorsrc.write(|w| unsafe { w.bits(err_bits) }); 539 r.errorsrc.write(|w| unsafe { w.bits(err_bits) });
542 ErrorSource::from_bits_truncate(err_bits).try_into() 540 ErrorSource::from_bits_truncate(err_bits).check()
543 } 541 }
544 542
545 fn new_inner( 543 fn new_inner(
@@ -677,6 +675,7 @@ impl<'d, T: Instance> UarteRx<'d, T> {
677 s.endrx_waker.register(cx.waker()); 675 s.endrx_waker.register(cx.waker());
678 676
679 if let Err(e) = self.check_and_clear_errors() { 677 if let Err(e) = self.check_and_clear_errors() {
678 r.tasks_stoprx.write(|w| unsafe { w.bits(1) });
680 return Poll::Ready(Err(e)); 679 return Poll::Ready(Err(e));
681 } 680 }
682 if r.events_endrx.read().bits() != 0 { 681 if r.events_endrx.read().bits() != 0 {
@@ -823,6 +822,7 @@ impl<'d, T: Instance, U: TimerInstance> UarteRxWithIdle<'d, T, U> {
823 s.endrx_waker.register(cx.waker()); 822 s.endrx_waker.register(cx.waker());
824 823
825 if let Err(e) = self.rx.check_and_clear_errors() { 824 if let Err(e) = self.rx.check_and_clear_errors() {
825 r.tasks_stoprx.write(|w| unsafe { w.bits(1) });
826 return Poll::Ready(Err(e)); 826 return Poll::Ready(Err(e));
827 } 827 }
828 if r.events_endrx.read().bits() != 0 { 828 if r.events_endrx.read().bits() != 0 {