diff options
| author | Jeremy Fitzhardinge <[email protected]> | 2022-10-03 18:50:03 -0700 |
|---|---|---|
| committer | Jeremy Fitzhardinge <[email protected]> | 2022-10-03 18:50:03 -0700 |
| commit | 4fd831e4a88fdba14751c8a71ae45fc0eac92c66 (patch) | |
| tree | a4147ab36c2da852630af346103c2c9572c60f1f /embassy-rp/src/i2c.rs | |
| parent | cae84991790976387aa4d4b7afae90094a876b25 (diff) | |
rp async i2c: raise the tx_empty threshold
Assert "tx_empty" interrupt a little early so there's time to wake up
and start refilling the fifo before it drains. This avoids stalling the
i2c bus if the tx fifo completely drains.
Diffstat (limited to 'embassy-rp/src/i2c.rs')
| -rw-r--r-- | embassy-rp/src/i2c.rs | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/embassy-rp/src/i2c.rs b/embassy-rp/src/i2c.rs index f004c522c..68cfc653e 100644 --- a/embassy-rp/src/i2c.rs +++ b/embassy-rp/src/i2c.rs | |||
| @@ -243,12 +243,18 @@ impl<'d, T: Instance> I2c<'d, T, Async> { | |||
| 243 | if let abort_reason @ Err(_) = me.read_and_clear_abort_reason() { | 243 | if let abort_reason @ Err(_) = me.read_and_clear_abort_reason() { |
| 244 | Poll::Ready(abort_reason) | 244 | Poll::Ready(abort_reason) |
| 245 | } else if !Self::tx_fifo_full() { | 245 | } else if !Self::tx_fifo_full() { |
| 246 | // resume if there's any space free in the tx fifo | ||
| 246 | Poll::Ready(Ok(())) | 247 | Poll::Ready(Ok(())) |
| 247 | } else { | 248 | } else { |
| 248 | Poll::Pending | 249 | Poll::Pending |
| 249 | } | 250 | } |
| 250 | }, | 251 | }, |
| 251 | |_me| unsafe { | 252 | |_me| unsafe { |
| 253 | // Set tx "free" threshold a little high so that we get | ||
| 254 | // woken before the fifo completely drains to minimize | ||
| 255 | // transfer stalls. | ||
| 256 | p.ic_tx_tl().write(|w| w.set_tx_tl(1)); | ||
| 257 | |||
| 252 | p.ic_intr_mask().modify(|w| { | 258 | p.ic_intr_mask().modify(|w| { |
| 253 | w.set_m_tx_empty(true); | 259 | w.set_m_tx_empty(true); |
| 254 | w.set_m_tx_abrt(true); | 260 | w.set_m_tx_abrt(true); |
