Move pio programs into embassy-rp

9 files changed, 1055 insertions, 0 deletions

diff --git a/embassy-rp/src/pio_programs/hd44780.rs b/embassy-rp/src/pio_programs/hd44780.rs
new file mode 100644
index 000000000..9bbf44fc4
--- /dev/null
+++ b/embassy-rp/src/pio_programs/hd44780.rs
@@ -0,0 +1,203 @@
+//! [HD44780 display driver](https://www.sparkfun.com/datasheets/LCD/HD44780.pdf)
+
+use crate::dma::{AnyChannel, Channel};
+use crate::pio::{
+    Common, Config, Direction, FifoJoin, Instance, Irq, LoadedProgram, PioPin, ShiftConfig, ShiftDirection,
+    StateMachine,
+};
+use crate::{into_ref, Peripheral, PeripheralRef};
+
+/// This struct represents a HD44780 program that takes command words (<wait:24> <command:4> <0:4>)
+pub struct PioHD44780CommandWordProgram<'a, PIO: Instance> {
+    prg: LoadedProgram<'a, PIO>,
+}
+
+impl<'a, PIO: Instance> PioHD44780CommandWordProgram<'a, PIO> {
+    /// Load the program into the given pio
+    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+        let prg = pio_proc::pio_asm!(
+            r#"
+                .side_set 1 opt
+                .origin 20
+
+                loop:
+                    out x,     24
+                delay:
+                    jmp x--,   delay
+                    out pins,  4     side 1
+                    out null,  4     side 0
+                    jmp !osre, loop
+                irq 0
+            "#,
+        );
+
+        let prg = common.load_program(&prg.program);
+
+        Self { prg }
+    }
+}
+
+/// This struct represents a HD44780 program that takes command sequences (<rs:1> <count:7>, data...)
+pub struct PioHD44780CommandSequenceProgram<'a, PIO: Instance> {
+    prg: LoadedProgram<'a, PIO>,
+}
+
+impl<'a, PIO: Instance> PioHD44780CommandSequenceProgram<'a, PIO> {
+    /// Load the program into the given pio
+    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+        // many side sets are only there to free up a delay bit!
+        let prg = pio_proc::pio_asm!(
+            r#"
+                .origin 27
+                .side_set 1
+
+                .wrap_target
+                pull     side 0
+                out  x 1 side 0 ; !rs
+                out  y 7 side 0 ; #data - 1
+
+                ; rs/rw to e: >= 60ns
+                ; e high time: >= 500ns
+                ; e low time: >= 500ns
+                ; read data valid after e falling: ~5ns
+                ; write data hold after e falling: ~10ns
+
+                loop:
+                    pull                 side 0
+                    jmp  !x       data   side 0
+                command:
+                    set  pins     0b00   side 0
+                    jmp  shift           side 0
+                data:
+                    set  pins     0b01   side 0
+                shift:
+                    out  pins     4      side 1 [9]
+                    nop                  side 0 [9]
+                    out  pins     4      side 1 [9]
+                    mov  osr      null   side 0 [7]
+                    out  pindirs  4      side 0
+                    set  pins     0b10   side 0
+                busy:
+                    nop                  side 1 [9]
+                    jmp  pin      more   side 0 [9]
+                    mov  osr      ~osr   side 1 [9]
+                    nop                  side 0 [4]
+                    out  pindirs  4      side 0
+                    jmp  y--      loop   side 0
+                .wrap
+                more:
+                    nop                  side 1 [9]
+                    jmp busy             side 0 [9]
+            "#
+        );
+
+        let prg = common.load_program(&prg.program);
+
+        Self { prg }
+    }
+}
+
+/// Pio backed HD44780 driver
+pub struct PioHD44780<'l, P: Instance, const S: usize> {
+    dma: PeripheralRef<'l, AnyChannel>,
+    sm: StateMachine<'l, P, S>,
+
+    buf: [u8; 40],
+}
+
+impl<'l, P: Instance, const S: usize> PioHD44780<'l, P, S> {
+    /// Configure the given state machine to first init, then write data to, a HD44780 display.
+    pub async fn new(
+        common: &mut Common<'l, P>,
+        mut sm: StateMachine<'l, P, S>,
+        mut irq: Irq<'l, P, S>,
+        dma: impl Peripheral<P = impl Channel> + 'l,
+        rs: impl PioPin,
+        rw: impl PioPin,
+        e: impl PioPin,
+        db4: impl PioPin,
+        db5: impl PioPin,
+        db6: impl PioPin,
+        db7: impl PioPin,
+        word_prg: &PioHD44780CommandWordProgram<'l, P>,
+        seq_prg: &PioHD44780CommandSequenceProgram<'l, P>,
+    ) -> PioHD44780<'l, P, S> {
+        into_ref!(dma);
+
+        let rs = common.make_pio_pin(rs);
+        let rw = common.make_pio_pin(rw);
+        let e = common.make_pio_pin(e);
+        let db4 = common.make_pio_pin(db4);
+        let db5 = common.make_pio_pin(db5);
+        let db6 = common.make_pio_pin(db6);
+        let db7 = common.make_pio_pin(db7);
+
+        sm.set_pin_dirs(Direction::Out, &[&rs, &rw, &e, &db4, &db5, &db6, &db7]);
+
+        let mut cfg = Config::default();
+        cfg.use_program(&word_prg.prg, &[&e]);
+        cfg.clock_divider = 125u8.into();
+        cfg.set_out_pins(&[&db4, &db5, &db6, &db7]);
+        cfg.shift_out = ShiftConfig {
+            auto_fill: true,
+            direction: ShiftDirection::Left,
+            threshold: 32,
+        };
+        cfg.fifo_join = FifoJoin::TxOnly;
+        sm.set_config(&cfg);
+
+        sm.set_enable(true);
+        // init to 8 bit thrice
+        sm.tx().push((50000 << 8) | 0x30);
+        sm.tx().push((5000 << 8) | 0x30);
+        sm.tx().push((200 << 8) | 0x30);
+        // init 4 bit
+        sm.tx().push((200 << 8) | 0x20);
+        // set font and lines
+        sm.tx().push((50 << 8) | 0x20);
+        sm.tx().push(0b1100_0000);
+
+        irq.wait().await;
+        sm.set_enable(false);
+
+        let mut cfg = Config::default();
+        cfg.use_program(&seq_prg.prg, &[&e]);
+        cfg.clock_divider = 8u8.into(); // ~64ns/insn
+        cfg.set_jmp_pin(&db7);
+        cfg.set_set_pins(&[&rs, &rw]);
+        cfg.set_out_pins(&[&db4, &db5, &db6, &db7]);
+        cfg.shift_out.direction = ShiftDirection::Left;
+        cfg.fifo_join = FifoJoin::TxOnly;
+        sm.set_config(&cfg);
+
+        sm.set_enable(true);
+
+        // display on and cursor on and blinking, reset display
+        sm.tx().dma_push(dma.reborrow(), &[0x81u8, 0x0f, 1]).await;
+
+        Self {
+            dma: dma.map_into(),
+            sm,
+            buf: [0x20; 40],
+        }
+    }
+
+    /// Write a line to the display
+    pub async fn add_line(&mut self, s: &[u8]) {
+        // move cursor to 0:0, prepare 16 characters
+        self.buf[..3].copy_from_slice(&[0x80, 0x80, 15]);
+        // move line 2 up
+        self.buf.copy_within(22..38, 3);
+        // move cursor to 1:0, prepare 16 characters
+        self.buf[19..22].copy_from_slice(&[0x80, 0xc0, 15]);
+        // file line 2 with spaces
+        self.buf[22..38].fill(0x20);
+        // copy input line
+        let len = s.len().min(16);
+        self.buf[22..22 + len].copy_from_slice(&s[0..len]);
+        // set cursor to 1:15
+        self.buf[38..].copy_from_slice(&[0x80, 0xcf]);
+
+        self.sm.tx().dma_push(self.dma.reborrow(), &self.buf).await;
+    }
+}
diff --git a/embassy-rp/src/pio_programs/i2s.rs b/embassy-rp/src/pio_programs/i2s.rs
new file mode 100644
index 000000000..3c8ef8bb6
--- /dev/null
+++ b/embassy-rp/src/pio_programs/i2s.rs
@@ -0,0 +1,97 @@
+//! Pio backed I2s output
+
+use crate::{
+    dma::{AnyChannel, Channel, Transfer},
+    into_ref,
+    pio::{
+        Common, Config, Direction, FifoJoin, Instance, LoadedProgram, PioPin, ShiftConfig, ShiftDirection, StateMachine,
+    },
+    Peripheral, PeripheralRef,
+};
+use fixed::traits::ToFixed;
+
+/// This struct represents an i2s output driver program
+pub struct PioI2sOutProgram<'a, PIO: Instance> {
+    prg: LoadedProgram<'a, PIO>,
+}
+
+impl<'a, PIO: Instance> PioI2sOutProgram<'a, PIO> {
+    /// Load the program into the given pio
+    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+        let prg = pio_proc::pio_asm!(
+            ".side_set 2",
+            "    set x, 14          side 0b01", // side 0bWB - W = Word Clock, B = Bit Clock
+            "left_data:",
+            "    out pins, 1        side 0b00",
+            "    jmp x-- left_data  side 0b01",
+            "    out pins 1         side 0b10",
+            "    set x, 14          side 0b11",
+            "right_data:",
+            "    out pins 1         side 0b10",
+            "    jmp x-- right_data side 0b11",
+            "    out pins 1         side 0b00",
+        );
+
+        let prg = common.load_program(&prg.program);
+
+        Self { prg }
+    }
+}
+
+/// Pio backed I2s output driver
+pub struct PioI2sOut<'a, P: Instance, const S: usize> {
+    dma: PeripheralRef<'a, AnyChannel>,
+    sm: StateMachine<'a, P, S>,
+}
+
+impl<'a, P: Instance, const S: usize> PioI2sOut<'a, P, S> {
+    /// Configure a state machine to output I2s
+    pub fn new(
+        common: &mut Common<'a, P>,
+        mut sm: StateMachine<'a, P, S>,
+        dma: impl Peripheral<P = impl Channel> + 'a,
+        data_pin: impl PioPin,
+        bit_clock_pin: impl PioPin,
+        lr_clock_pin: impl PioPin,
+        sample_rate: u32,
+        bit_depth: u32,
+        channels: u32,
+        program: &PioI2sOutProgram<'a, P>,
+    ) -> Self {
+        into_ref!(dma);
+
+        let data_pin = common.make_pio_pin(data_pin);
+        let bit_clock_pin = common.make_pio_pin(bit_clock_pin);
+        let left_right_clock_pin = common.make_pio_pin(lr_clock_pin);
+
+        let cfg = {
+            let mut cfg = Config::default();
+            cfg.use_program(&program.prg, &[&bit_clock_pin, &left_right_clock_pin]);
+            cfg.set_out_pins(&[&data_pin]);
+            let clock_frequency = sample_rate * bit_depth * channels;
+            cfg.clock_divider = (125_000_000. / clock_frequency as f64 / 2.).to_fixed();
+            cfg.shift_out = ShiftConfig {
+                threshold: 32,
+                direction: ShiftDirection::Left,
+                auto_fill: true,
+            };
+            // join fifos to have twice the time to start the next dma transfer
+            cfg.fifo_join = FifoJoin::TxOnly;
+            cfg
+        };
+        sm.set_config(&cfg);
+        sm.set_pin_dirs(Direction::Out, &[&data_pin, &left_right_clock_pin, &bit_clock_pin]);
+
+        sm.set_enable(true);
+
+        Self {
+            dma: dma.map_into(),
+            sm,
+        }
+    }
+
+    /// Return an in-prograss dma transfer future. Awaiting it will guarentee a complete transfer.
+    pub fn write<'b>(&'b mut self, buff: &'b [u32]) -> Transfer<'b, AnyChannel> {
+        self.sm.tx().dma_push(self.dma.reborrow(), buff)
+    }
+}
diff --git a/embassy-rp/src/pio_programs/mod.rs b/embassy-rp/src/pio_programs/mod.rs
new file mode 100644
index 000000000..74537825b
--- /dev/null
+++ b/embassy-rp/src/pio_programs/mod.rs
@@ -0,0 +1,10 @@
+//! Pre-built pio programs for common interfaces
+
+pub mod hd44780;
+pub mod i2s;
+pub mod onewire;
+pub mod pwm;
+pub mod rotary_encoder;
+pub mod stepper;
+pub mod uart;
+pub mod ws2812;
diff --git a/embassy-rp/src/pio_programs/onewire.rs b/embassy-rp/src/pio_programs/onewire.rs
new file mode 100644
index 000000000..f3bc5fcd7
--- /dev/null
+++ b/embassy-rp/src/pio_programs/onewire.rs
@@ -0,0 +1,109 @@
+//! OneWire pio driver
+
+use crate::pio::{self, Common, Config, Instance, LoadedProgram, PioPin, ShiftConfig, ShiftDirection, StateMachine};
+
+/// This struct represents an onewire driver program
+pub struct PioOneWireProgram<'a, PIO: Instance> {
+    prg: LoadedProgram<'a, PIO>,
+}
+
+impl<'a, PIO: Instance> PioOneWireProgram<'a, PIO> {
+    /// Load the program into the given pio
+    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+        let prg = pio_proc::pio_asm!(
+            r#"
+                .wrap_target
+                    again:
+                        pull block
+                        mov x, osr
+                        jmp !x, read
+                        write:
+                            set pindirs, 1 
+                            set pins, 0  
+                            loop1: 
+                                jmp x--,loop1
+                            set pindirs, 0 [31]
+                            wait 1 pin 0 [31]
+                            pull block
+                            mov x, osr
+                            bytes1:
+                                pull block
+                                set y, 7    
+                                set pindirs, 1 
+                                bit1:
+                                    set pins, 0 [1]
+                                    out pins,1 [31]
+                                    set pins, 1 [20]
+                                    jmp y--,bit1
+                                jmp x--,bytes1
+                            set pindirs, 0 [31]
+                            jmp again
+                        read:
+                            pull block
+                            mov x, osr
+                            bytes2:
+                                set y, 7
+                                bit2:
+                                    set pindirs, 1 
+                                    set pins, 0 [1]  
+                                    set pindirs, 0 [5]
+                                    in pins,1 [10]   
+                                    jmp y--,bit2
+                            jmp x--,bytes2
+                .wrap
+            "#,
+        );
+        let prg = common.load_program(&prg.program);
+
+        Self { prg }
+    }
+}
+
+/// Pio backed OneWire driver
+pub struct PioOneWire<'d, PIO: pio::Instance, const SM: usize> {
+    sm: StateMachine<'d, PIO, SM>,
+}
+
+impl<'d, PIO: pio::Instance, const SM: usize> PioOneWire<'d, PIO, SM> {
+    /// Create a new instance the driver
+    pub fn new(
+        common: &mut Common<'d, PIO>,
+        mut sm: StateMachine<'d, PIO, SM>,
+        pin: impl PioPin,
+        program: &PioOneWireProgram<'d, PIO>,
+    ) -> Self {
+        let pin = common.make_pio_pin(pin);
+        let mut cfg = Config::default();
+        cfg.use_program(&program.prg, &[]);
+        cfg.set_out_pins(&[&pin]);
+        cfg.set_in_pins(&[&pin]);
+        cfg.set_set_pins(&[&pin]);
+        cfg.shift_in = ShiftConfig {
+            auto_fill: true,
+            direction: ShiftDirection::Right,
+            threshold: 8,
+        };
+        cfg.clock_divider = 255_u8.into();
+        sm.set_config(&cfg);
+        sm.set_enable(true);
+        Self { sm }
+    }
+
+    /// Write bytes over the wire
+    pub async fn write_bytes(&mut self, bytes: &[u8]) {
+        self.sm.tx().wait_push(250).await;
+        self.sm.tx().wait_push(bytes.len() as u32 - 1).await;
+        for b in bytes {
+            self.sm.tx().wait_push(*b as u32).await;
+        }
+    }
+
+    /// Read bytes from the wire
+    pub async fn read_bytes(&mut self, bytes: &mut [u8]) {
+        self.sm.tx().wait_push(0).await;
+        self.sm.tx().wait_push(bytes.len() as u32 - 1).await;
+        for b in bytes.iter_mut() {
+            *b = (self.sm.rx().wait_pull().await >> 24) as u8;
+        }
+    }
+}
diff --git a/embassy-rp/src/pio_programs/pwm.rs b/embassy-rp/src/pio_programs/pwm.rs
new file mode 100644
index 000000000..5dfd70cc9
--- /dev/null
+++ b/embassy-rp/src/pio_programs/pwm.rs
@@ -0,0 +1,114 @@
+//! PIO backed PWM driver
+
+use core::time::Duration;
+
+use crate::{
+    clocks,
+    gpio::Level,
+    pio::{Common, Config, Direction, Instance, LoadedProgram, PioPin, StateMachine},
+};
+use pio::InstructionOperands;
+
+fn to_pio_cycles(duration: Duration) -> u32 {
+    (clocks::clk_sys_freq() / 1_000_000) / 3 * duration.as_micros() as u32 // parentheses are required to prevent overflow
+}
+
+/// This struct represents a PWM program loaded into pio instruction memory.
+pub struct PioPwmProgram<'a, PIO: Instance> {
+    prg: LoadedProgram<'a, PIO>,
+}
+
+impl<'a, PIO: Instance> PioPwmProgram<'a, PIO> {
+    /// Load the program into the given pio
+    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+        let prg = pio_proc::pio_asm!(
+            ".side_set 1 opt"
+                "pull noblock    side 0"
+                "mov x, osr"
+                "mov y, isr"
+            "countloop:"
+                "jmp x!=y noset"
+                "jmp skip        side 1"
+            "noset:"
+                "nop"
+            "skip:"
+                "jmp y-- countloop"
+        );
+
+        let prg = common.load_program(&prg.program);
+
+        Self { prg }
+    }
+}
+
+/// Pio backed PWM output
+pub struct PioPwm<'d, T: Instance, const SM: usize> {
+    sm: StateMachine<'d, T, SM>,
+}
+
+impl<'d, T: Instance, const SM: usize> PioPwm<'d, T, SM> {
+    /// Configure a state machine as a PWM output
+    pub fn new(
+        pio: &mut Common<'d, T>,
+        mut sm: StateMachine<'d, T, SM>,
+        pin: impl PioPin,
+        program: &PioPwmProgram<'d, T>,
+    ) -> Self {
+        let pin = pio.make_pio_pin(pin);
+        sm.set_pins(Level::High, &[&pin]);
+        sm.set_pin_dirs(Direction::Out, &[&pin]);
+
+        let mut cfg = Config::default();
+        cfg.use_program(&program.prg, &[&pin]);
+
+        sm.set_config(&cfg);
+
+        Self { sm }
+    }
+
+    /// Enable PWM output
+    pub fn start(&mut self) {
+        self.sm.set_enable(true);
+    }
+
+    /// Disable PWM output
+    pub fn stop(&mut self) {
+        self.sm.set_enable(false);
+    }
+
+    /// Set pwm period
+    pub fn set_period(&mut self, duration: Duration) {
+        let is_enabled = self.sm.is_enabled();
+        while !self.sm.tx().empty() {} // Make sure that the queue is empty
+        self.sm.set_enable(false);
+        self.sm.tx().push(to_pio_cycles(duration));
+        unsafe {
+            self.sm.exec_instr(
+                InstructionOperands::PULL {
+                    if_empty: false,
+                    block: false,
+                }
+                .encode(),
+            );
+            self.sm.exec_instr(
+                InstructionOperands::OUT {
+                    destination: ::pio::OutDestination::ISR,
+                    bit_count: 32,
+                }
+                .encode(),
+            );
+        };
+        if is_enabled {
+            self.sm.set_enable(true) // Enable if previously enabled
+        }
+    }
+
+    fn set_level(&mut self, level: u32) {
+        self.sm.tx().push(level);
+    }
+
+    /// Set the pulse width high time
+    pub fn write(&mut self, duration: Duration) {
+        self.set_level(to_pio_cycles(duration));
+    }
+}
diff --git a/embassy-rp/src/pio_programs/rotary_encoder.rs b/embassy-rp/src/pio_programs/rotary_encoder.rs
new file mode 100644
index 000000000..323f839bc
--- /dev/null
+++ b/embassy-rp/src/pio_programs/rotary_encoder.rs
@@ -0,0 +1,72 @@
+//! PIO backed quadrature encoder
+
+use crate::gpio::Pull;
+use crate::pio::{self, Common, Config, FifoJoin, Instance, LoadedProgram, PioPin, ShiftDirection, StateMachine};
+use fixed::traits::ToFixed;
+
+/// This struct represents an Encoder program loaded into pio instruction memory.
+pub struct PioEncoderProgram<'a, PIO: Instance> {
+    prg: LoadedProgram<'a, PIO>,
+}
+
+impl<'a, PIO: Instance> PioEncoderProgram<'a, PIO> {
+    /// Load the program into the given pio
+    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+        let prg = pio_proc::pio_asm!("wait 1 pin 1", "wait 0 pin 1", "in pins, 2", "push",);
+
+        let prg = common.load_program(&prg.program);
+
+        Self { prg }
+    }
+}
+
+/// Pio Backed quadrature encoder reader
+pub struct PioEncoder<'d, T: Instance, const SM: usize> {
+    sm: StateMachine<'d, T, SM>,
+}
+
+impl<'d, T: Instance, const SM: usize> PioEncoder<'d, T, SM> {
+    /// Configure a state machine with the loaded [PioEncoderProgram]
+    pub fn new(
+        pio: &mut Common<'d, T>,
+        mut sm: StateMachine<'d, T, SM>,
+        pin_a: impl PioPin,
+        pin_b: impl PioPin,
+        program: &PioEncoderProgram<'d, T>,
+    ) -> Self {
+        let mut pin_a = pio.make_pio_pin(pin_a);
+        let mut pin_b = pio.make_pio_pin(pin_b);
+        pin_a.set_pull(Pull::Up);
+        pin_b.set_pull(Pull::Up);
+        sm.set_pin_dirs(pio::Direction::In, &[&pin_a, &pin_b]);
+
+        let mut cfg = Config::default();
+        cfg.set_in_pins(&[&pin_a, &pin_b]);
+        cfg.fifo_join = FifoJoin::RxOnly;
+        cfg.shift_in.direction = ShiftDirection::Left;
+        cfg.clock_divider = 10_000.to_fixed();
+        cfg.use_program(&program.prg, &[]);
+        sm.set_config(&cfg);
+        sm.set_enable(true);
+        Self { sm }
+    }
+
+    /// Read a single count from the encoder
+    pub async fn read(&mut self) -> Direction {
+        loop {
+            match self.sm.rx().wait_pull().await {
+                0 => return Direction::CounterClockwise,
+                1 => return Direction::Clockwise,
+                _ => {}
+            }
+        }
+    }
+}
+
+/// Encoder Count Direction
+pub enum Direction {
+    /// Encoder turned clockwise
+    Clockwise,
+    /// Encoder turned counter clockwise
+    CounterClockwise,
+}
diff --git a/embassy-rp/src/pio_programs/stepper.rs b/embassy-rp/src/pio_programs/stepper.rs
new file mode 100644
index 000000000..0ecc4eff0
--- /dev/null
+++ b/embassy-rp/src/pio_programs/stepper.rs
@@ -0,0 +1,146 @@
+//! Pio Stepper Driver for 5-wire steppers
+
+use core::mem::{self, MaybeUninit};
+
+use crate::pio::{Common, Config, Direction, Instance, Irq, LoadedProgram, PioPin, StateMachine};
+use fixed::traits::ToFixed;
+use fixed::types::extra::U8;
+use fixed::FixedU32;
+
+/// This struct represents a Stepper driver program loaded into pio instruction memory.
+pub struct PioStepperProgram<'a, PIO: Instance> {
+    prg: LoadedProgram<'a, PIO>,
+}
+
+impl<'a, PIO: Instance> PioStepperProgram<'a, PIO> {
+    /// Load the program into the given pio
+    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+        let prg = pio_proc::pio_asm!(
+            "pull block",
+            "mov x, osr",
+            "pull block",
+            "mov y, osr",
+            "jmp !x end",
+            "loop:",
+            "jmp !osre step",
+            "mov osr, y",
+            "step:",
+            "out pins, 4 [31]"
+            "jmp x-- loop",
+            "end:",
+            "irq 0 rel"
+        );
+
+        let prg = common.load_program(&prg.program);
+
+        Self { prg }
+    }
+}
+
+/// Pio backed Stepper driver
+pub struct PioStepper<'d, T: Instance, const SM: usize> {
+    irq: Irq<'d, T, SM>,
+    sm: StateMachine<'d, T, SM>,
+}
+
+impl<'d, T: Instance, const SM: usize> PioStepper<'d, T, SM> {
+    /// Configure a state machine to drive a stepper
+    pub fn new(
+        pio: &mut Common<'d, T>,
+        mut sm: StateMachine<'d, T, SM>,
+        irq: Irq<'d, T, SM>,
+        pin0: impl PioPin,
+        pin1: impl PioPin,
+        pin2: impl PioPin,
+        pin3: impl PioPin,
+        program: &PioStepperProgram<'d, T>,
+    ) -> Self {
+        let pin0 = pio.make_pio_pin(pin0);
+        let pin1 = pio.make_pio_pin(pin1);
+        let pin2 = pio.make_pio_pin(pin2);
+        let pin3 = pio.make_pio_pin(pin3);
+        sm.set_pin_dirs(Direction::Out, &[&pin0, &pin1, &pin2, &pin3]);
+        let mut cfg = Config::default();
+        cfg.set_out_pins(&[&pin0, &pin1, &pin2, &pin3]);
+        cfg.clock_divider = (125_000_000 / (100 * 136)).to_fixed();
+        cfg.use_program(&program.prg, &[]);
+        sm.set_config(&cfg);
+        sm.set_enable(true);
+        Self { irq, sm }
+    }
+
+    /// Set pulse frequency
+    pub fn set_frequency(&mut self, freq: u32) {
+        let clock_divider: FixedU32<U8> = (125_000_000 / (freq * 136)).to_fixed();
+        assert!(clock_divider <= 65536, "clkdiv must be <= 65536");
+        assert!(clock_divider >= 1, "clkdiv must be >= 1");
+        self.sm.set_clock_divider(clock_divider);
+        self.sm.clkdiv_restart();
+    }
+
+    /// Full step, one phase
+    pub async fn step(&mut self, steps: i32) {
+        if steps > 0 {
+            self.run(steps, 0b1000_0100_0010_0001_1000_0100_0010_0001).await
+        } else {
+            self.run(-steps, 0b0001_0010_0100_1000_0001_0010_0100_1000).await
+        }
+    }
+
+    /// Full step, two phase
+    pub async fn step2(&mut self, steps: i32) {
+        if steps > 0 {
+            self.run(steps, 0b1001_1100_0110_0011_1001_1100_0110_0011).await
+        } else {
+            self.run(-steps, 0b0011_0110_1100_1001_0011_0110_1100_1001).await
+        }
+    }
+
+    /// Half step
+    pub async fn step_half(&mut self, steps: i32) {
+        if steps > 0 {
+            self.run(steps, 0b1001_1000_1100_0100_0110_0010_0011_0001).await
+        } else {
+            self.run(-steps, 0b0001_0011_0010_0110_0100_1100_1000_1001).await
+        }
+    }
+
+    async fn run(&mut self, steps: i32, pattern: u32) {
+        self.sm.tx().wait_push(steps as u32).await;
+        self.sm.tx().wait_push(pattern).await;
+        let drop = OnDrop::new(|| {
+            self.sm.clear_fifos();
+            unsafe {
+                self.sm.exec_instr(
+                    pio::InstructionOperands::JMP {
+                        address: 0,
+                        condition: pio::JmpCondition::Always,
+                    }
+                    .encode(),
+                );
+            }
+        });
+        self.irq.wait().await;
+        drop.defuse();
+    }
+}
+
+struct OnDrop<F: FnOnce()> {
+    f: MaybeUninit<F>,
+}
+
+impl<F: FnOnce()> OnDrop<F> {
+    pub fn new(f: F) -> Self {
+        Self { f: MaybeUninit::new(f) }
+    }
+
+    pub fn defuse(self) {
+        mem::forget(self)
+    }
+}
+
+impl<F: FnOnce()> Drop for OnDrop<F> {
+    fn drop(&mut self) {
+        unsafe { self.f.as_ptr().read()() }
+    }
+}
diff --git a/embassy-rp/src/pio_programs/uart.rs b/embassy-rp/src/pio_programs/uart.rs
new file mode 100644
index 000000000..f4b3b204e
--- /dev/null
+++ b/embassy-rp/src/pio_programs/uart.rs
@@ -0,0 +1,186 @@
+//! Pio backed uart drivers
+
+use crate::{
+    clocks::clk_sys_freq,
+    gpio::Level,
+    pio::{
+        Common, Config, Direction as PioDirection, FifoJoin, Instance, LoadedProgram, PioPin, ShiftDirection,
+        StateMachine,
+    },
+};
+use core::convert::Infallible;
+use embedded_io_async::{ErrorType, Read, Write};
+use fixed::traits::ToFixed;
+
+/// This struct represents a uart tx program loaded into pio instruction memory.
+pub struct PioUartTxProgram<'a, PIO: Instance> {
+    prg: LoadedProgram<'a, PIO>,
+}
+
+impl<'a, PIO: Instance> PioUartTxProgram<'a, PIO> {
+    /// Load the uart tx program into the given pio
+    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+        let prg = pio_proc::pio_asm!(
+            r#"
+                .side_set 1 opt
+
+                ; An 8n1 UART transmit program.
+                ; OUT pin 0 and side-set pin 0 are both mapped to UART TX pin.
+
+                    pull       side 1 [7]  ; Assert stop bit, or stall with line in idle state
+                    set x, 7   side 0 [7]  ; Preload bit counter, assert start bit for 8 clocks
+                bitloop:                   ; This loop will run 8 times (8n1 UART)
+                    out pins, 1            ; Shift 1 bit from OSR to the first OUT pin
+                    jmp x-- bitloop   [6]  ; Each loop iteration is 8 cycles.
+            "#
+        );
+
+        let prg = common.load_program(&prg.program);
+
+        Self { prg }
+    }
+}
+
+/// PIO backed Uart transmitter
+pub struct PioUartTx<'a, PIO: Instance, const SM: usize> {
+    sm_tx: StateMachine<'a, PIO, SM>,
+}
+
+impl<'a, PIO: Instance, const SM: usize> PioUartTx<'a, PIO, SM> {
+    /// Configure a pio state machine to use the loaded tx program.
+    pub fn new(
+        baud: u32,
+        common: &mut Common<'a, PIO>,
+        mut sm_tx: StateMachine<'a, PIO, SM>,
+        tx_pin: impl PioPin,
+        program: &PioUartTxProgram<'a, PIO>,
+    ) -> Self {
+        let tx_pin = common.make_pio_pin(tx_pin);
+        sm_tx.set_pins(Level::High, &[&tx_pin]);
+        sm_tx.set_pin_dirs(PioDirection::Out, &[&tx_pin]);
+
+        let mut cfg = Config::default();
+
+        cfg.set_out_pins(&[&tx_pin]);
+        cfg.use_program(&program.prg, &[&tx_pin]);
+        cfg.shift_out.auto_fill = false;
+        cfg.shift_out.direction = ShiftDirection::Right;
+        cfg.fifo_join = FifoJoin::TxOnly;
+        cfg.clock_divider = (clk_sys_freq() / (8 * baud)).to_fixed();
+        sm_tx.set_config(&cfg);
+        sm_tx.set_enable(true);
+
+        Self { sm_tx }
+    }
+
+    /// Write a single u8
+    pub async fn write_u8(&mut self, data: u8) {
+        self.sm_tx.tx().wait_push(data as u32).await;
+    }
+}
+
+impl<PIO: Instance, const SM: usize> ErrorType for PioUartTx<'_, PIO, SM> {
+    type Error = Infallible;
+}
+
+impl<PIO: Instance, const SM: usize> Write for PioUartTx<'_, PIO, SM> {
+    async fn write(&mut self, buf: &[u8]) -> Result<usize, Infallible> {
+        for byte in buf {
+            self.write_u8(*byte).await;
+        }
+        Ok(buf.len())
+    }
+}
+
+/// This struct represents a Uart Rx program loaded into pio instruction memory.
+pub struct PioUartRxProgram<'a, PIO: Instance> {
+    prg: LoadedProgram<'a, PIO>,
+}
+
+impl<'a, PIO: Instance> PioUartRxProgram<'a, PIO> {
+    /// Load the uart rx program into the given pio
+    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+        let prg = pio_proc::pio_asm!(
+            r#"
+                ; Slightly more fleshed-out 8n1 UART receiver which handles framing errors and
+                ; break conditions more gracefully.
+                ; IN pin 0 and JMP pin are both mapped to the GPIO used as UART RX.
+
+                start:
+                    wait 0 pin 0        ; Stall until start bit is asserted
+                    set x, 7    [10]    ; Preload bit counter, then delay until halfway through
+                rx_bitloop:             ; the first data bit (12 cycles incl wait, set).
+                    in pins, 1          ; Shift data bit into ISR
+                    jmp x-- rx_bitloop [6] ; Loop 8 times, each loop iteration is 8 cycles
+                    jmp pin good_rx_stop   ; Check stop bit (should be high)
+
+                    irq 4 rel           ; Either a framing error or a break. Set a sticky flag,
+                    wait 1 pin 0        ; and wait for line to return to idle state.
+                    jmp start           ; Don't push data if we didn't see good framing.
+
+                good_rx_stop:           ; No delay before returning to start; a little slack is
+                    in null 24
+                    push                ; important in case the TX clock is slightly too fast.
+            "#
+        );
+
+        let prg = common.load_program(&prg.program);
+
+        Self { prg }
+    }
+}
+
+/// PIO backed Uart reciever
+pub struct PioUartRx<'a, PIO: Instance, const SM: usize> {
+    sm_rx: StateMachine<'a, PIO, SM>,
+}
+
+impl<'a, PIO: Instance, const SM: usize> PioUartRx<'a, PIO, SM> {
+    /// Configure a pio state machine to use the loaded rx program.
+    pub fn new(
+        baud: u32,
+        common: &mut Common<'a, PIO>,
+        mut sm_rx: StateMachine<'a, PIO, SM>,
+        rx_pin: impl PioPin,
+        program: &PioUartRxProgram<'a, PIO>,
+    ) -> Self {
+        let mut cfg = Config::default();
+        cfg.use_program(&program.prg, &[]);
+
+        let rx_pin = common.make_pio_pin(rx_pin);
+        sm_rx.set_pins(Level::High, &[&rx_pin]);
+        cfg.set_in_pins(&[&rx_pin]);
+        cfg.set_jmp_pin(&rx_pin);
+        sm_rx.set_pin_dirs(PioDirection::In, &[&rx_pin]);
+
+        cfg.clock_divider = (clk_sys_freq() / (8 * baud)).to_fixed();
+        cfg.shift_in.auto_fill = false;
+        cfg.shift_in.direction = ShiftDirection::Right;
+        cfg.shift_in.threshold = 32;
+        cfg.fifo_join = FifoJoin::RxOnly;
+        sm_rx.set_config(&cfg);
+        sm_rx.set_enable(true);
+
+        Self { sm_rx }
+    }
+
+    /// Wait for a single u8
+    pub async fn read_u8(&mut self) -> u8 {
+        self.sm_rx.rx().wait_pull().await as u8
+    }
+}
+
+impl<PIO: Instance, const SM: usize> ErrorType for PioUartRx<'_, PIO, SM> {
+    type Error = Infallible;
+}
+
+impl<PIO: Instance, const SM: usize> Read for PioUartRx<'_, PIO, SM> {
+    async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Infallible> {
+        let mut i = 0;
+        while i < buf.len() {
+            buf[i] = self.read_u8().await;
+            i += 1;
+        }
+        Ok(i)
+    }
+}
diff --git a/embassy-rp/src/pio_programs/ws2812.rs b/embassy-rp/src/pio_programs/ws2812.rs
new file mode 100644
index 000000000..3fc7e1017
--- /dev/null
+++ b/embassy-rp/src/pio_programs/ws2812.rs
@@ -0,0 +1,118 @@
+//! [ws2812](https://www.sparkfun.com/datasheets/LCD/HD44780.pdf)
+
+use crate::{
+    clocks::clk_sys_freq,
+    dma::{AnyChannel, Channel},
+    into_ref,
+    pio::{Common, Config, FifoJoin, Instance, LoadedProgram, PioPin, ShiftConfig, ShiftDirection, StateMachine},
+    Peripheral, PeripheralRef,
+};
+use embassy_time::Timer;
+use fixed::types::U24F8;
+use smart_leds::RGB8;
+
+const T1: u8 = 2; // start bit
+const T2: u8 = 5; // data bit
+const T3: u8 = 3; // stop bit
+const CYCLES_PER_BIT: u32 = (T1 + T2 + T3) as u32;
+
+/// This struct represents a ws2812 program loaded into pio instruction memory.
+pub struct PioWs2812Program<'a, PIO: Instance> {
+    prg: LoadedProgram<'a, PIO>,
+}
+
+impl<'a, PIO: Instance> PioWs2812Program<'a, PIO> {
+    /// Load the ws2812 program into the given pio
+    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+        let side_set = pio::SideSet::new(false, 1, false);
+        let mut a: pio::Assembler<32> = pio::Assembler::new_with_side_set(side_set);
+
+        let mut wrap_target = a.label();
+        let mut wrap_source = a.label();
+        let mut do_zero = a.label();
+        a.set_with_side_set(pio::SetDestination::PINDIRS, 1, 0);
+        a.bind(&mut wrap_target);
+        // Do stop bit
+        a.out_with_delay_and_side_set(pio::OutDestination::X, 1, T3 - 1, 0);
+        // Do start bit
+        a.jmp_with_delay_and_side_set(pio::JmpCondition::XIsZero, &mut do_zero, T1 - 1, 1);
+        // Do data bit = 1
+        a.jmp_with_delay_and_side_set(pio::JmpCondition::Always, &mut wrap_target, T2 - 1, 1);
+        a.bind(&mut do_zero);
+        // Do data bit = 0
+        a.nop_with_delay_and_side_set(T2 - 1, 0);
+        a.bind(&mut wrap_source);
+
+        let prg = a.assemble_with_wrap(wrap_source, wrap_target);
+        let prg = common.load_program(&prg);
+
+        Self { prg }
+    }
+}
+
+/// Pio backed ws2812 driver
+/// Const N is the number of ws2812 leds attached to this pin
+pub struct PioWs2812<'d, P: Instance, const S: usize, const N: usize> {
+    dma: PeripheralRef<'d, AnyChannel>,
+    sm: StateMachine<'d, P, S>,
+}
+
+impl<'d, P: Instance, const S: usize, const N: usize> PioWs2812<'d, P, S, N> {
+    /// Configure a pio state machine to use the loaded ws2812 program.
+    pub fn new(
+        pio: &mut Common<'d, P>,
+        mut sm: StateMachine<'d, P, S>,
+        dma: impl Peripheral<P = impl Channel> + 'd,
+        pin: impl PioPin,
+        program: &PioWs2812Program<'d, P>,
+    ) -> Self {
+        into_ref!(dma);
+
+        // Setup sm0
+        let mut cfg = Config::default();
+
+        // Pin config
+        let out_pin = pio.make_pio_pin(pin);
+        cfg.set_out_pins(&[&out_pin]);
+        cfg.set_set_pins(&[&out_pin]);
+
+        cfg.use_program(&program.prg, &[&out_pin]);
+
+        // Clock config, measured in kHz to avoid overflows
+        let clock_freq = U24F8::from_num(clk_sys_freq() / 1000);
+        let ws2812_freq = U24F8::from_num(800);
+        let bit_freq = ws2812_freq * CYCLES_PER_BIT;
+        cfg.clock_divider = clock_freq / bit_freq;
+
+        // FIFO config
+        cfg.fifo_join = FifoJoin::TxOnly;
+        cfg.shift_out = ShiftConfig {
+            auto_fill: true,
+            threshold: 24,
+            direction: ShiftDirection::Left,
+        };
+
+        sm.set_config(&cfg);
+        sm.set_enable(true);
+
+        Self {
+            dma: dma.map_into(),
+            sm,
+        }
+    }
+
+    /// Write a buffer of [smart_leds::RGB8] to the ws2812 string
+    pub async fn write(&mut self, colors: &[RGB8; N]) {
+        // Precompute the word bytes from the colors
+        let mut words = [0u32; N];
+        for i in 0..N {
+            let word = (u32::from(colors[i].g) << 24) | (u32::from(colors[i].r) << 16) | (u32::from(colors[i].b) << 8);
+            words[i] = word;
+        }
+
+        // DMA transfer
+        self.sm.tx().dma_push(self.dma.reborrow(), &words).await;
+
+        Timer::after_micros(55).await;
+    }
+}