diff options
| author | Dirk Stolle <[email protected]> | 2023-05-08 23:25:01 +0200 |
|---|---|---|
| committer | Dirk Stolle <[email protected]> | 2023-05-08 23:25:01 +0200 |
| commit | 0584312ef0324d2ac67dbb9517176fabf628eec9 (patch) | |
| tree | 1b6e67474474fad99e7035a8e8898f4fb78656ad /embassy-rp | |
| parent | d0703f83dbe0099c3dca0c912d873365a2188018 (diff) | |
Fix some typos
Diffstat (limited to 'embassy-rp')
| -rw-r--r-- | embassy-rp/src/flash.rs | 2 | ||||
| -rw-r--r-- | embassy-rp/src/i2c.rs | 2 | ||||
| -rw-r--r-- | embassy-rp/src/uart/buffered.rs | 2 | ||||
| -rw-r--r-- | embassy-rp/src/uart/mod.rs | 4 |
4 files changed, 5 insertions, 5 deletions
diff --git a/embassy-rp/src/flash.rs b/embassy-rp/src/flash.rs index 6ab05ff0b..51c7af913 100644 --- a/embassy-rp/src/flash.rs +++ b/embassy-rp/src/flash.rs | |||
| @@ -25,7 +25,7 @@ pub const ERASE_SIZE: usize = 4096; | |||
| 25 | #[derive(Debug, Copy, Clone, PartialEq, Eq)] | 25 | #[derive(Debug, Copy, Clone, PartialEq, Eq)] |
| 26 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] | 26 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] |
| 27 | pub enum Error { | 27 | pub enum Error { |
| 28 | /// Opration using a location not in flash. | 28 | /// Operation using a location not in flash. |
| 29 | OutOfBounds, | 29 | OutOfBounds, |
| 30 | /// Unaligned operation or using unaligned buffers. | 30 | /// Unaligned operation or using unaligned buffers. |
| 31 | Unaligned, | 31 | Unaligned, |
diff --git a/embassy-rp/src/i2c.rs b/embassy-rp/src/i2c.rs index cd5364393..d5dc94406 100644 --- a/embassy-rp/src/i2c.rs +++ b/embassy-rp/src/i2c.rs | |||
| @@ -551,7 +551,7 @@ impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> { | |||
| 551 | 551 | ||
| 552 | if abort_reason.is_err() || (send_stop && last) { | 552 | if abort_reason.is_err() || (send_stop && last) { |
| 553 | // If the transaction was aborted or if it completed | 553 | // If the transaction was aborted or if it completed |
| 554 | // successfully wait until the STOP condition has occured. | 554 | // successfully wait until the STOP condition has occurred. |
| 555 | 555 | ||
| 556 | while !p.ic_raw_intr_stat().read().stop_det() {} | 556 | while !p.ic_raw_intr_stat().read().stop_det() {} |
| 557 | 557 | ||
diff --git a/embassy-rp/src/uart/buffered.rs b/embassy-rp/src/uart/buffered.rs index 59fec8f1b..9d3de1bd8 100644 --- a/embassy-rp/src/uart/buffered.rs +++ b/embassy-rp/src/uart/buffered.rs | |||
| @@ -544,7 +544,7 @@ pub(crate) unsafe fn on_interrupt<T: Instance>(_: *mut ()) { | |||
| 544 | s.rx_waker.wake(); | 544 | s.rx_waker.wake(); |
| 545 | } | 545 | } |
| 546 | // Disable any further RX interrupts when the buffer becomes full or | 546 | // Disable any further RX interrupts when the buffer becomes full or |
| 547 | // errors have occured. this lets us buffer additional errors in the | 547 | // errors have occurred. This lets us buffer additional errors in the |
| 548 | // fifo without needing more error storage locations, and most applications | 548 | // fifo without needing more error storage locations, and most applications |
| 549 | // will want to do a full reset of their uart state anyway once an error | 549 | // will want to do a full reset of their uart state anyway once an error |
| 550 | // has happened. | 550 | // has happened. |
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs index 4084c158a..a0ee6b4ce 100644 --- a/embassy-rp/src/uart/mod.rs +++ b/embassy-rp/src/uart/mod.rs | |||
| @@ -231,7 +231,7 @@ impl<'d, T: Instance> UartTx<'d, T, Async> { | |||
| 231 | } | 231 | } |
| 232 | 232 | ||
| 233 | impl<'d, T: Instance, M: Mode> UartRx<'d, T, M> { | 233 | impl<'d, T: Instance, M: Mode> UartRx<'d, T, M> { |
| 234 | /// Create a new DMA-enabled UART which can only recieve data | 234 | /// Create a new DMA-enabled UART which can only receive data |
| 235 | pub fn new( | 235 | pub fn new( |
| 236 | _uart: impl Peripheral<P = T> + 'd, | 236 | _uart: impl Peripheral<P = T> + 'd, |
| 237 | rx: impl Peripheral<P = impl RxPin<T>> + 'd, | 237 | rx: impl Peripheral<P = impl RxPin<T>> + 'd, |
| @@ -690,7 +690,7 @@ impl<'d, T: Instance, M: Mode> Uart<'d, T, M> { | |||
| 690 | self.tx.send_break(bits).await | 690 | self.tx.send_break(bits).await |
| 691 | } | 691 | } |
| 692 | 692 | ||
| 693 | /// Split the Uart into a transmitter and receiver, which is particuarly | 693 | /// Split the Uart into a transmitter and receiver, which is particularly |
| 694 | /// useful when having two tasks correlating to transmitting and receiving. | 694 | /// useful when having two tasks correlating to transmitting and receiving. |
| 695 | pub fn split(self) -> (UartTx<'d, T, M>, UartRx<'d, T, M>) { | 695 | pub fn split(self) -> (UartTx<'d, T, M>, UartRx<'d, T, M>) { |
| 696 | (self.tx, self.rx) | 696 | (self.tx, self.rx) |
