Merge pull request #3999 from embassy-rs/peripehral-v2

Remove Peripheral trait, rename PeripheralRef->Peri.

27 files changed, 362 insertions, 497 deletions

diff --git a/embassy-rp/src/adc.rs b/embassy-rp/src/adc.rs
index 1265a22a0..ec0c8c46c 100644
--- a/embassy-rp/src/adc.rs
+++ b/embassy-rp/src/adc.rs
@@ -5,7 +5,6 @@ use core::mem;
 use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::Poll;
 
-use embassy_hal_internal::{into_ref, PeripheralRef};
 use embassy_sync::waitqueue::AtomicWaker;
 
 use crate::gpio::{self, AnyPin, Pull, SealedPin as GpioPin};
@@ -13,7 +12,7 @@ use crate::interrupt::typelevel::Binding;
 use crate::interrupt::InterruptExt;
 use crate::pac::dma::vals::TreqSel;
 use crate::peripherals::{ADC, ADC_TEMP_SENSOR};
-use crate::{dma, interrupt, pac, peripherals, Peripheral, RegExt};
+use crate::{dma, interrupt, pac, peripherals, Peri, RegExt};
 
 static WAKER: AtomicWaker = AtomicWaker::new();
 
@@ -23,8 +22,8 @@ static WAKER: AtomicWaker = AtomicWaker::new();
 pub struct Config {}
 
 enum Source<'p> {
-    Pin(PeripheralRef<'p, AnyPin>),
-    TempSensor(PeripheralRef<'p, ADC_TEMP_SENSOR>),
+    Pin(Peri<'p, AnyPin>),
+    TempSensor(Peri<'p, ADC_TEMP_SENSOR>),
 }
 
 /// ADC channel.
@@ -32,8 +31,7 @@ pub struct Channel<'p>(Source<'p>);
 
 impl<'p> Channel<'p> {
     /// Create a new ADC channel from pin with the provided [Pull] configuration.
-    pub fn new_pin(pin: impl Peripheral<P = impl AdcPin + 'p> + 'p, pull: Pull) -> Self {
-        into_ref!(pin);
+    pub fn new_pin(pin: Peri<'p, impl AdcPin + 'p>, pull: Pull) -> Self {
         pin.pad_ctrl().modify(|w| {
             #[cfg(feature = "_rp235x")]
             w.set_iso(false);
@@ -47,14 +45,14 @@ impl<'p> Channel<'p> {
             w.set_pue(pull == Pull::Up);
             w.set_pde(pull == Pull::Down);
         });
-        Self(Source::Pin(pin.map_into()))
+        Self(Source::Pin(pin.into()))
     }
 
     /// Create a new ADC channel for the internal temperature sensor.
-    pub fn new_temp_sensor(s: impl Peripheral<P = ADC_TEMP_SENSOR> + 'p) -> Self {
+    pub fn new_temp_sensor(s: Peri<'p, ADC_TEMP_SENSOR>) -> Self {
         let r = pac::ADC;
         r.cs().write_set(|w| w.set_ts_en(true));
-        Self(Source::TempSensor(s.into_ref()))
+        Self(Source::TempSensor(s))
     }
 
     fn channel(&self) -> u8 {
@@ -190,7 +188,7 @@ impl<'d, M: Mode> Adc<'d, M> {
 impl<'d> Adc<'d, Async> {
     /// Create ADC driver in async mode.
     pub fn new(
-        _inner: impl Peripheral<P = ADC> + 'd,
+        _inner: Peri<'d, ADC>,
         _irq: impl Binding<interrupt::typelevel::ADC_IRQ_FIFO, InterruptHandler>,
         _config: Config,
     ) -> Self {
@@ -242,7 +240,7 @@ impl<'d> Adc<'d, Async> {
         buf: &mut [W],
         fcs_err: bool,
         div: u16,
-        dma: impl Peripheral<P = impl dma::Channel>,
+        dma: Peri<'_, impl dma::Channel>,
     ) -> Result<(), Error> {
         #[cfg(feature = "rp2040")]
         let mut rrobin = 0_u8;
@@ -323,7 +321,7 @@ impl<'d> Adc<'d, Async> {
         ch: &mut [Channel<'_>],
         buf: &mut [S],
         div: u16,
-        dma: impl Peripheral<P = impl dma::Channel>,
+        dma: Peri<'_, impl dma::Channel>,
     ) -> Result<(), Error> {
         self.read_many_inner(ch.iter().map(|c| c.channel()), buf, false, div, dma)
             .await
@@ -339,7 +337,7 @@ impl<'d> Adc<'d, Async> {
         ch: &mut [Channel<'_>],
         buf: &mut [Sample],
         div: u16,
-        dma: impl Peripheral<P = impl dma::Channel>,
+        dma: Peri<'_, impl dma::Channel>,
     ) {
         // errors are reported in individual samples
         let _ = self
@@ -362,7 +360,7 @@ impl<'d> Adc<'d, Async> {
         ch: &mut Channel<'_>,
         buf: &mut [S],
         div: u16,
-        dma: impl Peripheral<P = impl dma::Channel>,
+        dma: Peri<'_, impl dma::Channel>,
     ) -> Result<(), Error> {
         self.read_many_inner([ch.channel()].into_iter(), buf, false, div, dma)
             .await
@@ -377,7 +375,7 @@ impl<'d> Adc<'d, Async> {
         ch: &mut Channel<'_>,
         buf: &mut [Sample],
         div: u16,
-        dma: impl Peripheral<P = impl dma::Channel>,
+        dma: Peri<'_, impl dma::Channel>,
     ) {
         // errors are reported in individual samples
         let _ = self
@@ -394,7 +392,7 @@ impl<'d> Adc<'d, Async> {
 
 impl<'d> Adc<'d, Blocking> {
     /// Create ADC driver in blocking mode.
-    pub fn new_blocking(_inner: impl Peripheral<P = ADC> + 'd, _config: Config) -> Self {
+    pub fn new_blocking(_inner: Peri<'d, ADC>, _config: Config) -> Self {
         Self::setup();
 
         Self { phantom: PhantomData }
diff --git a/embassy-rp/src/bootsel.rs b/embassy-rp/src/bootsel.rs
index d24ce7bd8..14f9e46aa 100644
--- a/embassy-rp/src/bootsel.rs
+++ b/embassy-rp/src/bootsel.rs
@@ -8,20 +8,19 @@
 //! This module provides functionality to poll BOOTSEL from an embassy application.
 
 use crate::flash::in_ram;
+use crate::Peri;
 
-impl crate::peripherals::BOOTSEL {
-    /// Polls the BOOTSEL button. Returns true if the button is pressed.
-    ///
-    /// Polling isn't cheap, as this function waits for core 1 to finish it's current
-    /// task and for any DMAs from flash to complete
-    pub fn is_pressed(&mut self) -> bool {
-        let mut cs_status = Default::default();
+/// Reads the BOOTSEL button. Returns true if the button is pressed.
+///
+/// Reading isn't cheap, as this function waits for core 1 to finish it's current
+/// task and for any DMAs from flash to complete
+pub fn is_bootsel_pressed(_p: Peri<'_, crate::peripherals::BOOTSEL>) -> bool {
+    let mut cs_status = Default::default();
 
-        unsafe { in_ram(|| cs_status = ram_helpers::read_cs_status()) }.expect("Must be called from Core 0");
+    unsafe { in_ram(|| cs_status = ram_helpers::read_cs_status()) }.expect("Must be called from Core 0");
 
-        // bootsel is active low, so invert
-        !cs_status.infrompad()
-    }
+    // bootsel is active low, so invert
+    !cs_status.infrompad()
 }
 
 mod ram_helpers {
diff --git a/embassy-rp/src/clocks.rs b/embassy-rp/src/clocks.rs
index 705dde62a..67aa5e540 100644
--- a/embassy-rp/src/clocks.rs
+++ b/embassy-rp/src/clocks.rs
@@ -7,13 +7,12 @@ use core::marker::PhantomData;
 use core::sync::atomic::AtomicU16;
 use core::sync::atomic::{AtomicU32, Ordering};
 
-use embassy_hal_internal::{into_ref, PeripheralRef};
 use pac::clocks::vals::*;
 
 use crate::gpio::{AnyPin, SealedPin};
 #[cfg(feature = "rp2040")]
 use crate::pac::common::{Reg, RW};
-use crate::{pac, reset, Peripheral};
+use crate::{pac, reset, Peri};
 
 // NOTE: all gpin handling is commented out for future reference.
 // gpin is not usually safe to use during the boot init() call, so it won't
@@ -200,8 +199,8 @@ impl ClockConfig {
 
     // pub fn bind_gpin<P: GpinPin>(&mut self, gpin: Gpin<'static, P>, hz: u32) {
     //     match P::NR {
-    //         0 => self.gpin0 = Some((hz, gpin.map_into())),
-    //         1 => self.gpin1 = Some((hz, gpin.map_into())),
+    //         0 => self.gpin0 = Some((hz, gpin.into())),
+    //         1 => self.gpin1 = Some((hz, gpin.into())),
     //         _ => unreachable!(),
     //     }
     //     // pin is now provisionally bound. if the config is applied it must be forgotten,
@@ -845,15 +844,13 @@ impl_gpinpin!(PIN_22, 22, 1);
 
 /// General purpose clock input driver.
 pub struct Gpin<'d, T: GpinPin> {
-    gpin: PeripheralRef<'d, AnyPin>,
+    gpin: Peri<'d, AnyPin>,
     _phantom: PhantomData<T>,
 }
 
 impl<'d, T: GpinPin> Gpin<'d, T> {
     /// Create new gpin driver.
-    pub fn new(gpin: impl Peripheral<P = T> + 'd) -> Self {
-        into_ref!(gpin);
-
+    pub fn new(gpin: Peri<'d, T>) -> Self {
         #[cfg(feature = "rp2040")]
         gpin.gpio().ctrl().write(|w| w.set_funcsel(0x08));
 
@@ -867,14 +864,10 @@ impl<'d, T: GpinPin> Gpin<'d, T> {
         });
 
         Gpin {
-            gpin: gpin.map_into(),
+            gpin: gpin.into(),
             _phantom: PhantomData,
         }
     }
-
-    // fn map_into(self) -> Gpin<'d, AnyPin> {
-    //     unsafe { core::mem::transmute(self) }
-    // }
 }
 
 impl<'d, T: GpinPin> Drop for Gpin<'d, T> {
@@ -936,14 +929,12 @@ pub enum GpoutSrc {
 
 /// General purpose clock output driver.
 pub struct Gpout<'d, T: GpoutPin> {
-    gpout: PeripheralRef<'d, T>,
+    gpout: Peri<'d, T>,
 }
 
 impl<'d, T: GpoutPin> Gpout<'d, T> {
     /// Create new general purpose clock output.
-    pub fn new(gpout: impl Peripheral<P = T> + 'd) -> Self {
-        into_ref!(gpout);
-
+    pub fn new(gpout: Peri<'d, T>) -> Self {
         #[cfg(feature = "rp2040")]
         gpout.gpio().ctrl().write(|w| w.set_funcsel(0x08));
 
diff --git a/embassy-rp/src/dma.rs b/embassy-rp/src/dma.rs
index 2edcfdf5b..d31d1e159 100644
--- a/embassy-rp/src/dma.rs
+++ b/embassy-rp/src/dma.rs
@@ -4,7 +4,7 @@ use core::pin::Pin;
 use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::{Context, Poll};
 
-use embassy_hal_internal::{impl_peripheral, into_ref, Peripheral, PeripheralRef};
+use embassy_hal_internal::{impl_peripheral, Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 use pac::dma::vals::DataSize;
 
@@ -42,7 +42,7 @@ pub(crate) unsafe fn init() {
 ///
 /// SAFETY: Slice must point to a valid location reachable by DMA.
 pub unsafe fn read<'a, C: Channel, W: Word>(
-    ch: impl Peripheral<P = C> + 'a,
+    ch: Peri<'a, C>,
     from: *const W,
     to: *mut [W],
     dreq: vals::TreqSel,
@@ -63,7 +63,7 @@ pub unsafe fn read<'a, C: Channel, W: Word>(
 ///
 /// SAFETY: Slice must point to a valid location reachable by DMA.
 pub unsafe fn write<'a, C: Channel, W: Word>(
-    ch: impl Peripheral<P = C> + 'a,
+    ch: Peri<'a, C>,
     from: *const [W],
     to: *mut W,
     dreq: vals::TreqSel,
@@ -87,7 +87,7 @@ static mut DUMMY: u32 = 0;
 ///
 /// SAFETY: Slice must point to a valid location reachable by DMA.
 pub unsafe fn write_repeated<'a, C: Channel, W: Word>(
-    ch: impl Peripheral<P = C> + 'a,
+    ch: Peri<'a, C>,
     to: *mut W,
     len: usize,
     dreq: vals::TreqSel,
@@ -107,11 +107,7 @@ pub unsafe fn write_repeated<'a, C: Channel, W: Word>(
 /// DMA copy between slices.
 ///
 /// SAFETY: Slices must point to locations reachable by DMA.
-pub unsafe fn copy<'a, C: Channel, W: Word>(
-    ch: impl Peripheral<P = C> + 'a,
-    from: &[W],
-    to: &mut [W],
-) -> Transfer<'a, C> {
+pub unsafe fn copy<'a, C: Channel, W: Word>(ch: Peri<'a, C>, from: &[W], to: &mut [W]) -> Transfer<'a, C> {
     let from_len = from.len();
     let to_len = to.len();
     assert_eq!(from_len, to_len);
@@ -128,7 +124,7 @@ pub unsafe fn copy<'a, C: Channel, W: Word>(
 }
 
 fn copy_inner<'a, C: Channel>(
-    ch: impl Peripheral<P = C> + 'a,
+    ch: Peri<'a, C>,
     from: *const u32,
     to: *mut u32,
     len: usize,
@@ -137,8 +133,6 @@ fn copy_inner<'a, C: Channel>(
     incr_write: bool,
     dreq: vals::TreqSel,
 ) -> Transfer<'a, C> {
-    into_ref!(ch);
-
     let p = ch.regs();
 
     p.read_addr().write_value(from as u32);
@@ -171,13 +165,11 @@ fn copy_inner<'a, C: Channel>(
 /// DMA transfer driver.
 #[must_use = "futures do nothing unless you `.await` or poll them"]
 pub struct Transfer<'a, C: Channel> {
-    channel: PeripheralRef<'a, C>,
+    channel: Peri<'a, C>,
 }
 
 impl<'a, C: Channel> Transfer<'a, C> {
-    pub(crate) fn new(channel: impl Peripheral<P = C> + 'a) -> Self {
-        into_ref!(channel);
-
+    pub(crate) fn new(channel: Peri<'a, C>) -> Self {
         Self { channel }
     }
 }
@@ -219,7 +211,7 @@ trait SealedWord {}
 
 /// DMA channel interface.
 #[allow(private_bounds)]
-pub trait Channel: Peripheral<P = Self> + SealedChannel + Into<AnyChannel> + Sized + 'static {
+pub trait Channel: PeripheralType + SealedChannel + Into<AnyChannel> + Sized + 'static {
     /// Channel number.
     fn number(&self) -> u8;
 
@@ -227,11 +219,6 @@ pub trait Channel: Peripheral<P = Self> + SealedChannel + Into<AnyChannel> + Siz
     fn regs(&self) -> pac::dma::Channel {
         pac::DMA.ch(self.number() as _)
     }
-
-    /// Convert into type-erased [AnyChannel].
-    fn degrade(self) -> AnyChannel {
-        AnyChannel { number: self.number() }
-    }
 }
 
 /// DMA word.
@@ -287,7 +274,7 @@ macro_rules! channel {
 
         impl From<peripherals::$name> for crate::dma::AnyChannel {
             fn from(val: peripherals::$name) -> Self {
-                crate::dma::Channel::degrade(val)
+                Self { number: val.number() }
             }
         }
     };
diff --git a/embassy-rp/src/flash.rs b/embassy-rp/src/flash.rs
index a69b44961..ef1cd9212 100644
--- a/embassy-rp/src/flash.rs
+++ b/embassy-rp/src/flash.rs
@@ -4,7 +4,7 @@ use core::marker::PhantomData;
 use core::pin::Pin;
 use core::task::{Context, Poll};
 
-use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embedded_storage::nor_flash::{
     check_erase, check_read, check_write, ErrorType, MultiwriteNorFlash, NorFlash, NorFlashError, NorFlashErrorKind,
     ReadNorFlash,
@@ -114,7 +114,7 @@ impl<'a, 'd, T: Instance, const FLASH_SIZE: usize> Drop for BackgroundRead<'a, '
 
 /// Flash driver.
 pub struct Flash<'d, T: Instance, M: Mode, const FLASH_SIZE: usize> {
-    dma: Option<PeripheralRef<'d, AnyChannel>>,
+    dma: Option<Peri<'d, AnyChannel>>,
     phantom: PhantomData<(&'d mut T, M)>,
 }
 
@@ -253,7 +253,7 @@ impl<'d, T: Instance, M: Mode, const FLASH_SIZE: usize> Flash<'d, T, M, FLASH_SI
 
 impl<'d, T: Instance, const FLASH_SIZE: usize> Flash<'d, T, Blocking, FLASH_SIZE> {
     /// Create a new flash driver in blocking mode.
-    pub fn new_blocking(_flash: impl Peripheral<P = T> + 'd) -> Self {
+    pub fn new_blocking(_flash: Peri<'d, T>) -> Self {
         Self {
             dma: None,
             phantom: PhantomData,
@@ -263,10 +263,9 @@ impl<'d, T: Instance, const FLASH_SIZE: usize> Flash<'d, T, Blocking, FLASH_SIZE
 
 impl<'d, T: Instance, const FLASH_SIZE: usize> Flash<'d, T, Async, FLASH_SIZE> {
     /// Create a new flash driver in async mode.
-    pub fn new(_flash: impl Peripheral<P = T> + 'd, dma: impl Peripheral<P = impl Channel> + 'd) -> Self {
-        into_ref!(dma);
+    pub fn new(_flash: Peri<'d, T>, dma: Peri<'d, impl Channel>) -> Self {
         Self {
-            dma: Some(dma.map_into()),
+            dma: Some(dma.into()),
             phantom: PhantomData,
         }
     }
@@ -316,7 +315,7 @@ impl<'d, T: Instance, const FLASH_SIZE: usize> Flash<'d, T, Async, FLASH_SIZE> {
         const XIP_AUX_BASE: *const u32 = 0x50500000 as *const _;
         let transfer = unsafe {
             crate::dma::read(
-                self.dma.as_mut().unwrap(),
+                self.dma.as_mut().unwrap().reborrow(),
                 XIP_AUX_BASE,
                 data,
                 pac::dma::vals::TreqSel::XIP_STREAM,
@@ -965,7 +964,7 @@ trait SealedMode {}
 
 /// Flash instance.
 #[allow(private_bounds)]
-pub trait Instance: SealedInstance {}
+pub trait Instance: SealedInstance + PeripheralType {}
 /// Flash mode.
 #[allow(private_bounds)]
 pub trait Mode: SealedMode {}
diff --git a/embassy-rp/src/gpio.rs b/embassy-rp/src/gpio.rs
index 111e03356..af0837f6a 100644
--- a/embassy-rp/src/gpio.rs
+++ b/embassy-rp/src/gpio.rs
@@ -5,13 +5,13 @@ use core::future::Future;
 use core::pin::Pin as FuturePin;
 use core::task::{Context, Poll};
 
-use embassy_hal_internal::{impl_peripheral, into_ref, PeripheralRef};
+use embassy_hal_internal::{impl_peripheral, Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 
 use crate::interrupt::InterruptExt;
 use crate::pac::common::{Reg, RW};
 use crate::pac::SIO;
-use crate::{interrupt, pac, peripherals, Peripheral, RegExt};
+use crate::{interrupt, pac, peripherals, RegExt};
 
 #[cfg(any(feature = "rp2040", feature = "rp235xa"))]
 pub(crate) const BANK0_PIN_COUNT: usize = 30;
@@ -115,7 +115,7 @@ pub struct Input<'d> {
 impl<'d> Input<'d> {
     /// Create GPIO input driver for a [Pin] with the provided [Pull] configuration.
     #[inline]
-    pub fn new(pin: impl Peripheral<P = impl Pin> + 'd, pull: Pull) -> Self {
+    pub fn new(pin: Peri<'d, impl Pin>, pull: Pull) -> Self {
         let mut pin = Flex::new(pin);
         pin.set_as_input();
         pin.set_pull(pull);
@@ -266,11 +266,11 @@ fn IO_IRQ_QSPI() {
 
 #[must_use = "futures do nothing unless you `.await` or poll them"]
 struct InputFuture<'d> {
-    pin: PeripheralRef<'d, AnyPin>,
+    pin: Peri<'d, AnyPin>,
 }
 
 impl<'d> InputFuture<'d> {
-    fn new(pin: PeripheralRef<'d, AnyPin>, level: InterruptTrigger) -> Self {
+    fn new(pin: Peri<'d, AnyPin>, level: InterruptTrigger) -> Self {
         let pin_group = (pin.pin() % 8) as usize;
         // first, clear the INTR register bits. without this INTR will still
         // contain reports of previous edges, causing the IRQ to fire early
@@ -359,7 +359,7 @@ pub struct Output<'d> {
 impl<'d> Output<'d> {
     /// Create GPIO output driver for a [Pin] with the provided [Level].
     #[inline]
-    pub fn new(pin: impl Peripheral<P = impl Pin> + 'd, initial_output: Level) -> Self {
+    pub fn new(pin: Peri<'d, impl Pin>, initial_output: Level) -> Self {
         let mut pin = Flex::new(pin);
         match initial_output {
             Level::High => pin.set_high(),
@@ -440,7 +440,7 @@ pub struct OutputOpenDrain<'d> {
 impl<'d> OutputOpenDrain<'d> {
     /// Create GPIO output driver for a [Pin] in open drain mode with the provided [Level].
     #[inline]
-    pub fn new(pin: impl Peripheral<P = impl Pin> + 'd, initial_output: Level) -> Self {
+    pub fn new(pin: Peri<'d, impl Pin>, initial_output: Level) -> Self {
         let mut pin = Flex::new(pin);
         pin.set_low();
         match initial_output {
@@ -581,7 +581,7 @@ impl<'d> OutputOpenDrain<'d> {
 /// set while not in output mode, so the pin's level will be 'remembered' when it is not in output
 /// mode.
 pub struct Flex<'d> {
-    pin: PeripheralRef<'d, AnyPin>,
+    pin: Peri<'d, AnyPin>,
 }
 
 impl<'d> Flex<'d> {
@@ -590,9 +590,7 @@ impl<'d> Flex<'d> {
     /// The pin remains disconnected. The initial output level is unspecified, but can be changed
     /// before the pin is put into output mode.
     #[inline]
-    pub fn new(pin: impl Peripheral<P = impl Pin> + 'd) -> Self {
-        into_ref!(pin);
-
+    pub fn new(pin: Peri<'d, impl Pin>) -> Self {
         pin.pad_ctrl().write(|w| {
             #[cfg(feature = "_rp235x")]
             w.set_iso(false);
@@ -606,7 +604,7 @@ impl<'d> Flex<'d> {
             w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::SIOB_PROC_0 as _);
         });
 
-        Self { pin: pin.map_into() }
+        Self { pin: pin.into() }
     }
 
     #[inline]
@@ -829,7 +827,7 @@ impl<'d> Drop for Flex<'d> {
 
 /// Dormant wake driver.
 pub struct DormantWake<'w> {
-    pin: PeripheralRef<'w, AnyPin>,
+    pin: Peri<'w, AnyPin>,
     cfg: DormantWakeConfig,
 }
 
@@ -919,14 +917,7 @@ pub(crate) trait SealedPin: Sized {
 
 /// Interface for a Pin that can be configured by an [Input] or [Output] driver, or converted to an [AnyPin].
 #[allow(private_bounds)]
-pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + SealedPin + Sized + 'static {
-    /// Degrade to a generic pin struct
-    fn degrade(self) -> AnyPin {
-        AnyPin {
-            pin_bank: self.pin_bank(),
-        }
-    }
-
+pub trait Pin: PeripheralType + Into<AnyPin> + SealedPin + Sized + 'static {
     /// Returns the pin number within a bank
     #[inline]
     fn pin(&self) -> u8 {
@@ -951,8 +942,8 @@ impl AnyPin {
     /// # Safety
     ///
     /// You must ensure that you’re only using one instance of this type at a time.
-    pub unsafe fn steal(pin_bank: u8) -> Self {
-        Self { pin_bank }
+    pub unsafe fn steal(pin_bank: u8) -> Peri<'static, Self> {
+        Peri::new_unchecked(Self { pin_bank })
     }
 }
 
@@ -979,7 +970,9 @@ macro_rules! impl_pin {
 
         impl From<peripherals::$name> for crate::gpio::AnyPin {
             fn from(val: peripherals::$name) -> Self {
-                crate::gpio::Pin::degrade(val)
+                Self {
+                    pin_bank: val.pin_bank(),
+                }
             }
         }
     };
diff --git a/embassy-rp/src/i2c.rs b/embassy-rp/src/i2c.rs
index 3a2ee666c..adc38b73d 100644
--- a/embassy-rp/src/i2c.rs
+++ b/embassy-rp/src/i2c.rs
@@ -5,13 +5,13 @@ use core::future;
 use core::marker::PhantomData;
 use core::task::Poll;
 
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 use pac::i2c;
 
 use crate::gpio::AnyPin;
 use crate::interrupt::typelevel::{Binding, Interrupt};
-use crate::{interrupt, pac, peripherals, Peripheral};
+use crate::{interrupt, pac, peripherals};
 
 /// I2C error abort reason
 #[derive(Debug, PartialEq, Eq, Clone, Copy)]
@@ -83,28 +83,25 @@ pub struct I2c<'d, T: Instance, M: Mode> {
 impl<'d, T: Instance> I2c<'d, T, Blocking> {
     /// Create a new driver instance in blocking mode.
     pub fn new_blocking(
-        peri: impl Peripheral<P = T> + 'd,
-        scl: impl Peripheral<P = impl SclPin<T>> + 'd,
-        sda: impl Peripheral<P = impl SdaPin<T>> + 'd,
+        peri: Peri<'d, T>,
+        scl: Peri<'d, impl SclPin<T>>,
+        sda: Peri<'d, impl SdaPin<T>>,
         config: Config,
     ) -> Self {
-        into_ref!(scl, sda);
-        Self::new_inner(peri, scl.map_into(), sda.map_into(), config)
+        Self::new_inner(peri, scl.into(), sda.into(), config)
     }
 }
 
 impl<'d, T: Instance> I2c<'d, T, Async> {
     /// Create a new driver instance in async mode.
     pub fn new_async(
-        peri: impl Peripheral<P = T> + 'd,
-        scl: impl Peripheral<P = impl SclPin<T>> + 'd,
-        sda: impl Peripheral<P = impl SdaPin<T>> + 'd,
+        peri: Peri<'d, T>,
+        scl: Peri<'d, impl SclPin<T>>,
+        sda: Peri<'d, impl SdaPin<T>>,
         _irq: impl Binding<T::Interrupt, InterruptHandler<T>>,
         config: Config,
     ) -> Self {
-        into_ref!(scl, sda);
-
-        let i2c = Self::new_inner(peri, scl.map_into(), sda.map_into(), config);
+        let i2c = Self::new_inner(peri, scl.into(), sda.into(), config);
 
         let r = T::regs();
 
@@ -378,14 +375,7 @@ where
 }
 
 impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> {
-    fn new_inner(
-        _peri: impl Peripheral<P = T> + 'd,
-        scl: PeripheralRef<'d, AnyPin>,
-        sda: PeripheralRef<'d, AnyPin>,
-        config: Config,
-    ) -> Self {
-        into_ref!(_peri);
-
+    fn new_inner(_peri: Peri<'d, T>, scl: Peri<'d, AnyPin>, sda: Peri<'d, AnyPin>, config: Config) -> Self {
         let reset = T::reset();
         crate::reset::reset(reset);
         crate::reset::unreset_wait(reset);
@@ -804,7 +794,7 @@ impl_mode!(Async);
 
 /// I2C instance.
 #[allow(private_bounds)]
-pub trait Instance: SealedInstance {
+pub trait Instance: SealedInstance + PeripheralType {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-rp/src/i2c_slave.rs b/embassy-rp/src/i2c_slave.rs
index d17b11d14..d420030d8 100644
--- a/embassy-rp/src/i2c_slave.rs
+++ b/embassy-rp/src/i2c_slave.rs
@@ -3,12 +3,11 @@ use core::future;
 use core::marker::PhantomData;
 use core::task::Poll;
 
-use embassy_hal_internal::into_ref;
 use pac::i2c;
 
 use crate::i2c::{set_up_i2c_pin, AbortReason, Instance, InterruptHandler, SclPin, SdaPin, FIFO_SIZE};
 use crate::interrupt::typelevel::{Binding, Interrupt};
-use crate::{pac, Peripheral};
+use crate::{pac, Peri};
 
 /// I2C error
 #[derive(Debug, PartialEq, Eq, Clone, Copy)]
@@ -87,14 +86,12 @@ pub struct I2cSlave<'d, T: Instance> {
 impl<'d, T: Instance> I2cSlave<'d, T> {
     /// Create a new instance.
     pub fn new(
-        _peri: impl Peripheral<P = T> + 'd,
-        scl: impl Peripheral<P = impl SclPin<T>> + 'd,
-        sda: impl Peripheral<P = impl SdaPin<T>> + 'd,
+        _peri: Peri<'d, T>,
+        scl: Peri<'d, impl SclPin<T>>,
+        sda: Peri<'d, impl SdaPin<T>>,
         _irq: impl Binding<T::Interrupt, InterruptHandler<T>>,
         config: Config,
     ) -> Self {
-        into_ref!(_peri, scl, sda);
-
         assert!(config.addr != 0);
 
         // Configure SCL & SDA pins
diff --git a/embassy-rp/src/lib.rs b/embassy-rp/src/lib.rs
index de60af890..35099d07b 100644
--- a/embassy-rp/src/lib.rs
+++ b/embassy-rp/src/lib.rs
@@ -54,7 +54,7 @@ pub mod pio;
 pub(crate) mod relocate;
 
 // Reexports
-pub use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
+pub use embassy_hal_internal::{Peri, PeripheralType};
 #[cfg(feature = "unstable-pac")]
 pub use rp_pac as pac;
 #[cfg(not(feature = "unstable-pac"))]
diff --git a/embassy-rp/src/multicore.rs b/embassy-rp/src/multicore.rs
index 1450505b9..d10b6837c 100644
--- a/embassy-rp/src/multicore.rs
+++ b/embassy-rp/src/multicore.rs
@@ -51,7 +51,7 @@ use core::sync::atomic::{compiler_fence, AtomicBool, Ordering};
 
 use crate::interrupt::InterruptExt;
 use crate::peripherals::CORE1;
-use crate::{gpio, install_stack_guard, interrupt, pac};
+use crate::{gpio, install_stack_guard, interrupt, pac, Peri};
 
 const PAUSE_TOKEN: u32 = 0xDEADBEEF;
 const RESUME_TOKEN: u32 = !0xDEADBEEF;
@@ -139,7 +139,7 @@ unsafe fn SIO_IRQ_FIFO() {
 }
 
 /// Spawn a function on this core
-pub fn spawn_core1<F, const SIZE: usize>(_core1: CORE1, stack: &'static mut Stack<SIZE>, entry: F)
+pub fn spawn_core1<F, const SIZE: usize>(_core1: Peri<'static, CORE1>, stack: &'static mut Stack<SIZE>, entry: F)
 where
     F: FnOnce() -> bad::Never + Send + 'static,
 {
diff --git a/embassy-rp/src/pio/mod.rs b/embassy-rp/src/pio/mod.rs
index fd09d4bba..ec698d99c 100644
--- a/embassy-rp/src/pio/mod.rs
+++ b/embassy-rp/src/pio/mod.rs
@@ -6,7 +6,7 @@ use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::{Context, Poll};
 
 use atomic_polyfill::{AtomicU64, AtomicU8};
-use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 use fixed::types::extra::U8;
 use fixed::FixedU32;
@@ -235,7 +235,7 @@ impl<'a, 'd, PIO: Instance> Drop for IrqFuture<'a, 'd, PIO> {
 
 /// Type representing a PIO pin.
 pub struct Pin<'l, PIO: Instance> {
-    pin: PeripheralRef<'l, AnyPin>,
+    pin: Peri<'l, AnyPin>,
     pio: PhantomData<PIO>,
 }
 
@@ -360,7 +360,7 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineRx<'d, PIO, SM> {
     /// Prepare DMA transfer from RX FIFO.
     pub fn dma_pull<'a, C: Channel, W: Word>(
         &'a mut self,
-        ch: PeripheralRef<'a, C>,
+        ch: Peri<'a, C>,
         data: &'a mut [W],
         bswap: bool,
     ) -> Transfer<'a, C> {
@@ -451,7 +451,7 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineTx<'d, PIO, SM> {
     /// Prepare a DMA transfer to TX FIFO.
     pub fn dma_push<'a, C: Channel, W: Word>(
         &'a mut self,
-        ch: PeripheralRef<'a, C>,
+        ch: Peri<'a, C>,
         data: &'a [W],
         bswap: bool,
     ) -> Transfer<'a, C> {
@@ -1147,9 +1147,7 @@ impl<'d, PIO: Instance> Common<'d, PIO> {
     /// (i.e., have their `FUNCSEL` reset to `NULL`) when the [`Common`] *and*
     /// all [`StateMachine`]s for this block have been dropped. **Other members
     /// of [`Pio`] do not keep pin registrations alive.**
-    pub fn make_pio_pin(&mut self, pin: impl Peripheral<P = impl PioPin + 'd> + 'd) -> Pin<'d, PIO> {
-        into_ref!(pin);
-
+    pub fn make_pio_pin(&mut self, pin: Peri<'d, impl PioPin + 'd>) -> Pin<'d, PIO> {
         // enable the outputs
         pin.pad_ctrl().write(|w| w.set_od(false));
         // especially important on the 235x, where IE defaults to 0
@@ -1171,7 +1169,7 @@ impl<'d, PIO: Instance> Common<'d, PIO> {
         // we can be relaxed about this because we're &mut here and nothing is cached
         PIO::state().used_pins.fetch_or(1 << pin.pin_bank(), Ordering::Relaxed);
         Pin {
-            pin: pin.into_ref().map_into(),
+            pin: pin.into(),
             pio: PhantomData::default(),
         }
     }
@@ -1304,7 +1302,7 @@ pub struct Pio<'d, PIO: Instance> {
 
 impl<'d, PIO: Instance> Pio<'d, PIO> {
     /// Create a new instance of a PIO peripheral.
-    pub fn new(_pio: impl Peripheral<P = PIO> + 'd, _irq: impl Binding<PIO::Interrupt, InterruptHandler<PIO>>) -> Self {
+    pub fn new(_pio: Peri<'d, PIO>, _irq: impl Binding<PIO::Interrupt, InterruptHandler<PIO>>) -> Self {
         PIO::state().users.store(5, Ordering::Release);
         PIO::state().used_pins.store(0, Ordering::Release);
         PIO::Interrupt::unpend();
@@ -1389,7 +1387,7 @@ trait SealedInstance {
 
 /// PIO instance.
 #[allow(private_bounds)]
-pub trait Instance: SealedInstance + Sized + Unpin {
+pub trait Instance: SealedInstance + PeripheralType + Sized + Unpin {
     /// Interrupt for this peripheral.
     type Interrupt: crate::interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-rp/src/pio_programs/hd44780.rs b/embassy-rp/src/pio_programs/hd44780.rs
index 6997b91f3..5846a8027 100644
--- a/embassy-rp/src/pio_programs/hd44780.rs
+++ b/embassy-rp/src/pio_programs/hd44780.rs
@@ -5,7 +5,7 @@ use crate::pio::{
     Common, Config, Direction, FifoJoin, Instance, Irq, LoadedProgram, PioPin, ShiftConfig, ShiftDirection,
     StateMachine,
 };
-use crate::{into_ref, Peripheral, PeripheralRef};
+use crate::Peri;
 
 /// This struct represents a HD44780 program that takes command words (<wait:24> <command:4> <0:4>)
 pub struct PioHD44780CommandWordProgram<'a, PIO: Instance> {
@@ -99,7 +99,7 @@ impl<'a, PIO: Instance> PioHD44780CommandSequenceProgram<'a, PIO> {
 
 /// Pio backed HD44780 driver
 pub struct PioHD44780<'l, P: Instance, const S: usize> {
-    dma: PeripheralRef<'l, AnyChannel>,
+    dma: Peri<'l, AnyChannel>,
     sm: StateMachine<'l, P, S>,
 
     buf: [u8; 40],
@@ -111,19 +111,17 @@ impl<'l, P: Instance, const S: usize> PioHD44780<'l, P, S> {
         common: &mut Common<'l, P>,
         mut sm: StateMachine<'l, P, S>,
         mut irq: Irq<'l, P, S>,
-        dma: impl Peripheral<P = impl Channel> + 'l,
-        rs: impl PioPin,
-        rw: impl PioPin,
-        e: impl PioPin,
-        db4: impl PioPin,
-        db5: impl PioPin,
-        db6: impl PioPin,
-        db7: impl PioPin,
+        mut dma: Peri<'l, impl Channel>,
+        rs: Peri<'l, impl PioPin>,
+        rw: Peri<'l, impl PioPin>,
+        e: Peri<'l, impl PioPin>,
+        db4: Peri<'l, impl PioPin>,
+        db5: Peri<'l, impl PioPin>,
+        db6: Peri<'l, impl PioPin>,
+        db7: Peri<'l, impl PioPin>,
         word_prg: &PioHD44780CommandWordProgram<'l, P>,
         seq_prg: &PioHD44780CommandSequenceProgram<'l, P>,
     ) -> PioHD44780<'l, P, S> {
-        into_ref!(dma);
-
         let rs = common.make_pio_pin(rs);
         let rw = common.make_pio_pin(rw);
         let e = common.make_pio_pin(e);
@@ -176,7 +174,7 @@ impl<'l, P: Instance, const S: usize> PioHD44780<'l, P, S> {
         sm.tx().dma_push(dma.reborrow(), &[0x81u8, 0x0f, 1], false).await;
 
         Self {
-            dma: dma.map_into(),
+            dma: dma.into(),
             sm,
             buf: [0x20; 40],
         }
diff --git a/embassy-rp/src/pio_programs/i2s.rs b/embassy-rp/src/pio_programs/i2s.rs
index 17e321405..b967f0160 100644
--- a/embassy-rp/src/pio_programs/i2s.rs
+++ b/embassy-rp/src/pio_programs/i2s.rs
@@ -6,16 +6,16 @@ use crate::dma::{AnyChannel, Channel, Transfer};
 use crate::pio::{
     Common, Config, Direction, FifoJoin, Instance, LoadedProgram, PioPin, ShiftConfig, ShiftDirection, StateMachine,
 };
-use crate::{into_ref, Peripheral, PeripheralRef};
+use crate::Peri;
 
 /// This struct represents an i2s output driver program
-pub struct PioI2sOutProgram<'a, PIO: Instance> {
-    prg: LoadedProgram<'a, PIO>,
+pub struct PioI2sOutProgram<'d, PIO: Instance> {
+    prg: LoadedProgram<'d, PIO>,
 }
 
-impl<'a, PIO: Instance> PioI2sOutProgram<'a, PIO> {
+impl<'d, PIO: Instance> PioI2sOutProgram<'d, PIO> {
     /// Load the program into the given pio
-    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+    pub fn new(common: &mut Common<'d, PIO>) -> Self {
         let prg = pio::pio_asm!(
             ".side_set 2",
             "    set x, 14          side 0b01", // side 0bWB - W = Word Clock, B = Bit Clock
@@ -37,27 +37,25 @@ impl<'a, PIO: Instance> PioI2sOutProgram<'a, PIO> {
 }
 
 /// Pio backed I2s output driver
-pub struct PioI2sOut<'a, P: Instance, const S: usize> {
-    dma: PeripheralRef<'a, AnyChannel>,
-    sm: StateMachine<'a, P, S>,
+pub struct PioI2sOut<'d, P: Instance, const S: usize> {
+    dma: Peri<'d, AnyChannel>,
+    sm: StateMachine<'d, P, S>,
 }
 
-impl<'a, P: Instance, const S: usize> PioI2sOut<'a, P, S> {
+impl<'d, P: Instance, const S: usize> PioI2sOut<'d, P, S> {
     /// Configure a state machine to output I2s
     pub fn new(
-        common: &mut Common<'a, P>,
-        mut sm: StateMachine<'a, P, S>,
-        dma: impl Peripheral<P = impl Channel> + 'a,
-        data_pin: impl PioPin,
-        bit_clock_pin: impl PioPin,
-        lr_clock_pin: impl PioPin,
+        common: &mut Common<'d, P>,
+        mut sm: StateMachine<'d, P, S>,
+        dma: Peri<'d, impl Channel>,
+        data_pin: Peri<'d, impl PioPin>,
+        bit_clock_pin: Peri<'d, impl PioPin>,
+        lr_clock_pin: Peri<'d, impl PioPin>,
         sample_rate: u32,
         bit_depth: u32,
         channels: u32,
-        program: &PioI2sOutProgram<'a, P>,
+        program: &PioI2sOutProgram<'d, P>,
     ) -> Self {
-        into_ref!(dma);
-
         let data_pin = common.make_pio_pin(data_pin);
         let bit_clock_pin = common.make_pio_pin(bit_clock_pin);
         let left_right_clock_pin = common.make_pio_pin(lr_clock_pin);
@@ -82,10 +80,7 @@ impl<'a, P: Instance, const S: usize> PioI2sOut<'a, P, S> {
 
         sm.set_enable(true);
 
-        Self {
-            dma: dma.map_into(),
-            sm,
-        }
+        Self { dma: dma.into(), sm }
     }
 
     /// Return an in-prograss dma transfer future. Awaiting it will guarentee a complete transfer.
diff --git a/embassy-rp/src/pio_programs/onewire.rs b/embassy-rp/src/pio_programs/onewire.rs
index 040333e76..00783aab0 100644
--- a/embassy-rp/src/pio_programs/onewire.rs
+++ b/embassy-rp/src/pio_programs/onewire.rs
@@ -1,6 +1,7 @@
 //! OneWire pio driver
 
 use crate::pio::{Common, Config, Instance, LoadedProgram, PioPin, ShiftConfig, ShiftDirection, StateMachine};
+use crate::Peri;
 
 /// This struct represents an onewire driver program
 pub struct PioOneWireProgram<'a, PIO: Instance> {
@@ -69,7 +70,7 @@ impl<'d, PIO: Instance, const SM: usize> PioOneWire<'d, PIO, SM> {
     pub fn new(
         common: &mut Common<'d, PIO>,
         mut sm: StateMachine<'d, PIO, SM>,
-        pin: impl PioPin,
+        pin: Peri<'d, impl PioPin>,
         program: &PioOneWireProgram<'d, PIO>,
     ) -> Self {
         let pin = common.make_pio_pin(pin);
diff --git a/embassy-rp/src/pio_programs/pwm.rs b/embassy-rp/src/pio_programs/pwm.rs
index 01ffe012a..f0f837bc5 100644
--- a/embassy-rp/src/pio_programs/pwm.rs
+++ b/embassy-rp/src/pio_programs/pwm.rs
@@ -4,9 +4,9 @@ use core::time::Duration;
 
 use pio::InstructionOperands;
 
-use crate::clocks;
 use crate::gpio::Level;
 use crate::pio::{Common, Config, Direction, Instance, LoadedProgram, Pin, PioPin, StateMachine};
+use crate::{clocks, Peri};
 
 /// This converts the duration provided into the number of cycles the PIO needs to run to make it take the same time
 fn to_pio_cycles(duration: Duration) -> u32 {
@@ -52,7 +52,7 @@ impl<'d, T: Instance, const SM: usize> PioPwm<'d, T, SM> {
     pub fn new(
         pio: &mut Common<'d, T>,
         mut sm: StateMachine<'d, T, SM>,
-        pin: impl PioPin,
+        pin: Peri<'d, impl PioPin>,
         program: &PioPwmProgram<'d, T>,
     ) -> Self {
         let pin = pio.make_pio_pin(pin);
diff --git a/embassy-rp/src/pio_programs/rotary_encoder.rs b/embassy-rp/src/pio_programs/rotary_encoder.rs
index f2fb02aca..e520da8a3 100644
--- a/embassy-rp/src/pio_programs/rotary_encoder.rs
+++ b/embassy-rp/src/pio_programs/rotary_encoder.rs
@@ -6,6 +6,7 @@ use crate::gpio::Pull;
 use crate::pio::{
     Common, Config, Direction as PioDirection, FifoJoin, Instance, LoadedProgram, PioPin, ShiftDirection, StateMachine,
 };
+use crate::Peri;
 
 /// This struct represents an Encoder program loaded into pio instruction memory.
 pub struct PioEncoderProgram<'a, PIO: Instance> {
@@ -33,8 +34,8 @@ impl<'d, T: Instance, const SM: usize> PioEncoder<'d, T, SM> {
     pub fn new(
         pio: &mut Common<'d, T>,
         mut sm: StateMachine<'d, T, SM>,
-        pin_a: impl PioPin,
-        pin_b: impl PioPin,
+        pin_a: Peri<'d, impl PioPin>,
+        pin_b: Peri<'d, impl PioPin>,
         program: &PioEncoderProgram<'d, T>,
     ) -> Self {
         let mut pin_a = pio.make_pio_pin(pin_a);
diff --git a/embassy-rp/src/pio_programs/stepper.rs b/embassy-rp/src/pio_programs/stepper.rs
index c8f74167d..495191659 100644
--- a/embassy-rp/src/pio_programs/stepper.rs
+++ b/embassy-rp/src/pio_programs/stepper.rs
@@ -7,6 +7,7 @@ use fixed::types::extra::U8;
 use fixed::FixedU32;
 
 use crate::pio::{Common, Config, Direction, Instance, Irq, LoadedProgram, PioPin, StateMachine};
+use crate::Peri;
 
 /// This struct represents a Stepper driver program loaded into pio instruction memory.
 pub struct PioStepperProgram<'a, PIO: Instance> {
@@ -50,10 +51,10 @@ impl<'d, T: Instance, const SM: usize> PioStepper<'d, T, SM> {
         pio: &mut Common<'d, T>,
         mut sm: StateMachine<'d, T, SM>,
         irq: Irq<'d, T, SM>,
-        pin0: impl PioPin,
-        pin1: impl PioPin,
-        pin2: impl PioPin,
-        pin3: impl PioPin,
+        pin0: Peri<'d, impl PioPin>,
+        pin1: Peri<'d, impl PioPin>,
+        pin2: Peri<'d, impl PioPin>,
+        pin3: Peri<'d, impl PioPin>,
         program: &PioStepperProgram<'d, T>,
     ) -> Self {
         let pin0 = pio.make_pio_pin(pin0);
diff --git a/embassy-rp/src/pio_programs/uart.rs b/embassy-rp/src/pio_programs/uart.rs
index 641daca61..04e39a571 100644
--- a/embassy-rp/src/pio_programs/uart.rs
+++ b/embassy-rp/src/pio_programs/uart.rs
@@ -10,15 +10,16 @@ use crate::gpio::Level;
 use crate::pio::{
     Common, Config, Direction as PioDirection, FifoJoin, Instance, LoadedProgram, PioPin, ShiftDirection, StateMachine,
 };
+use crate::Peri;
 
 /// This struct represents a uart tx program loaded into pio instruction memory.
-pub struct PioUartTxProgram<'a, PIO: Instance> {
-    prg: LoadedProgram<'a, PIO>,
+pub struct PioUartTxProgram<'d, PIO: Instance> {
+    prg: LoadedProgram<'d, PIO>,
 }
 
-impl<'a, PIO: Instance> PioUartTxProgram<'a, PIO> {
+impl<'d, PIO: Instance> PioUartTxProgram<'d, PIO> {
     /// Load the uart tx program into the given pio
-    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+    pub fn new(common: &mut Common<'d, PIO>) -> Self {
         let prg = pio::pio_asm!(
             r#"
                 .side_set 1 opt
@@ -41,18 +42,18 @@ impl<'a, PIO: Instance> PioUartTxProgram<'a, PIO> {
 }
 
 /// PIO backed Uart transmitter
-pub struct PioUartTx<'a, PIO: Instance, const SM: usize> {
-    sm_tx: StateMachine<'a, PIO, SM>,
+pub struct PioUartTx<'d, PIO: Instance, const SM: usize> {
+    sm_tx: StateMachine<'d, PIO, SM>,
 }
 
-impl<'a, PIO: Instance, const SM: usize> PioUartTx<'a, PIO, SM> {
+impl<'d, PIO: Instance, const SM: usize> PioUartTx<'d, PIO, SM> {
     /// Configure a pio state machine to use the loaded tx program.
     pub fn new(
         baud: u32,
-        common: &mut Common<'a, PIO>,
-        mut sm_tx: StateMachine<'a, PIO, SM>,
-        tx_pin: impl PioPin,
-        program: &PioUartTxProgram<'a, PIO>,
+        common: &mut Common<'d, PIO>,
+        mut sm_tx: StateMachine<'d, PIO, SM>,
+        tx_pin: Peri<'d, impl PioPin>,
+        program: &PioUartTxProgram<'d, PIO>,
     ) -> Self {
         let tx_pin = common.make_pio_pin(tx_pin);
         sm_tx.set_pins(Level::High, &[&tx_pin]);
@@ -92,13 +93,13 @@ impl<PIO: Instance, const SM: usize> Write for PioUartTx<'_, PIO, SM> {
 }
 
 /// This struct represents a Uart Rx program loaded into pio instruction memory.
-pub struct PioUartRxProgram<'a, PIO: Instance> {
-    prg: LoadedProgram<'a, PIO>,
+pub struct PioUartRxProgram<'d, PIO: Instance> {
+    prg: LoadedProgram<'d, PIO>,
 }
 
-impl<'a, PIO: Instance> PioUartRxProgram<'a, PIO> {
+impl<'d, PIO: Instance> PioUartRxProgram<'d, PIO> {
     /// Load the uart rx program into the given pio
-    pub fn new(common: &mut Common<'a, PIO>) -> Self {
+    pub fn new(common: &mut Common<'d, PIO>) -> Self {
         let prg = pio::pio_asm!(
             r#"
                 ; Slightly more fleshed-out 8n1 UART receiver which handles framing errors and
@@ -130,18 +131,18 @@ impl<'a, PIO: Instance> PioUartRxProgram<'a, PIO> {
 }
 
 /// PIO backed Uart reciever
-pub struct PioUartRx<'a, PIO: Instance, const SM: usize> {
-    sm_rx: StateMachine<'a, PIO, SM>,
+pub struct PioUartRx<'d, PIO: Instance, const SM: usize> {
+    sm_rx: StateMachine<'d, PIO, SM>,
 }
 
-impl<'a, PIO: Instance, const SM: usize> PioUartRx<'a, PIO, SM> {
+impl<'d, PIO: Instance, const SM: usize> PioUartRx<'d, PIO, SM> {
     /// Configure a pio state machine to use the loaded rx program.
     pub fn new(
         baud: u32,
-        common: &mut Common<'a, PIO>,
-        mut sm_rx: StateMachine<'a, PIO, SM>,
-        rx_pin: impl PioPin,
-        program: &PioUartRxProgram<'a, PIO>,
+        common: &mut Common<'d, PIO>,
+        mut sm_rx: StateMachine<'d, PIO, SM>,
+        rx_pin: Peri<'d, impl PioPin>,
+        program: &PioUartRxProgram<'d, PIO>,
     ) -> Self {
         let mut cfg = Config::default();
         cfg.use_program(&program.prg, &[]);
diff --git a/embassy-rp/src/pio_programs/ws2812.rs b/embassy-rp/src/pio_programs/ws2812.rs
index 2462a64e6..578937e11 100644
--- a/embassy-rp/src/pio_programs/ws2812.rs
+++ b/embassy-rp/src/pio_programs/ws2812.rs
@@ -9,7 +9,7 @@ use crate::dma::{AnyChannel, Channel};
 use crate::pio::{
     Common, Config, FifoJoin, Instance, LoadedProgram, PioPin, ShiftConfig, ShiftDirection, StateMachine,
 };
-use crate::{into_ref, Peripheral, PeripheralRef};
+use crate::Peri;
 
 const T1: u8 = 2; // start bit
 const T2: u8 = 5; // data bit
@@ -53,7 +53,7 @@ impl<'a, PIO: Instance> PioWs2812Program<'a, PIO> {
 /// Pio backed ws2812 driver
 /// Const N is the number of ws2812 leds attached to this pin
 pub struct PioWs2812<'d, P: Instance, const S: usize, const N: usize> {
-    dma: PeripheralRef<'d, AnyChannel>,
+    dma: Peri<'d, AnyChannel>,
     sm: StateMachine<'d, P, S>,
 }
 
@@ -62,12 +62,10 @@ impl<'d, P: Instance, const S: usize, const N: usize> PioWs2812<'d, P, S, N> {
     pub fn new(
         pio: &mut Common<'d, P>,
         mut sm: StateMachine<'d, P, S>,
-        dma: impl Peripheral<P = impl Channel> + 'd,
-        pin: impl PioPin,
+        dma: Peri<'d, impl Channel>,
+        pin: Peri<'d, impl PioPin>,
         program: &PioWs2812Program<'d, P>,
     ) -> Self {
-        into_ref!(dma);
-
         // Setup sm0
         let mut cfg = Config::default();
 
@@ -95,10 +93,7 @@ impl<'d, P: Instance, const S: usize, const N: usize> PioWs2812<'d, P, S, N> {
         sm.set_config(&cfg);
         sm.set_enable(true);
 
-        Self {
-            dma: dma.map_into(),
-            sm,
-        }
+        Self { dma: dma.into(), sm }
     }
 
     /// Write a buffer of [smart_leds::RGB8] to the ws2812 string
diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs
index 4fb8ade12..f631402a2 100644
--- a/embassy-rp/src/pwm.rs
+++ b/embassy-rp/src/pwm.rs
@@ -1,6 +1,6 @@
 //! Pulse Width Modulation (PWM)
 
-use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 pub use embedded_hal_1::pwm::SetDutyCycle;
 use embedded_hal_1::pwm::{Error, ErrorKind, ErrorType};
 use fixed::traits::ToFixed;
@@ -99,8 +99,8 @@ impl Error for PwmError {
 
 /// PWM driver.
 pub struct Pwm<'d> {
-    pin_a: Option<PeripheralRef<'d, AnyPin>>,
-    pin_b: Option<PeripheralRef<'d, AnyPin>>,
+    pin_a: Option<Peri<'d, AnyPin>>,
+    pin_b: Option<Peri<'d, AnyPin>>,
     slice: usize,
 }
 
@@ -131,8 +131,8 @@ impl<'d> SetDutyCycle for Pwm<'d> {
 impl<'d> Pwm<'d> {
     fn new_inner(
         slice: usize,
-        a: Option<PeripheralRef<'d, AnyPin>>,
-        b: Option<PeripheralRef<'d, AnyPin>>,
+        a: Option<Peri<'d, AnyPin>>,
+        b: Option<Peri<'d, AnyPin>>,
         b_pull: Pull,
         config: Config,
         divmode: Divmode,
@@ -171,60 +171,34 @@ impl<'d> Pwm<'d> {
 
     /// Create PWM driver without any configured pins.
     #[inline]
-    pub fn new_free<T: Slice>(slice: impl Peripheral<P = T> + 'd, config: Config) -> Self {
-        into_ref!(slice);
+    pub fn new_free<T: Slice>(slice: Peri<'d, T>, config: Config) -> Self {
         Self::new_inner(slice.number(), None, None, Pull::None, config, Divmode::DIV)
     }
 
     /// Create PWM driver with a single 'a' pin as output.
     #[inline]
-    pub fn new_output_a<T: Slice>(
-        slice: impl Peripheral<P = T> + 'd,
-        a: impl Peripheral<P = impl ChannelAPin<T>> + 'd,
-        config: Config,
-    ) -> Self {
-        into_ref!(slice, a);
-        Self::new_inner(
-            slice.number(),
-            Some(a.map_into()),
-            None,
-            Pull::None,
-            config,
-            Divmode::DIV,
-        )
+    pub fn new_output_a<T: Slice>(slice: Peri<'d, T>, a: Peri<'d, impl ChannelAPin<T>>, config: Config) -> Self {
+        Self::new_inner(slice.number(), Some(a.into()), None, Pull::None, config, Divmode::DIV)
     }
 
     /// Create PWM driver with a single 'b' pin as output.
     #[inline]
-    pub fn new_output_b<T: Slice>(
-        slice: impl Peripheral<P = T> + 'd,
-        b: impl Peripheral<P = impl ChannelBPin<T>> + 'd,
-        config: Config,
-    ) -> Self {
-        into_ref!(slice, b);
-        Self::new_inner(
-            slice.number(),
-            None,
-            Some(b.map_into()),
-            Pull::None,
-            config,
-            Divmode::DIV,
-        )
+    pub fn new_output_b<T: Slice>(slice: Peri<'d, T>, b: Peri<'d, impl ChannelBPin<T>>, config: Config) -> Self {
+        Self::new_inner(slice.number(), None, Some(b.into()), Pull::None, config, Divmode::DIV)
     }
 
     /// Create PWM driver with a 'a' and 'b' pins as output.
     #[inline]
     pub fn new_output_ab<T: Slice>(
-        slice: impl Peripheral<P = T> + 'd,
-        a: impl Peripheral<P = impl ChannelAPin<T>> + 'd,
-        b: impl Peripheral<P = impl ChannelBPin<T>> + 'd,
+        slice: Peri<'d, T>,
+        a: Peri<'d, impl ChannelAPin<T>>,
+        b: Peri<'d, impl ChannelBPin<T>>,
         config: Config,
     ) -> Self {
-        into_ref!(slice, a, b);
         Self::new_inner(
             slice.number(),
-            Some(a.map_into()),
-            Some(b.map_into()),
+            Some(a.into()),
+            Some(b.into()),
             Pull::None,
             config,
             Divmode::DIV,
@@ -234,31 +208,29 @@ impl<'d> Pwm<'d> {
     /// Create PWM driver with a single 'b' as input pin.
     #[inline]
     pub fn new_input<T: Slice>(
-        slice: impl Peripheral<P = T> + 'd,
-        b: impl Peripheral<P = impl ChannelBPin<T>> + 'd,
+        slice: Peri<'d, T>,
+        b: Peri<'d, impl ChannelBPin<T>>,
         b_pull: Pull,
         mode: InputMode,
         config: Config,
     ) -> Self {
-        into_ref!(slice, b);
-        Self::new_inner(slice.number(), None, Some(b.map_into()), b_pull, config, mode.into())
+        Self::new_inner(slice.number(), None, Some(b.into()), b_pull, config, mode.into())
     }
 
     /// Create PWM driver with a 'a' and 'b' pins in the desired input mode.
     #[inline]
     pub fn new_output_input<T: Slice>(
-        slice: impl Peripheral<P = T> + 'd,
-        a: impl Peripheral<P = impl ChannelAPin<T>> + 'd,
-        b: impl Peripheral<P = impl ChannelBPin<T>> + 'd,
+        slice: Peri<'d, T>,
+        a: Peri<'d, impl ChannelAPin<T>>,
+        b: Peri<'d, impl ChannelBPin<T>>,
         b_pull: Pull,
         mode: InputMode,
         config: Config,
     ) -> Self {
-        into_ref!(slice, a, b);
         Self::new_inner(
             slice.number(),
-            Some(a.map_into()),
-            Some(b.map_into()),
+            Some(a.into()),
+            Some(b.into()),
             b_pull,
             config,
             mode.into(),
@@ -373,8 +345,8 @@ impl<'d> Pwm<'d> {
 }
 
 enum PwmChannelPin<'d> {
-    A(PeripheralRef<'d, AnyPin>),
-    B(PeripheralRef<'d, AnyPin>),
+    A(Peri<'d, AnyPin>),
+    B(Peri<'d, AnyPin>),
 }
 
 /// Single channel of Pwm driver.
@@ -498,7 +470,7 @@ trait SealedSlice {}
 
 /// PWM Slice.
 #[allow(private_bounds)]
-pub trait Slice: Peripheral<P = Self> + SealedSlice + Sized + 'static {
+pub trait Slice: PeripheralType + SealedSlice + Sized + 'static {
     /// Slice number.
     fn number(&self) -> usize;
 }
diff --git a/embassy-rp/src/rtc/mod.rs b/embassy-rp/src/rtc/mod.rs
index 2ce7ac645..63cf91d28 100644
--- a/embassy-rp/src/rtc/mod.rs
+++ b/embassy-rp/src/rtc/mod.rs
@@ -1,7 +1,7 @@
 //! RTC driver.
 mod filter;
 
-use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 
 pub use self::filter::DateTimeFilter;
 
@@ -14,7 +14,7 @@ use crate::clocks::clk_rtc_freq;
 
 /// A reference to the real time clock of the system
 pub struct Rtc<'d, T: Instance> {
-    inner: PeripheralRef<'d, T>,
+    inner: Peri<'d, T>,
 }
 
 impl<'d, T: Instance> Rtc<'d, T> {
@@ -23,9 +23,7 @@ impl<'d, T: Instance> Rtc<'d, T> {
     /// # Errors
     ///
     /// Will return `RtcError::InvalidDateTime` if the datetime is not a valid range.
-    pub fn new(inner: impl Peripheral<P = T> + 'd) -> Self {
-        into_ref!(inner);
-
+    pub fn new(inner: Peri<'d, T>) -> Self {
         // Set the RTC divider
         inner.regs().clkdiv_m1().write(|w| w.set_clkdiv_m1(clk_rtc_freq() - 1));
 
@@ -194,7 +192,7 @@ trait SealedInstance {
 
 /// RTC peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: SealedInstance {}
+pub trait Instance: SealedInstance + PeripheralType {}
 
 impl SealedInstance for crate::peripherals::RTC {
     fn regs(&self) -> crate::pac::rtc::Rtc {
diff --git a/embassy-rp/src/spi.rs b/embassy-rp/src/spi.rs
index c48b5c54f..559b3b909 100644
--- a/embassy-rp/src/spi.rs
+++ b/embassy-rp/src/spi.rs
@@ -3,12 +3,12 @@ use core::marker::PhantomData;
 
 use embassy_embedded_hal::SetConfig;
 use embassy_futures::join::join;
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 pub use embedded_hal_02::spi::{Phase, Polarity};
 
 use crate::dma::{AnyChannel, Channel};
 use crate::gpio::{AnyPin, Pin as GpioPin, SealedPin as _};
-use crate::{pac, peripherals, Peripheral};
+use crate::{pac, peripherals};
 
 /// SPI errors.
 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
@@ -42,9 +42,9 @@ impl Default for Config {
 
 /// SPI driver.
 pub struct Spi<'d, T: Instance, M: Mode> {
-    inner: PeripheralRef<'d, T>,
-    tx_dma: Option<PeripheralRef<'d, AnyChannel>>,
-    rx_dma: Option<PeripheralRef<'d, AnyChannel>>,
+    inner: Peri<'d, T>,
+    tx_dma: Option<Peri<'d, AnyChannel>>,
+    rx_dma: Option<Peri<'d, AnyChannel>>,
     phantom: PhantomData<(&'d mut T, M)>,
 }
 
@@ -73,17 +73,15 @@ fn calc_prescs(freq: u32) -> (u8, u8) {
 
 impl<'d, T: Instance, M: Mode> Spi<'d, T, M> {
     fn new_inner(
-        inner: impl Peripheral<P = T> + 'd,
-        clk: Option<PeripheralRef<'d, AnyPin>>,
-        mosi: Option<PeripheralRef<'d, AnyPin>>,
-        miso: Option<PeripheralRef<'d, AnyPin>>,
-        cs: Option<PeripheralRef<'d, AnyPin>>,
-        tx_dma: Option<PeripheralRef<'d, AnyChannel>>,
-        rx_dma: Option<PeripheralRef<'d, AnyChannel>>,
+        inner: Peri<'d, T>,
+        clk: Option<Peri<'d, AnyPin>>,
+        mosi: Option<Peri<'d, AnyPin>>,
+        miso: Option<Peri<'d, AnyPin>>,
+        cs: Option<Peri<'d, AnyPin>>,
+        tx_dma: Option<Peri<'d, AnyChannel>>,
+        rx_dma: Option<Peri<'d, AnyChannel>>,
         config: Config,
     ) -> Self {
-        into_ref!(inner);
-
         Self::apply_config(&inner, &config);
 
         let p = inner.regs();
@@ -161,7 +159,7 @@ impl<'d, T: Instance, M: Mode> Spi<'d, T, M> {
     ///
     /// Driver should be disabled before making changes and reenabled after the modifications
     /// are applied.
-    fn apply_config(inner: &PeripheralRef<'d, T>, config: &Config) {
+    fn apply_config(inner: &Peri<'d, T>, config: &Config) {
         let p = inner.regs();
         let (presc, postdiv) = calc_prescs(config.frequency);
 
@@ -273,18 +271,17 @@ impl<'d, T: Instance, M: Mode> Spi<'d, T, M> {
 impl<'d, T: Instance> Spi<'d, T, Blocking> {
     /// Create an SPI driver in blocking mode.
     pub fn new_blocking(
-        inner: impl Peripheral<P = T> + 'd,
-        clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
-        mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
-        miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
+        inner: Peri<'d, T>,
+        clk: Peri<'d, impl ClkPin<T> + 'd>,
+        mosi: Peri<'d, impl MosiPin<T> + 'd>,
+        miso: Peri<'d, impl MisoPin<T> + 'd>,
         config: Config,
     ) -> Self {
-        into_ref!(clk, mosi, miso);
         Self::new_inner(
             inner,
-            Some(clk.map_into()),
-            Some(mosi.map_into()),
-            Some(miso.map_into()),
+            Some(clk.into()),
+            Some(mosi.into()),
+            Some(miso.into()),
             None,
             None,
             None,
@@ -294,16 +291,15 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> {
 
     /// Create an SPI driver in blocking mode supporting writes only.
     pub fn new_blocking_txonly(
-        inner: impl Peripheral<P = T> + 'd,
-        clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
-        mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
+        inner: Peri<'d, T>,
+        clk: Peri<'d, impl ClkPin<T> + 'd>,
+        mosi: Peri<'d, impl MosiPin<T> + 'd>,
         config: Config,
     ) -> Self {
-        into_ref!(clk, mosi);
         Self::new_inner(
             inner,
-            Some(clk.map_into()),
-            Some(mosi.map_into()),
+            Some(clk.into()),
+            Some(mosi.into()),
             None,
             None,
             None,
@@ -314,17 +310,16 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> {
 
     /// Create an SPI driver in blocking mode supporting reads only.
     pub fn new_blocking_rxonly(
-        inner: impl Peripheral<P = T> + 'd,
-        clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
-        miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
+        inner: Peri<'d, T>,
+        clk: Peri<'d, impl ClkPin<T> + 'd>,
+        miso: Peri<'d, impl MisoPin<T> + 'd>,
         config: Config,
     ) -> Self {
-        into_ref!(clk, miso);
         Self::new_inner(
             inner,
-            Some(clk.map_into()),
+            Some(clk.into()),
             None,
-            Some(miso.map_into()),
+            Some(miso.into()),
             None,
             None,
             None,
@@ -336,43 +331,41 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> {
 impl<'d, T: Instance> Spi<'d, T, Async> {
     /// Create an SPI driver in async mode supporting DMA operations.
     pub fn new(
-        inner: impl Peripheral<P = T> + 'd,
-        clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
-        mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
-        miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
-        tx_dma: impl Peripheral<P = impl Channel> + 'd,
-        rx_dma: impl Peripheral<P = impl Channel> + 'd,
+        inner: Peri<'d, T>,
+        clk: Peri<'d, impl ClkPin<T> + 'd>,
+        mosi: Peri<'d, impl MosiPin<T> + 'd>,
+        miso: Peri<'d, impl MisoPin<T> + 'd>,
+        tx_dma: Peri<'d, impl Channel>,
+        rx_dma: Peri<'d, impl Channel>,
         config: Config,
     ) -> Self {
-        into_ref!(tx_dma, rx_dma, clk, mosi, miso);
         Self::new_inner(
             inner,
-            Some(clk.map_into()),
-            Some(mosi.map_into()),
-            Some(miso.map_into()),
+            Some(clk.into()),
+            Some(mosi.into()),
+            Some(miso.into()),
             None,
-            Some(tx_dma.map_into()),
-            Some(rx_dma.map_into()),
+            Some(tx_dma.into()),
+            Some(rx_dma.into()),
             config,
         )
     }
 
     /// Create an SPI driver in async mode supporting DMA write operations only.
     pub fn new_txonly(
-        inner: impl Peripheral<P = T> + 'd,
-        clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
-        mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
-        tx_dma: impl Peripheral<P = impl Channel> + 'd,
+        inner: Peri<'d, T>,
+        clk: Peri<'d, impl ClkPin<T> + 'd>,
+        mosi: Peri<'d, impl MosiPin<T> + 'd>,
+        tx_dma: Peri<'d, impl Channel>,
         config: Config,
     ) -> Self {
-        into_ref!(tx_dma, clk, mosi);
         Self::new_inner(
             inner,
-            Some(clk.map_into()),
-            Some(mosi.map_into()),
+            Some(clk.into()),
+            Some(mosi.into()),
             None,
             None,
-            Some(tx_dma.map_into()),
+            Some(tx_dma.into()),
             None,
             config,
         )
@@ -380,29 +373,28 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
 
     /// Create an SPI driver in async mode supporting DMA read operations only.
     pub fn new_rxonly(
-        inner: impl Peripheral<P = T> + 'd,
-        clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd,
-        miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
-        tx_dma: impl Peripheral<P = impl Channel> + 'd,
-        rx_dma: impl Peripheral<P = impl Channel> + 'd,
+        inner: Peri<'d, T>,
+        clk: Peri<'d, impl ClkPin<T> + 'd>,
+        miso: Peri<'d, impl MisoPin<T> + 'd>,
+        tx_dma: Peri<'d, impl Channel>,
+        rx_dma: Peri<'d, impl Channel>,
         config: Config,
     ) -> Self {
-        into_ref!(tx_dma, rx_dma, clk, miso);
         Self::new_inner(
             inner,
-            Some(clk.map_into()),
+            Some(clk.into()),
             None,
-            Some(miso.map_into()),
+            Some(miso.into()),
             None,
-            Some(tx_dma.map_into()),
-            Some(rx_dma.map_into()),
+            Some(tx_dma.into()),
+            Some(rx_dma.into()),
             config,
         )
     }
 
     /// Write data to SPI using DMA.
     pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> {
-        let tx_ch = self.tx_dma.as_mut().unwrap();
+        let tx_ch = self.tx_dma.as_mut().unwrap().reborrow();
         let tx_transfer = unsafe {
             // If we don't assign future to a variable, the data register pointer
             // is held across an await and makes the future non-Send.
@@ -427,14 +419,14 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
     pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
         // Start RX first. Transfer starts when TX starts, if RX
         // is not started yet we might lose bytes.
-        let rx_ch = self.rx_dma.as_mut().unwrap();
+        let rx_ch = self.rx_dma.as_mut().unwrap().reborrow();
         let rx_transfer = unsafe {
             // If we don't assign future to a variable, the data register pointer
             // is held across an await and makes the future non-Send.
             crate::dma::read(rx_ch, self.inner.regs().dr().as_ptr() as *const _, buffer, T::RX_DREQ)
         };
 
-        let tx_ch = self.tx_dma.as_mut().unwrap();
+        let tx_ch = self.tx_dma.as_mut().unwrap().reborrow();
         let tx_transfer = unsafe {
             // If we don't assign future to a variable, the data register pointer
             // is held across an await and makes the future non-Send.
@@ -462,20 +454,20 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
     async fn transfer_inner(&mut self, rx: *mut [u8], tx: *const [u8]) -> Result<(), Error> {
         // Start RX first. Transfer starts when TX starts, if RX
         // is not started yet we might lose bytes.
-        let rx_ch = self.rx_dma.as_mut().unwrap();
+        let rx_ch = self.rx_dma.as_mut().unwrap().reborrow();
         let rx_transfer = unsafe {
             // If we don't assign future to a variable, the data register pointer
             // is held across an await and makes the future non-Send.
             crate::dma::read(rx_ch, self.inner.regs().dr().as_ptr() as *const _, rx, T::RX_DREQ)
         };
 
-        let mut tx_ch = self.tx_dma.as_mut().unwrap();
+        let mut tx_ch = self.tx_dma.as_mut().unwrap().reborrow();
         // If we don't assign future to a variable, the data register pointer
         // is held across an await and makes the future non-Send.
         let tx_transfer = async {
             let p = self.inner.regs();
             unsafe {
-                crate::dma::write(&mut tx_ch, tx, p.dr().as_ptr() as *mut _, T::TX_DREQ).await;
+                crate::dma::write(tx_ch.reborrow(), tx, p.dr().as_ptr() as *mut _, T::TX_DREQ).await;
 
                 if rx.len() > tx.len() {
                     let write_bytes_len = rx.len() - tx.len();
@@ -519,7 +511,7 @@ pub trait Mode: SealedMode {}
 
 /// SPI instance trait.
 #[allow(private_bounds)]
-pub trait Instance: SealedInstance {}
+pub trait Instance: SealedInstance + PeripheralType {}
 
 macro_rules! impl_instance {
     ($type:ident, $irq:ident, $tx_dreq:expr, $rx_dreq:expr) => {
diff --git a/embassy-rp/src/trng.rs b/embassy-rp/src/trng.rs
index 9f2f33c4b..44b1bb996 100644
--- a/embassy-rp/src/trng.rs
+++ b/embassy-rp/src/trng.rs
@@ -5,7 +5,7 @@ use core::marker::PhantomData;
 use core::ops::Not;
 use core::task::Poll;
 
-use embassy_hal_internal::Peripheral;
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 use rand_core::Error;
 
@@ -20,7 +20,7 @@ trait SealedInstance {
 
 /// TRNG peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: SealedInstance {
+pub trait Instance: SealedInstance + PeripheralType {
     /// Interrupt for this peripheral.
     type Interrupt: Interrupt;
 }
@@ -158,11 +158,7 @@ const TRNG_BLOCK_SIZE_BYTES: usize = TRNG_BLOCK_SIZE_BITS / 8;
 
 impl<'d, T: Instance> Trng<'d, T> {
     /// Create a new TRNG driver.
-    pub fn new(
-        _trng: impl Peripheral<P = T> + 'd,
-        _irq: impl Binding<T::Interrupt, InterruptHandler<T>> + 'd,
-        config: Config,
-    ) -> Self {
+    pub fn new(_trng: Peri<'d, T>, _irq: impl Binding<T::Interrupt, InterruptHandler<T>> + 'd, config: Config) -> Self {
         let regs = T::regs();
 
         regs.rng_imr().write(|w| w.set_ehr_valid_int_mask(false));
diff --git a/embassy-rp/src/uart/buffered.rs b/embassy-rp/src/uart/buffered.rs
index 152a432c9..5b5159d22 100644
--- a/embassy-rp/src/uart/buffered.rs
+++ b/embassy-rp/src/uart/buffered.rs
@@ -90,17 +90,15 @@ pub(crate) fn init_buffers<'d, T: Instance + 'd>(
 impl<'d, T: Instance> BufferedUart<'d, T> {
     /// Create a buffered UART instance.
     pub fn new(
-        _uart: impl Peripheral<P = T> + 'd,
+        _uart: Peri<'d, T>,
         irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
-        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
-        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
+        tx: Peri<'d, impl TxPin<T>>,
+        rx: Peri<'d, impl RxPin<T>>,
         tx_buffer: &'d mut [u8],
         rx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        into_ref!(tx, rx);
-
-        super::Uart::<'d, T, Async>::init(Some(tx.map_into()), Some(rx.map_into()), None, None, config);
+        super::Uart::<'d, T, Async>::init(Some(tx.into()), Some(rx.into()), None, None, config);
         init_buffers::<T>(irq, Some(tx_buffer), Some(rx_buffer));
 
         Self {
@@ -111,23 +109,21 @@ impl<'d, T: Instance> BufferedUart<'d, T> {
 
     /// Create a buffered UART instance with flow control.
     pub fn new_with_rtscts(
-        _uart: impl Peripheral<P = T> + 'd,
+        _uart: Peri<'d, T>,
         irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
-        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
-        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
-        rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
-        cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
+        tx: Peri<'d, impl TxPin<T>>,
+        rx: Peri<'d, impl RxPin<T>>,
+        rts: Peri<'d, impl RtsPin<T>>,
+        cts: Peri<'d, impl CtsPin<T>>,
         tx_buffer: &'d mut [u8],
         rx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        into_ref!(tx, rx, cts, rts);
-
         super::Uart::<'d, T, Async>::init(
-            Some(tx.map_into()),
-            Some(rx.map_into()),
-            Some(rts.map_into()),
-            Some(cts.map_into()),
+            Some(tx.into()),
+            Some(rx.into()),
+            Some(rts.into()),
+            Some(cts.into()),
             config,
         );
         init_buffers::<T>(irq, Some(tx_buffer), Some(rx_buffer));
@@ -184,15 +180,13 @@ impl<'d, T: Instance> BufferedUart<'d, T> {
 impl<'d, T: Instance> BufferedUartRx<'d, T> {
     /// Create a new buffered UART RX.
     pub fn new(
-        _uart: impl Peripheral<P = T> + 'd,
+        _uart: Peri<'d, T>,
         irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
-        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
+        rx: Peri<'d, impl RxPin<T>>,
         rx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        into_ref!(rx);
-
-        super::Uart::<'d, T, Async>::init(None, Some(rx.map_into()), None, None, config);
+        super::Uart::<'d, T, Async>::init(None, Some(rx.into()), None, None, config);
         init_buffers::<T>(irq, None, Some(rx_buffer));
 
         Self { phantom: PhantomData }
@@ -200,16 +194,14 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> {
 
     /// Create a new buffered UART RX with flow control.
     pub fn new_with_rts(
-        _uart: impl Peripheral<P = T> + 'd,
+        _uart: Peri<'d, T>,
         irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
-        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
-        rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
+        rx: Peri<'d, impl RxPin<T>>,
+        rts: Peri<'d, impl RtsPin<T>>,
         rx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        into_ref!(rx, rts);
-
-        super::Uart::<'d, T, Async>::init(None, Some(rx.map_into()), Some(rts.map_into()), None, config);
+        super::Uart::<'d, T, Async>::init(None, Some(rx.into()), Some(rts.into()), None, config);
         init_buffers::<T>(irq, None, Some(rx_buffer));
 
         Self { phantom: PhantomData }
@@ -338,15 +330,13 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> {
 impl<'d, T: Instance> BufferedUartTx<'d, T> {
     /// Create a new buffered UART TX.
     pub fn new(
-        _uart: impl Peripheral<P = T> + 'd,
+        _uart: Peri<'d, T>,
         irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
-        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
+        tx: Peri<'d, impl TxPin<T>>,
         tx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        into_ref!(tx);
-
-        super::Uart::<'d, T, Async>::init(Some(tx.map_into()), None, None, None, config);
+        super::Uart::<'d, T, Async>::init(Some(tx.into()), None, None, None, config);
         init_buffers::<T>(irq, Some(tx_buffer), None);
 
         Self { phantom: PhantomData }
@@ -354,16 +344,14 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
 
     /// Create a new buffered UART TX with flow control.
     pub fn new_with_cts(
-        _uart: impl Peripheral<P = T> + 'd,
+        _uart: Peri<'d, T>,
         irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
-        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
-        cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
+        tx: Peri<'d, impl TxPin<T>>,
+        cts: Peri<'d, impl CtsPin<T>>,
         tx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        into_ref!(tx, cts);
-
-        super::Uart::<'d, T, Async>::init(Some(tx.map_into()), None, None, Some(cts.map_into()), config);
+        super::Uart::<'d, T, Async>::init(Some(tx.into()), None, None, Some(cts.into()), config);
         init_buffers::<T>(irq, Some(tx_buffer), None);
 
         Self { phantom: PhantomData }
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs
index 8d12aeef6..90c7655be 100644
--- a/embassy-rp/src/uart/mod.rs
+++ b/embassy-rp/src/uart/mod.rs
@@ -5,7 +5,7 @@ use core::task::Poll;
 
 use atomic_polyfill::{AtomicU16, Ordering};
 use embassy_futures::select::{select, Either};
-use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_hal_internal::{Peri, PeripheralType};
 use embassy_sync::waitqueue::AtomicWaker;
 use embassy_time::{Delay, Timer};
 use pac::uart::regs::Uartris;
@@ -15,7 +15,7 @@ use crate::dma::{AnyChannel, Channel};
 use crate::gpio::{AnyPin, SealedPin};
 use crate::interrupt::typelevel::{Binding, Interrupt};
 use crate::pac::io::vals::{Inover, Outover};
-use crate::{interrupt, pac, peripherals, Peripheral, RegExt};
+use crate::{interrupt, pac, peripherals, RegExt};
 
 mod buffered;
 pub use buffered::{BufferedInterruptHandler, BufferedUart, BufferedUartRx, BufferedUartTx};
@@ -142,30 +142,29 @@ pub struct Uart<'d, T: Instance, M: Mode> {
 
 /// UART TX driver.
 pub struct UartTx<'d, T: Instance, M: Mode> {
-    tx_dma: Option<PeripheralRef<'d, AnyChannel>>,
+    tx_dma: Option<Peri<'d, AnyChannel>>,
     phantom: PhantomData<(&'d mut T, M)>,
 }
 
 /// UART RX driver.
 pub struct UartRx<'d, T: Instance, M: Mode> {
-    rx_dma: Option<PeripheralRef<'d, AnyChannel>>,
+    rx_dma: Option<Peri<'d, AnyChannel>>,
     phantom: PhantomData<(&'d mut T, M)>,
 }
 
 impl<'d, T: Instance, M: Mode> UartTx<'d, T, M> {
     /// Create a new DMA-enabled UART which can only send data
     pub fn new(
-        _uart: impl Peripheral<P = T> + 'd,
-        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
-        tx_dma: impl Peripheral<P = impl Channel> + 'd,
+        _uart: Peri<'d, T>,
+        tx: Peri<'d, impl TxPin<T>>,
+        tx_dma: Peri<'d, impl Channel>,
         config: Config,
     ) -> Self {
-        into_ref!(tx, tx_dma);
-        Uart::<T, M>::init(Some(tx.map_into()), None, None, None, config);
-        Self::new_inner(Some(tx_dma.map_into()))
+        Uart::<T, M>::init(Some(tx.into()), None, None, None, config);
+        Self::new_inner(Some(tx_dma.into()))
     }
 
-    fn new_inner(tx_dma: Option<PeripheralRef<'d, AnyChannel>>) -> Self {
+    fn new_inner(tx_dma: Option<Peri<'d, AnyChannel>>) -> Self {
         Self {
             tx_dma,
             phantom: PhantomData,
@@ -225,13 +224,8 @@ impl<'d, T: Instance, M: Mode> UartTx<'d, T, M> {
 
 impl<'d, T: Instance> UartTx<'d, T, Blocking> {
     /// Create a new UART TX instance for blocking mode operations.
-    pub fn new_blocking(
-        _uart: impl Peripheral<P = T> + 'd,
-        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
-        config: Config,
-    ) -> Self {
-        into_ref!(tx);
-        Uart::<T, Blocking>::init(Some(tx.map_into()), None, None, None, config);
+    pub fn new_blocking(_uart: Peri<'d, T>, tx: Peri<'d, impl TxPin<T>>, config: Config) -> Self {
+        Uart::<T, Blocking>::init(Some(tx.into()), None, None, None, config);
         Self::new_inner(None)
     }
 
@@ -251,7 +245,7 @@ impl<'d, T: Instance> UartTx<'d, T, Blocking> {
 impl<'d, T: Instance> UartTx<'d, T, Async> {
     /// Write to UART TX from the provided buffer using DMA.
     pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> {
-        let ch = self.tx_dma.as_mut().unwrap();
+        let ch = self.tx_dma.as_mut().unwrap().reborrow();
         let transfer = unsafe {
             T::regs().uartdmacr().write_set(|reg| {
                 reg.set_txdmae(true);
@@ -268,18 +262,17 @@ impl<'d, T: Instance> UartTx<'d, T, Async> {
 impl<'d, T: Instance, M: Mode> UartRx<'d, T, M> {
     /// Create a new DMA-enabled UART which can only receive data
     pub fn new(
-        _uart: impl Peripheral<P = T> + 'd,
-        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
+        _uart: Peri<'d, T>,
+        rx: Peri<'d, impl RxPin<T>>,
         _irq: impl Binding<T::Interrupt, InterruptHandler<T>>,
-        rx_dma: impl Peripheral<P = impl Channel> + 'd,
+        rx_dma: Peri<'d, impl Channel>,
         config: Config,
     ) -> Self {
-        into_ref!(rx, rx_dma);
-        Uart::<T, M>::init(None, Some(rx.map_into()), None, None, config);
-        Self::new_inner(true, Some(rx_dma.map_into()))
+        Uart::<T, M>::init(None, Some(rx.into()), None, None, config);
+        Self::new_inner(true, Some(rx_dma.into()))
     }
 
-    fn new_inner(has_irq: bool, rx_dma: Option<PeripheralRef<'d, AnyChannel>>) -> Self {
+    fn new_inner(has_irq: bool, rx_dma: Option<Peri<'d, AnyChannel>>) -> Self {
         debug_assert_eq!(has_irq, rx_dma.is_some());
         if has_irq {
             // disable all error interrupts initially
@@ -346,13 +339,8 @@ impl<'d, T: Instance, M: Mode> Drop for UartRx<'d, T, M> {
 
 impl<'d, T: Instance> UartRx<'d, T, Blocking> {
     /// Create a new UART RX instance for blocking mode operations.
-    pub fn new_blocking(
-        _uart: impl Peripheral<P = T> + 'd,
-        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
-        config: Config,
-    ) -> Self {
-        into_ref!(rx);
-        Uart::<T, Blocking>::init(None, Some(rx.map_into()), None, None, config);
+    pub fn new_blocking(_uart: Peri<'d, T>, rx: Peri<'d, impl RxPin<T>>, config: Config) -> Self {
+        Uart::<T, Blocking>::init(None, Some(rx.into()), None, None, config);
         Self::new_inner(false, None)
     }
 
@@ -419,7 +407,7 @@ impl<'d, T: Instance> UartRx<'d, T, Async> {
         // start a dma transfer. if errors have happened in the interim some error
         // interrupt flags will have been raised, and those will be picked up immediately
         // by the interrupt handler.
-        let ch = self.rx_dma.as_mut().unwrap();
+        let ch = self.rx_dma.as_mut().unwrap().reborrow();
         T::regs().uartimsc().write_set(|w| {
             w.set_oeim(true);
             w.set_beim(true);
@@ -566,7 +554,7 @@ impl<'d, T: Instance> UartRx<'d, T, Async> {
         // start a dma transfer. if errors have happened in the interim some error
         // interrupt flags will have been raised, and those will be picked up immediately
         // by the interrupt handler.
-        let mut ch = self.rx_dma.as_mut().unwrap();
+        let ch = self.rx_dma.as_mut().unwrap();
         T::regs().uartimsc().write_set(|w| {
             w.set_oeim(true);
             w.set_beim(true);
@@ -583,7 +571,7 @@ impl<'d, T: Instance> UartRx<'d, T, Async> {
                 // If we don't assign future to a variable, the data register pointer
                 // is held across an await and makes the future non-Send.
                 crate::dma::read(
-                    &mut ch,
+                    ch.reborrow(),
                     T::regs().uartdr().as_ptr() as *const _,
                     sbuffer,
                     T::RX_DREQ.into(),
@@ -700,41 +688,29 @@ impl<'d, T: Instance> UartRx<'d, T, Async> {
 impl<'d, T: Instance> Uart<'d, T, Blocking> {
     /// Create a new UART without hardware flow control
     pub fn new_blocking(
-        uart: impl Peripheral<P = T> + 'd,
-        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
-        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
+        uart: Peri<'d, T>,
+        tx: Peri<'d, impl TxPin<T>>,
+        rx: Peri<'d, impl RxPin<T>>,
         config: Config,
     ) -> Self {
-        into_ref!(tx, rx);
-        Self::new_inner(
-            uart,
-            tx.map_into(),
-            rx.map_into(),
-            None,
-            None,
-            false,
-            None,
-            None,
-            config,
-        )
+        Self::new_inner(uart, tx.into(), rx.into(), None, None, false, None, None, config)
     }
 
     /// Create a new UART with hardware flow control (RTS/CTS)
     pub fn new_with_rtscts_blocking(
-        uart: impl Peripheral<P = T> + 'd,
-        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
-        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
-        rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
-        cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
+        uart: Peri<'d, T>,
+        tx: Peri<'d, impl TxPin<T>>,
+        rx: Peri<'d, impl RxPin<T>>,
+        rts: Peri<'d, impl RtsPin<T>>,
+        cts: Peri<'d, impl CtsPin<T>>,
         config: Config,
     ) -> Self {
-        into_ref!(tx, rx, cts, rts);
         Self::new_inner(
             uart,
-            tx.map_into(),
-            rx.map_into(),
-            Some(rts.map_into()),
-            Some(cts.map_into()),
+            tx.into(),
+            rx.into(),
+            Some(rts.into()),
+            Some(cts.into()),
             false,
             None,
             None,
@@ -762,50 +738,48 @@ impl<'d, T: Instance> Uart<'d, T, Blocking> {
 impl<'d, T: Instance> Uart<'d, T, Async> {
     /// Create a new DMA enabled UART without hardware flow control
     pub fn new(
-        uart: impl Peripheral<P = T> + 'd,
-        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
-        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
+        uart: Peri<'d, T>,
+        tx: Peri<'d, impl TxPin<T>>,
+        rx: Peri<'d, impl RxPin<T>>,
         _irq: impl Binding<T::Interrupt, InterruptHandler<T>>,
-        tx_dma: impl Peripheral<P = impl Channel> + 'd,
-        rx_dma: impl Peripheral<P = impl Channel> + 'd,
+        tx_dma: Peri<'d, impl Channel>,
+        rx_dma: Peri<'d, impl Channel>,
         config: Config,
     ) -> Self {
-        into_ref!(tx, rx, tx_dma, rx_dma);
         Self::new_inner(
             uart,
-            tx.map_into(),
-            rx.map_into(),
+            tx.into(),
+            rx.into(),
             None,
             None,
             true,
-            Some(tx_dma.map_into()),
-            Some(rx_dma.map_into()),
+            Some(tx_dma.into()),
+            Some(rx_dma.into()),
             config,
         )
     }
 
     /// Create a new DMA enabled UART with hardware flow control (RTS/CTS)
     pub fn new_with_rtscts(
-        uart: impl Peripheral<P = T> + 'd,
-        tx: impl Peripheral<P = impl TxPin<T>> + 'd,
-        rx: impl Peripheral<P = impl RxPin<T>> + 'd,
-        rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
-        cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
+        uart: Peri<'d, T>,
+        tx: Peri<'d, impl TxPin<T>>,
+        rx: Peri<'d, impl RxPin<T>>,
+        rts: Peri<'d, impl RtsPin<T>>,
+        cts: Peri<'d, impl CtsPin<T>>,
         _irq: impl Binding<T::Interrupt, InterruptHandler<T>>,
-        tx_dma: impl Peripheral<P = impl Channel> + 'd,
-        rx_dma: impl Peripheral<P = impl Channel> + 'd,
+        tx_dma: Peri<'d, impl Channel>,
+        rx_dma: Peri<'d, impl Channel>,
         config: Config,
     ) -> Self {
-        into_ref!(tx, rx, cts, rts, tx_dma, rx_dma);
         Self::new_inner(
             uart,
-            tx.map_into(),
-            rx.map_into(),
-            Some(rts.map_into()),
-            Some(cts.map_into()),
+            tx.into(),
+            rx.into(),
+            Some(rts.into()),
+            Some(cts.into()),
             true,
-            Some(tx_dma.map_into()),
-            Some(rx_dma.map_into()),
+            Some(tx_dma.into()),
+            Some(rx_dma.into()),
             config,
         )
     }
@@ -813,14 +787,14 @@ impl<'d, T: Instance> Uart<'d, T, Async> {
 
 impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
     fn new_inner(
-        _uart: impl Peripheral<P = T> + 'd,
-        mut tx: PeripheralRef<'d, AnyPin>,
-        mut rx: PeripheralRef<'d, AnyPin>,
-        mut rts: Option<PeripheralRef<'d, AnyPin>>,
-        mut cts: Option<PeripheralRef<'d, AnyPin>>,
+        _uart: Peri<'d, T>,
+        mut tx: Peri<'d, AnyPin>,
+        mut rx: Peri<'d, AnyPin>,
+        mut rts: Option<Peri<'d, AnyPin>>,
+        mut cts: Option<Peri<'d, AnyPin>>,
         has_irq: bool,
-        tx_dma: Option<PeripheralRef<'d, AnyChannel>>,
-        rx_dma: Option<PeripheralRef<'d, AnyChannel>>,
+        tx_dma: Option<Peri<'d, AnyChannel>>,
+        rx_dma: Option<Peri<'d, AnyChannel>>,
         config: Config,
     ) -> Self {
         Self::init(
@@ -838,10 +812,10 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
     }
 
     fn init(
-        tx: Option<PeripheralRef<'_, AnyPin>>,
-        rx: Option<PeripheralRef<'_, AnyPin>>,
-        rts: Option<PeripheralRef<'_, AnyPin>>,
-        cts: Option<PeripheralRef<'_, AnyPin>>,
+        tx: Option<Peri<'_, AnyPin>>,
+        rx: Option<Peri<'_, AnyPin>>,
+        rts: Option<Peri<'_, AnyPin>>,
+        cts: Option<Peri<'_, AnyPin>>,
         config: Config,
     ) {
         let r = T::regs();
@@ -1326,7 +1300,7 @@ impl_mode!(Async);
 
 /// UART instance.
 #[allow(private_bounds)]
-pub trait Instance: SealedInstance {
+pub trait Instance: SealedInstance + PeripheralType {
     /// Interrupt for this instance.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
diff --git a/embassy-rp/src/usb.rs b/embassy-rp/src/usb.rs
index 26cb90d89..96541ade6 100644
--- a/embassy-rp/src/usb.rs
+++ b/embassy-rp/src/usb.rs
@@ -5,6 +5,7 @@ use core::slice;
 use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::Poll;
 
+use embassy_hal_internal::PeripheralType;
 use embassy_sync::waitqueue::AtomicWaker;
 use embassy_usb_driver as driver;
 use embassy_usb_driver::{
@@ -12,7 +13,7 @@ use embassy_usb_driver::{
 };
 
 use crate::interrupt::typelevel::{Binding, Interrupt};
-use crate::{interrupt, pac, peripherals, Peripheral, RegExt};
+use crate::{interrupt, pac, peripherals, Peri, RegExt};
 
 trait SealedInstance {
     fn regs() -> crate::pac::usb::Usb;
@@ -21,7 +22,7 @@ trait SealedInstance {
 
 /// USB peripheral instance.
 #[allow(private_bounds)]
-pub trait Instance: SealedInstance + 'static {
+pub trait Instance: SealedInstance + PeripheralType + 'static {
     /// Interrupt for this peripheral.
     type Interrupt: interrupt::typelevel::Interrupt;
 }
@@ -107,7 +108,7 @@ pub struct Driver<'d, T: Instance> {
 
 impl<'d, T: Instance> Driver<'d, T> {
     /// Create a new USB driver.
-    pub fn new(_usb: impl Peripheral<P = T> + 'd, _irq: impl Binding<T::Interrupt, InterruptHandler<T>>) -> Self {
+    pub fn new(_usb: Peri<'d, T>, _irq: impl Binding<T::Interrupt, InterruptHandler<T>>) -> Self {
         T::Interrupt::unpend();
         unsafe { T::Interrupt::enable() };
 
diff --git a/embassy-rp/src/watchdog.rs b/embassy-rp/src/watchdog.rs
index 553936602..760d6aac2 100644
--- a/embassy-rp/src/watchdog.rs
+++ b/embassy-rp/src/watchdog.rs
@@ -10,8 +10,8 @@ use core::marker::PhantomData;
 
 use embassy_time::Duration;
 
-use crate::pac;
 use crate::peripherals::WATCHDOG;
+use crate::{pac, Peri};
 
 /// The reason for a system reset from the watchdog.
 #[derive(Debug, Copy, Clone, PartialEq, Eq)]
@@ -30,7 +30,7 @@ pub struct Watchdog {
 
 impl Watchdog {
     /// Create a new `Watchdog`
-    pub fn new(_watchdog: WATCHDOG) -> Self {
+    pub fn new(_watchdog: Peri<'static, WATCHDOG>) -> Self {
         Self {
             phantom: PhantomData,
             load_value: 0,