rp: make QSPI gpio support optional

this will be mostly not useful to anyone since flash is attached to
qspi, and using flash chips that don't use the *entire* qspi interface
will severly slow down the chip. the code overhead is minimal right now,
but if we also fix interrupt support on qspi pins this will
change (adding more code to potentially hot paths, using more memory for
wakers that are never used, and preventing the qspi gpio irq from being
used in software interrupts as RTIC applications may want to do).

2 files changed, 17 insertions, 4 deletions

diff --git a/embassy-rp/Cargo.toml b/embassy-rp/Cargo.toml
index 6310ffb62..564d44ecd 100644
--- a/embassy-rp/Cargo.toml
+++ b/embassy-rp/Cargo.toml
@@ -42,6 +42,10 @@ boot2-ram-memcpy = []
 boot2-w25q080 = []
 boot2-w25x10cl = []
 
+# Allow using QSPI pins as GPIO pins. This is mostly not what you want (because your flash lives there)
+# and would add both code and memory overhead when enabled needlessly.
+qspi-as-gpio = []
+
 # Indicate code is running from RAM.
 # Set this if all code is in RAM, and the cores never access memory-mapped flash memory through XIP.
 # This allows the flash driver to not force pausing execution on both cores when doing flash operations.
diff --git a/embassy-rp/src/gpio.rs b/embassy-rp/src/gpio.rs
index bac126d43..9861429f3 100644
--- a/embassy-rp/src/gpio.rs
+++ b/embassy-rp/src/gpio.rs
@@ -67,6 +67,7 @@ pub enum SlewRate {
 #[derive(Debug, Eq, PartialEq)]
 pub enum Bank {
     Bank0 = 0,
+    #[cfg(feature = "qspi-as-gpio")]
     Qspi = 1,
 }
 
@@ -636,16 +637,17 @@ pub(crate) mod sealed {
 
         #[inline]
         fn _bank(&self) -> Bank {
-            if self.pin_bank() & 0x20 == 0 {
-                Bank::Bank0
-            } else {
-                Bank::Qspi
+            match self.pin_bank() & 0x20 {
+                #[cfg(feature = "qspi-as-gpio")]
+                1 => Bank::Qspi,
+                _ => Bank::Bank0,
             }
         }
 
         fn io(&self) -> pac::io::Io {
             match self._bank() {
                 Bank::Bank0 => crate::pac::IO_BANK0,
+                #[cfg(feature = "qspi-as-gpio")]
                 Bank::Qspi => crate::pac::IO_QSPI,
             }
         }
@@ -657,6 +659,7 @@ pub(crate) mod sealed {
         fn pad_ctrl(&self) -> Reg<pac::pads::regs::GpioCtrl, RW> {
             let block = match self._bank() {
                 Bank::Bank0 => crate::pac::PADS_BANK0,
+                #[cfg(feature = "qspi-as-gpio")]
                 Bank::Qspi => crate::pac::PADS_QSPI,
             };
             block.gpio(self._pin() as _)
@@ -766,11 +769,17 @@ impl_pin!(PIN_27, Bank::Bank0, 27);
 impl_pin!(PIN_28, Bank::Bank0, 28);
 impl_pin!(PIN_29, Bank::Bank0, 29);
 
+#[cfg(feature = "qspi-as-gpio")]
 impl_pin!(PIN_QSPI_SCLK, Bank::Qspi, 0);
+#[cfg(feature = "qspi-as-gpio")]
 impl_pin!(PIN_QSPI_SS, Bank::Qspi, 1);
+#[cfg(feature = "qspi-as-gpio")]
 impl_pin!(PIN_QSPI_SD0, Bank::Qspi, 2);
+#[cfg(feature = "qspi-as-gpio")]
 impl_pin!(PIN_QSPI_SD1, Bank::Qspi, 3);
+#[cfg(feature = "qspi-as-gpio")]
 impl_pin!(PIN_QSPI_SD2, Bank::Qspi, 4);
+#[cfg(feature = "qspi-as-gpio")]
 impl_pin!(PIN_QSPI_SD3, Bank::Qspi, 5);
 
 // ====================