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authorkalkyl <[email protected]>2022-12-24 02:51:06 +0100
committerkalkyl <[email protected]>2022-12-24 02:51:06 +0100
commiteaad0cc1dc09e604d137b3a1bdfd3438ff990621 (patch)
tree0295d9c4853b8ef43be33a1203f0aebb5c978b36 /embassy-rp
parent67a6e5accfce0963060a20418bab04495c5bf50d (diff)
embassy-rp: Add Watchdog
Diffstat (limited to 'embassy-rp')
-rw-r--r--embassy-rp/src/lib.rs3
-rw-r--r--embassy-rp/src/watchdog.rs111
2 files changed, 114 insertions, 0 deletions
diff --git a/embassy-rp/src/lib.rs b/embassy-rp/src/lib.rs
index 0ea97aecf..9e99b2fbb 100644
--- a/embassy-rp/src/lib.rs
+++ b/embassy-rp/src/lib.rs
@@ -36,6 +36,7 @@ pub mod clocks;
36pub mod flash; 36pub mod flash;
37pub mod multicore; 37pub mod multicore;
38mod reset; 38mod reset;
39pub mod watchdog;
39 40
40// Reexports 41// Reexports
41 42
@@ -119,6 +120,8 @@ embassy_hal_common::peripherals! {
119 120
120 PIO0, 121 PIO0,
121 PIO1, 122 PIO1,
123
124 WATCHDOG,
122} 125}
123 126
124#[link_section = ".boot2"] 127#[link_section = ".boot2"]
diff --git a/embassy-rp/src/watchdog.rs b/embassy-rp/src/watchdog.rs
new file mode 100644
index 000000000..01509ff4e
--- /dev/null
+++ b/embassy-rp/src/watchdog.rs
@@ -0,0 +1,111 @@
1//! Watchdog
2//!
3//! The watchdog is a countdown timer that can restart parts of the chip if it reaches zero. This can be used to restart the
4//! processor if software gets stuck in an infinite loop. The programmer must periodically write a value to the watchdog to
5//! stop it from reaching zero.
6//!
7//! Credit: based on `rp-hal` implementation (also licensed Apache+MIT)
8
9use core::marker::PhantomData;
10
11use embassy_time::Duration;
12
13use crate::pac;
14use crate::peripherals::WATCHDOG;
15
16/// Watchdog peripheral
17pub struct Watchdog<'d> {
18 phantom: PhantomData<&'d WATCHDOG>,
19 load_value: u32, // decremented by 2 per tick (µs)
20}
21
22impl<'d> Watchdog<'d> {
23 /// Create a new `Watchdog`
24 pub fn new(_watchdog: WATCHDOG) -> Self {
25 Self {
26 phantom: PhantomData,
27 load_value: 0,
28 }
29 }
30
31 /// Start tick generation on clk_tick which is driven from clk_ref.
32 ///
33 /// # Arguments
34 ///
35 /// * `cycles` - Total number of tick cycles before the next tick is generated.
36 /// It is expected to be the frequency in MHz of clk_ref.
37 pub fn enable_tick_generation(&mut self, cycles: u8) {
38 const WATCHDOG_TICK_ENABLE_BITS: u32 = 0x200;
39 unsafe {
40 let watchdog = pac::WATCHDOG;
41 watchdog
42 .tick()
43 .write_value(pac::watchdog::regs::Tick(WATCHDOG_TICK_ENABLE_BITS | cycles as u32))
44 }
45 }
46
47 /// Defines whether or not the watchdog timer should be paused when processor(s) are in debug mode
48 /// or when JTAG is accessing bus fabric
49 pub fn pause_on_debug(&mut self, pause: bool) {
50 unsafe {
51 let watchdog = pac::WATCHDOG;
52 watchdog.ctrl().write(|w| {
53 w.set_pause_dbg0(pause);
54 w.set_pause_dbg1(pause);
55 w.set_pause_jtag(pause);
56 })
57 }
58 }
59
60 fn load_counter(&self, counter: u32) {
61 unsafe {
62 let watchdog = pac::WATCHDOG;
63 watchdog.load().write_value(pac::watchdog::regs::Load(counter));
64 }
65 }
66
67 fn enable(&self, bit: bool) {
68 unsafe {
69 let watchdog = pac::WATCHDOG;
70 watchdog.ctrl().write(|w| w.set_enable(bit))
71 }
72 }
73
74 // Configure which hardware will be reset by the watchdog
75 // (everything except ROSC, XOSC)
76 unsafe fn configure_wdog_reset_triggers(&self) {
77 let psm = pac::PSM;
78 psm.wdsel().write_value(pac::psm::regs::Wdsel(
79 0x0001ffff & !(0x01 << 0usize) & !(0x01 << 1usize),
80 ));
81 }
82
83 /// Feed the watchdog timer
84 pub fn feed(&mut self) {
85 self.load_counter(self.load_value)
86 }
87
88 /// Start the watchdog timer
89 pub fn start(&mut self, period: Duration) {
90 const MAX_PERIOD: u32 = 0xFFFFFF;
91
92 let delay_us = period.as_micros() as u32;
93 if delay_us > MAX_PERIOD / 2 {
94 panic!(
95 "Period cannot exceed maximum load value of {} ({} microseconds))",
96 MAX_PERIOD,
97 MAX_PERIOD / 2
98 );
99 }
100 // Due to a logic error, the watchdog decrements by 2 and
101 // the load value must be compensated; see RP2040-E1
102 self.load_value = delay_us * 2;
103
104 self.enable(false);
105 unsafe {
106 self.configure_wdog_reset_triggers();
107 }
108 self.load_counter(self.load_value);
109 self.enable(true);
110 }
111}