diff options
| author | goueslati <[email protected]> | 2023-06-12 14:44:30 +0100 |
|---|---|---|
| committer | goueslati <[email protected]> | 2023-06-12 14:44:30 +0100 |
| commit | a1b27783a645673500833d13bbabb21d4e4202df (patch) | |
| tree | c97a00a76e54ae70893797f73ec57e3a5e26776a /embassy-stm32-wpan/src/lib.rs | |
| parent | cf83f6820cf2c6ece607cd60cfdab9d5e47efd04 (diff) | |
fix build
Diffstat (limited to 'embassy-stm32-wpan/src/lib.rs')
| -rw-r--r-- | embassy-stm32-wpan/src/lib.rs | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/embassy-stm32-wpan/src/lib.rs b/embassy-stm32-wpan/src/lib.rs index b3206428e..c37b67dc4 100644 --- a/embassy-stm32-wpan/src/lib.rs +++ b/embassy-stm32-wpan/src/lib.rs | |||
| @@ -6,10 +6,10 @@ pub mod fmt; | |||
| 6 | use core::mem::MaybeUninit; | 6 | use core::mem::MaybeUninit; |
| 7 | 7 | ||
| 8 | use cmd::CmdPacket; | 8 | use cmd::CmdPacket; |
| 9 | use embassy_cortex_m::interrupt::Interrupt; | ||
| 10 | use embassy_futures::block_on; | 9 | use embassy_futures::block_on; |
| 11 | use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; | 10 | use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; |
| 12 | use embassy_stm32::interrupt; | 11 | use embassy_stm32::interrupt; |
| 12 | use embassy_stm32::interrupt::typelevel::Interrupt; | ||
| 13 | use embassy_stm32::ipcc::{Config, Ipcc}; | 13 | use embassy_stm32::ipcc::{Config, Ipcc}; |
| 14 | use embassy_stm32::peripherals::IPCC; | 14 | use embassy_stm32::peripherals::IPCC; |
| 15 | use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; | 15 | use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; |
| @@ -37,7 +37,7 @@ pub mod unsafe_linked_list; | |||
| 37 | /// Interrupt handler. | 37 | /// Interrupt handler. |
| 38 | pub struct ReceiveInterruptHandler {} | 38 | pub struct ReceiveInterruptHandler {} |
| 39 | 39 | ||
| 40 | impl interrupt::Handler<interrupt::IPCC_C1_RX> for ReceiveInterruptHandler { | 40 | impl interrupt::typelevel::Handler<interrupt::typelevel::IPCC_C1_RX> for ReceiveInterruptHandler { |
| 41 | unsafe fn on_interrupt() { | 41 | unsafe fn on_interrupt() { |
| 42 | if Ipcc::is_rx_pending(channels::cpu2::IPCC_SYSTEM_EVENT_CHANNEL) { | 42 | if Ipcc::is_rx_pending(channels::cpu2::IPCC_SYSTEM_EVENT_CHANNEL) { |
| 43 | debug!("RX SYS evt"); | 43 | debug!("RX SYS evt"); |
| @@ -53,7 +53,7 @@ impl interrupt::Handler<interrupt::IPCC_C1_RX> for ReceiveInterruptHandler { | |||
| 53 | 53 | ||
| 54 | pub struct TransmitInterruptHandler {} | 54 | pub struct TransmitInterruptHandler {} |
| 55 | 55 | ||
| 56 | impl interrupt::Handler<interrupt::IPCC_C1_TX> for TransmitInterruptHandler { | 56 | impl interrupt::typelevel::Handler<interrupt::typelevel::IPCC_C1_TX> for TransmitInterruptHandler { |
| 57 | unsafe fn on_interrupt() { | 57 | unsafe fn on_interrupt() { |
| 58 | if Ipcc::is_tx_pending(channels::cpu1::IPCC_SYSTEM_CMD_RSP_CHANNEL) { | 58 | if Ipcc::is_tx_pending(channels::cpu1::IPCC_SYSTEM_CMD_RSP_CHANNEL) { |
| 59 | debug!("TX SYS cmd rsp"); | 59 | debug!("TX SYS cmd rsp"); |
| @@ -182,8 +182,8 @@ pub struct TlMbox<'d> { | |||
| 182 | impl<'d> TlMbox<'d> { | 182 | impl<'d> TlMbox<'d> { |
| 183 | pub fn init( | 183 | pub fn init( |
| 184 | ipcc: impl Peripheral<P = IPCC> + 'd, | 184 | ipcc: impl Peripheral<P = IPCC> + 'd, |
| 185 | _irqs: impl interrupt::Binding<interrupt::IPCC_C1_RX, ReceiveInterruptHandler> | 185 | _irqs: impl interrupt::typelevel::Binding<interrupt::typelevel::IPCC_C1_RX, ReceiveInterruptHandler> |
| 186 | + interrupt::Binding<interrupt::IPCC_C1_TX, TransmitInterruptHandler>, | 186 | + interrupt::typelevel::Binding<interrupt::typelevel::IPCC_C1_TX, TransmitInterruptHandler>, |
| 187 | config: Config, | 187 | config: Config, |
| 188 | ) -> Self { | 188 | ) -> Self { |
| 189 | into_ref!(ipcc); | 189 | into_ref!(ipcc); |
| @@ -223,11 +223,11 @@ impl<'d> TlMbox<'d> { | |||
| 223 | mm::MemoryManager::enable(); | 223 | mm::MemoryManager::enable(); |
| 224 | 224 | ||
| 225 | // enable interrupts | 225 | // enable interrupts |
| 226 | interrupt::IPCC_C1_RX::unpend(); | 226 | interrupt::typelevel::IPCC_C1_RX::unpend(); |
| 227 | interrupt::IPCC_C1_TX::unpend(); | 227 | interrupt::typelevel::IPCC_C1_TX::unpend(); |
| 228 | 228 | ||
| 229 | unsafe { interrupt::IPCC_C1_RX::enable() }; | 229 | unsafe { interrupt::typelevel::IPCC_C1_RX::enable() }; |
| 230 | unsafe { interrupt::IPCC_C1_TX::enable() }; | 230 | unsafe { interrupt::typelevel::IPCC_C1_TX::enable() }; |
| 231 | 231 | ||
| 232 | STATE.reset(); | 232 | STATE.reset(); |
| 233 | 233 | ||
