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authorxoviat <[email protected]>2025-12-06 10:32:51 -0600
committerxoviat <[email protected]>2025-12-06 10:32:51 -0600
commit92f814962bbef71ef2f541f0d4dade54e6c58b11 (patch)
tree6e26c0b7f99aedaf5f432d6f6f2c634e4d8c53a4 /embassy-stm32-wpan
parentd136c8e2ff3ef3360f3e56055bcfba5b221e38fa (diff)
wpan: add libraries for wba
Diffstat (limited to 'embassy-stm32-wpan')
-rw-r--r--embassy-stm32-wpan/Cargo.toml6
-rw-r--r--embassy-stm32-wpan/src/wba/bindings.rs1
-rw-r--r--embassy-stm32-wpan/src/wba/linklayer_plat.rs645
-rw-r--r--embassy-stm32-wpan/src/wba/ll_sys/ll_sys_cs.rs77
-rw-r--r--embassy-stm32-wpan/src/wba/ll_sys/ll_sys_dp_slp.rs163
-rw-r--r--embassy-stm32-wpan/src/wba/ll_sys/ll_sys_intf.rs199
-rw-r--r--embassy-stm32-wpan/src/wba/ll_sys/ll_sys_startup.rs125
-rw-r--r--embassy-stm32-wpan/src/wba/ll_sys/ll_version.rs115
-rw-r--r--embassy-stm32-wpan/src/wba/ll_sys/mod.rs5
-rw-r--r--embassy-stm32-wpan/src/wba/ll_sys_if.rs335
-rw-r--r--embassy-stm32-wpan/src/wba/mac_sys_if.rs186
-rw-r--r--embassy-stm32-wpan/src/wba/mod.rs7
12 files changed, 1859 insertions, 5 deletions
diff --git a/embassy-stm32-wpan/Cargo.toml b/embassy-stm32-wpan/Cargo.toml
index 3d587d0be..7e562f5cc 100644
--- a/embassy-stm32-wpan/Cargo.toml
+++ b/embassy-stm32-wpan/Cargo.toml
@@ -34,7 +34,7 @@ embassy-hal-internal = { version = "0.3.0", path = "../embassy-hal-internal" }
34embassy-embedded-hal = { version = "0.5.0", path = "../embassy-embedded-hal" } 34embassy-embedded-hal = { version = "0.5.0", path = "../embassy-embedded-hal" }
35embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver", optional=true } 35embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver", optional=true }
36smoltcp = { version = "0.12.0", optional=true, default-features = false } 36smoltcp = { version = "0.12.0", optional=true, default-features = false }
37stm32-bindings = { version = "0.1.1", optional=true, default-features = false } 37stm32-bindings = { version = "0.1.3", optional=true, default-features = false }
38 38
39defmt = { version = "1.0.1", optional = true } 39defmt = { version = "1.0.1", optional = true }
40log = { version = "0.4.17", optional = true } 40log = { version = "0.4.17", optional = true }
@@ -58,8 +58,8 @@ wb55_ble = ["dep:stm32wb-hci"]
58wb55_mac = ["dep:bitflags", "dep:embassy-net-driver", "dep:smoltcp", "smoltcp/medium-ieee802154"] 58wb55_mac = ["dep:bitflags", "dep:embassy-net-driver", "dep:smoltcp", "smoltcp/medium-ieee802154"]
59 59
60wba = [ "dep:stm32-bindings" ] 60wba = [ "dep:stm32-bindings" ]
61wba_ble = [ "stm32-bindings/wba_wpan_mac" ] 61wba_ble = [ "stm32-bindings/wba_wpan_mac" , "stm32-bindings/wba_wpan" ]
62wba_mac = [ "stm32-bindings/wba_wpan_ble" ] 62wba_mac = [ "stm32-bindings/wba_wpan_ble" , "stm32-bindings/lib_wba5_linklayer15_4", "stm32-bindings/lib_wba_mac_lib" , "stm32-bindings/wba_wpan" ]
63 63
64extended = [] 64extended = []
65 65
diff --git a/embassy-stm32-wpan/src/wba/bindings.rs b/embassy-stm32-wpan/src/wba/bindings.rs
new file mode 100644
index 000000000..d2030cfb8
--- /dev/null
+++ b/embassy-stm32-wpan/src/wba/bindings.rs
@@ -0,0 +1 @@
pub use stm32_bindings::bindings::{mac, wba_ble_stack as ble, wba_link_layer as link_layer};
diff --git a/embassy-stm32-wpan/src/wba/linklayer_plat.rs b/embassy-stm32-wpan/src/wba/linklayer_plat.rs
new file mode 100644
index 000000000..c011b3bcb
--- /dev/null
+++ b/embassy-stm32-wpan/src/wba/linklayer_plat.rs
@@ -0,0 +1,645 @@
1#[allow(dead_code)]
2fn test_fn() {}
3
4// /* USER CODE BEGIN Header */
5// /**
6// ******************************************************************************
7// * @file linklayer_plat.c
8// * @author MCD Application Team
9// * @brief Source file for the linklayer plateform adaptation layer
10// ******************************************************************************
11// * @attention
12// *
13// * Copyright (c) 2024 STMicroelectronics.
14// * All rights reserved.
15// *
16// * This software is licensed under terms that can be found in the LICENSE file
17// * in the root directory of this software component.
18// * If no LICENSE file comes with this software, it is provided AS-IS.
19// *
20// ******************************************************************************
21// */
22// /* USER CODE END Header */
23//
24// #include "stm32wbaxx_hal.h"
25// #include "stm32wbaxx_hal_conf.h"
26// #include "stm32wbaxx_ll_rcc.h"
27//
28// #include "app_common.h"
29// #include "app_conf.h"
30// #include "linklayer_plat.h"
31// #include "scm.h"
32// #include "log_module.h"
33// #if (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1)
34// #include "adc_ctrl.h"
35// #endif /* (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1) */
36//
37// #if (CFG_LPM_LEVEL != 0)
38// #include "stm32_lpm.h"
39// #include "stm32_lpm_if.h"
40// #endif /* (CFG_LPM_LEVEL != 0) */
41//
42// /* USER CODE BEGIN Includes */
43//
44// /* USER CODE END Includes */
45//
46// #define max(a,b) ((a) > (b) ? a : b)
47//
48// /* 2.4GHz RADIO ISR callbacks */
49// void (*radio_callback)(void) = NULL;
50// void (*low_isr_callback)(void) = NULL;
51//
52// /* RNG handle */
53// extern RNG_HandleTypeDef hrng;
54//
55// #if (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1)
56// /* Link Layer temperature request from background */
57// extern void ll_sys_bg_temperature_measurement(void);
58// #endif /* (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1) */
59//
60// /* Radio critical sections */
61// static uint32_t primask_bit = 0;
62// volatile int32_t prio_high_isr_counter = 0;
63// volatile int32_t prio_low_isr_counter = 0;
64// volatile int32_t prio_sys_isr_counter = 0;
65// volatile int32_t irq_counter = 0;
66// volatile uint32_t local_basepri_value = 0;
67//
68// /* Radio SW low ISR global variable */
69// volatile uint8_t radio_sw_low_isr_is_running_high_prio = 0;
70//
71// /* Radio bus clock control variables */
72// uint8_t AHB5_SwitchedOff = 0;
73// uint32_t radio_sleep_timer_val = 0;
74//
75// /**
76// * @brief Configure the necessary clock sources for the radio.
77// * @param None
78// * @retval None
79// */
80// void LINKLAYER_PLAT_ClockInit()
81// {
82// uint32_t linklayer_slp_clk_src = LL_RCC_RADIOSLEEPSOURCE_NONE;
83//
84// /* Get the Link Layer sleep timer clock source */
85// linklayer_slp_clk_src = LL_RCC_RADIO_GetSleepTimerClockSource();
86// if(linklayer_slp_clk_src == LL_RCC_RADIOSLEEPSOURCE_NONE)
87// {
88// /* If there is no clock source defined, should be selected before */
89// assert_param(0);
90// }
91//
92// /* Enable AHB5ENR peripheral clock (bus CLK) */
93// __HAL_RCC_RADIO_CLK_ENABLE();
94// }
95//
96// /**
97// * @brief Link Layer active waiting loop.
98// * @param delay: delay in us
99// * @retval None
100// */
101// void LINKLAYER_PLAT_DelayUs(uint32_t delay)
102// {
103// static uint8_t lock = 0;
104// uint32_t t0;
105// uint32_t primask_bit;
106//
107// /* Enter critical section */
108// primask_bit= __get_PRIMASK();
109// __disable_irq();
110//
111// if (lock == 0U)
112// {
113// /* Initialize counter */
114// /* Reset cycle counter to prevent overflow
115// As a us counter, it is assumed than even with re-entrancy,
116// overflow will never happen before re-initializing this counter */
117// DWT->CYCCNT = 0U;
118// /* Enable DWT by safety but should be useless (as already set) */
119// SET_BIT(DCB->DEMCR, DCB_DEMCR_TRCENA_Msk);
120// /* Enable counter */
121// SET_BIT(DWT->CTRL, DWT_CTRL_CYCCNTENA_Msk);
122// }
123// /* Increment 're-entrance' counter */
124// lock++;
125// /* Get starting time stamp */
126// t0 = DWT->CYCCNT;
127// /* Exit critical section */
128// __set_PRIMASK(primask_bit);
129//
130// /* Turn us into cycles */
131// delay = delay * (SystemCoreClock / 1000000U);
132// delay += t0;
133//
134// /* Busy waiting loop */
135// while (DWT->CYCCNT < delay)
136// {
137// };
138//
139// /* Enter critical section */
140// primask_bit= __get_PRIMASK();
141// __disable_irq();
142// if (lock == 1U)
143// {
144// /* Disable counter */
145// CLEAR_BIT(DWT->CTRL, DWT_CTRL_CYCCNTENA_Msk);
146// }
147// /* Decrement 're-entrance' counter */
148// lock--;
149// /* Exit critical section */
150// __set_PRIMASK(primask_bit);
151//
152// }
153//
154// /**
155// * @brief Link Layer assertion API
156// * @param condition: conditional statement to be checked.
157// * @retval None
158// */
159// void LINKLAYER_PLAT_Assert(uint8_t condition)
160// {
161// assert_param(condition);
162// }
163//
164// /**
165// * @brief Enable/disable the Link Layer active clock (baseband clock).
166// * @param enable: boolean value to enable (1) or disable (0) the clock.
167// * @retval None
168// */
169// void LINKLAYER_PLAT_WaitHclkRdy(void)
170// {
171// /* Wait on radio bus clock readiness if it has been turned of */
172// if (AHB5_SwitchedOff == 1)
173// {
174// AHB5_SwitchedOff = 0;
175// while (radio_sleep_timer_val == ll_intf_cmn_get_slptmr_value());
176// }
177// }
178//
179// /**
180// * @brief Notify the Link Layer platform layer the system will enter in WFI
181// * and AHB5 clock may be turned of regarding the 2.4Ghz radio state.
182// * @param None
183// * @retval None
184// */
185// void LINKLAYER_PLAT_NotifyWFIEnter(void)
186// {
187// /* Check if Radio state will allow the AHB5 clock to be cut */
188//
189// /* AHB5 clock will be cut in the following cases:
190// * - 2.4GHz radio is not in ACTIVE mode (in SLEEP or DEEPSLEEP mode).
191// * - RADIOSMEN and STRADIOCLKON bits are at 0.
192// */
193// if((LL_PWR_GetRadioMode() != LL_PWR_RADIO_ACTIVE_MODE) ||
194// ((__HAL_RCC_RADIO_IS_CLK_SLEEP_ENABLED() == 0) && (LL_RCC_RADIO_IsEnabledSleepTimerClock() == 0)))
195// {
196// AHB5_SwitchedOff = 1;
197// }
198// }
199//
200// /**
201// * @brief Notify the Link Layer platform layer the system exited WFI and AHB5
202// * clock may be resynchronized as is may have been turned of during
203// * low power mode entry.
204// * @param None
205// * @retval None
206// */
207// void LINKLAYER_PLAT_NotifyWFIExit(void)
208// {
209// /* Check if AHB5 clock has been turned of and needs resynchronisation */
210// if (AHB5_SwitchedOff)
211// {
212// /* Read sleep register as earlier as possible */
213// radio_sleep_timer_val = ll_intf_cmn_get_slptmr_value();
214// }
215// }
216//
217// /**
218// * @brief Active wait on bus clock readiness.
219// * @param None
220// * @retval None
221// */
222// void LINKLAYER_PLAT_AclkCtrl(uint8_t enable)
223// {
224// if(enable != 0u)
225// {
226// #if (CFG_SCM_SUPPORTED == 1)
227// /* SCM HSE BEGIN */
228// /* Polling on HSE32 activation */
229// SCM_HSE_WaitUntilReady();
230// /* Enable RADIO baseband clock (active CLK) */
231// HAL_RCCEx_EnableRadioBBClock();
232// /* SCM HSE END */
233// #else
234// /* Enable RADIO baseband clock (active CLK) */
235// HAL_RCCEx_EnableRadioBBClock();
236// /* Polling on HSE32 activation */
237// while ( LL_RCC_HSE_IsReady() == 0);
238// #endif /* CFG_SCM_SUPPORTED */
239// }
240// else
241// {
242// /* Disable RADIO baseband clock (active CLK) */
243// HAL_RCCEx_DisableRadioBBClock();
244// }
245// }
246//
247// /**
248// * @brief Link Layer RNG request.
249// * @param ptr_rnd: pointer to the variable that hosts the number.
250// * @param len: number of byte of anthropy to get.
251// * @retval None
252// */
253// void LINKLAYER_PLAT_GetRNG(uint8_t *ptr_rnd, uint32_t len)
254// {
255// uint32_t nb_remaining_rng = len;
256// uint32_t generated_rng;
257//
258// /* Get the requested RNGs (4 bytes by 4bytes) */
259// while(nb_remaining_rng >= 4)
260// {
261// generated_rng = 0;
262// HW_RNG_Get(1, &generated_rng);
263// memcpy((ptr_rnd+(len-nb_remaining_rng)), &generated_rng, 4);
264// nb_remaining_rng -=4;
265// }
266//
267// /* Get the remaining number of RNGs */
268// if(nb_remaining_rng>0){
269// generated_rng = 0;
270// HW_RNG_Get(1, &generated_rng);
271// memcpy((ptr_rnd+(len-nb_remaining_rng)), &generated_rng, nb_remaining_rng);
272// }
273// }
274//
275// /**
276// * @brief Initialize Link Layer radio high priority interrupt.
277// * @param intr_cb: function pointer to assign for the radio high priority ISR routine.
278// * @retval None
279// */
280// void LINKLAYER_PLAT_SetupRadioIT(void (*intr_cb)())
281// {
282// radio_callback = intr_cb;
283// HAL_NVIC_SetPriority((IRQn_Type) RADIO_INTR_NUM, RADIO_INTR_PRIO_HIGH, 0);
284// HAL_NVIC_EnableIRQ((IRQn_Type) RADIO_INTR_NUM);
285// }
286//
287// /**
288// * @brief Initialize Link Layer SW low priority interrupt.
289// * @param intr_cb: function pointer to assign for the SW low priority ISR routine.
290// * @retval None
291// */
292// void LINKLAYER_PLAT_SetupSwLowIT(void (*intr_cb)())
293// {
294// low_isr_callback = intr_cb;
295//
296// HAL_NVIC_SetPriority((IRQn_Type) RADIO_SW_LOW_INTR_NUM, RADIO_SW_LOW_INTR_PRIO, 0);
297// HAL_NVIC_EnableIRQ((IRQn_Type) RADIO_SW_LOW_INTR_NUM);
298// }
299//
300// /**
301// * @brief Trigger the link layer SW low interrupt.
302// * @param None
303// * @retval None
304// */
305// void LINKLAYER_PLAT_TriggerSwLowIT(uint8_t priority)
306// {
307// uint8_t low_isr_priority = RADIO_INTR_PRIO_LOW;
308//
309// /* Check if a SW low interrupt as already been raised.
310// * Nested call far radio low isr are not supported
311// **/
312//
313// if(NVIC_GetActive(RADIO_SW_LOW_INTR_NUM) == 0)
314// {
315// /* No nested SW low ISR, default behavior */
316//
317// if(priority == 0)
318// {
319// low_isr_priority = RADIO_SW_LOW_INTR_PRIO;
320// }
321//
322// HAL_NVIC_SetPriority((IRQn_Type) RADIO_SW_LOW_INTR_NUM, low_isr_priority, 0);
323// }
324// else
325// {
326// /* Nested call detected */
327// /* No change for SW radio low interrupt priority for the moment */
328//
329// if(priority != 0)
330// {
331// /* At the end of current SW radio low ISR, this pending SW low interrupt
332// * will run with RADIO_INTR_PRIO_LOW priority
333// **/
334// radio_sw_low_isr_is_running_high_prio = 1;
335// }
336// }
337//
338// HAL_NVIC_SetPendingIRQ((IRQn_Type) RADIO_SW_LOW_INTR_NUM);
339// }
340//
341// /**
342// * @brief Enable interrupts.
343// * @param None
344// * @retval None
345// */
346// void LINKLAYER_PLAT_EnableIRQ(void)
347// {
348// irq_counter = max(0,irq_counter-1);
349//
350// if(irq_counter == 0)
351// {
352// /* When irq_counter reaches 0, restore primask bit */
353// __set_PRIMASK(primask_bit);
354// }
355// }
356//
357// /**
358// * @brief Disable interrupts.
359// * @param None
360// * @retval None
361// */
362// void LINKLAYER_PLAT_DisableIRQ(void)
363// {
364// if(irq_counter == 0)
365// {
366// /* Save primask bit at first interrupt disablement */
367// primask_bit= __get_PRIMASK();
368// }
369// __disable_irq();
370// irq_counter ++;
371// }
372//
373// /**
374// * @brief Enable specific interrupt group.
375// * @param isr_type: mask for interrupt group to enable.
376// * This parameter can be one of the following:
377// * @arg LL_HIGH_ISR_ONLY: enable link layer high priority ISR.
378// * @arg LL_LOW_ISR_ONLY: enable link layer SW low priority ISR.
379// * @arg SYS_LOW_ISR: mask interrupts for all the other system ISR with
380// * lower priority that link layer SW low interrupt.
381// * @retval None
382// */
383// void LINKLAYER_PLAT_EnableSpecificIRQ(uint8_t isr_type)
384// {
385// if( (isr_type & LL_HIGH_ISR_ONLY) != 0 )
386// {
387// prio_high_isr_counter--;
388// if(prio_high_isr_counter == 0)
389// {
390// /* When specific counter for link layer high ISR reaches 0, interrupt is enabled */
391// HAL_NVIC_EnableIRQ(RADIO_INTR_NUM);
392// /* USER CODE BEGIN LINKLAYER_PLAT_EnableSpecificIRQ_1 */
393//
394// /* USER CODE END LINKLAYER_PLAT_EnableSpecificIRQ_1 */
395// }
396// }
397//
398// if( (isr_type & LL_LOW_ISR_ONLY) != 0 )
399// {
400// prio_low_isr_counter--;
401// if(prio_low_isr_counter == 0)
402// {
403// /* When specific counter for link layer SW low ISR reaches 0, interrupt is enabled */
404// HAL_NVIC_EnableIRQ(RADIO_SW_LOW_INTR_NUM);
405// }
406//
407// }
408//
409// if( (isr_type & SYS_LOW_ISR) != 0 )
410// {
411// prio_sys_isr_counter--;
412// if(prio_sys_isr_counter == 0)
413// {
414// /* Restore basepri value */
415// __set_BASEPRI(local_basepri_value);
416// }
417// }
418// }
419//
420// /**
421// * @brief Disable specific interrupt group.
422// * @param isr_type: mask for interrupt group to disable.
423// * This parameter can be one of the following:
424// * @arg LL_HIGH_ISR_ONLY: disable link layer high priority ISR.
425// * @arg LL_LOW_ISR_ONLY: disable link layer SW low priority ISR.
426// * @arg SYS_LOW_ISR: unmask interrupts for all the other system ISR with
427// * lower priority that link layer SW low interrupt.
428// * @retval None
429// */
430// void LINKLAYER_PLAT_DisableSpecificIRQ(uint8_t isr_type)
431// {
432// if( (isr_type & LL_HIGH_ISR_ONLY) != 0 )
433// {
434// prio_high_isr_counter++;
435// if(prio_high_isr_counter == 1)
436// {
437// /* USER CODE BEGIN LINKLAYER_PLAT_DisableSpecificIRQ_1 */
438//
439// /* USER CODE END LINKLAYER_PLAT_DisableSpecificIRQ_1 */
440// /* When specific counter for link layer high ISR value is 1, interrupt is disabled */
441// HAL_NVIC_DisableIRQ(RADIO_INTR_NUM);
442// }
443// }
444//
445// if( (isr_type & LL_LOW_ISR_ONLY) != 0 )
446// {
447// prio_low_isr_counter++;
448// if(prio_low_isr_counter == 1)
449// {
450// /* When specific counter for link layer SW low ISR value is 1, interrupt is disabled */
451// HAL_NVIC_DisableIRQ(RADIO_SW_LOW_INTR_NUM);
452// }
453// }
454//
455// if( (isr_type & SYS_LOW_ISR) != 0 )
456// {
457// prio_sys_isr_counter++;
458// if(prio_sys_isr_counter == 1)
459// {
460// /* Save basepri register value */
461// local_basepri_value = __get_BASEPRI();
462//
463// /* Mask all other interrupts with lower priority that link layer SW low ISR */
464// __set_BASEPRI_MAX(RADIO_INTR_PRIO_LOW<<4);
465// }
466// }
467// }
468//
469// /**
470// * @brief Enable link layer high priority ISR only.
471// * @param None
472// * @retval None
473// */
474// void LINKLAYER_PLAT_EnableRadioIT(void)
475// {
476// /* USER CODE BEGIN LINKLAYER_PLAT_EnableRadioIT_1 */
477//
478// /* USER CODE END LINKLAYER_PLAT_EnableRadioIT_1 */
479//
480// HAL_NVIC_EnableIRQ((IRQn_Type) RADIO_INTR_NUM);
481//
482// /* USER CODE BEGIN LINKLAYER_PLAT_EnableRadioIT_2 */
483//
484// /* USER CODE END LINKLAYER_PLAT_EnableRadioIT_2 */
485// }
486//
487// /**
488// * @brief Disable link layer high priority ISR only.
489// * @param None
490// * @retval None
491// */
492// void LINKLAYER_PLAT_DisableRadioIT(void)
493// {
494// /* USER CODE BEGIN LINKLAYER_PLAT_DisableRadioIT_1 */
495//
496// /* USER CODE END LINKLAYER_PLAT_DisableRadioIT_1 */
497//
498// HAL_NVIC_DisableIRQ((IRQn_Type) RADIO_INTR_NUM);
499//
500// /* USER CODE BEGIN LINKLAYER_PLAT_DisableRadioIT_2 */
501//
502// /* USER CODE END LINKLAYER_PLAT_DisableRadioIT_2 */
503// }
504//
505// /**
506// * @brief Link Layer notification for radio activity start.
507// * @param None
508// * @retval None
509// */
510// void LINKLAYER_PLAT_StartRadioEvt(void)
511// {
512// __HAL_RCC_RADIO_CLK_SLEEP_ENABLE();
513// NVIC_SetPriority(RADIO_INTR_NUM, RADIO_INTR_PRIO_HIGH);
514// #if (CFG_SCM_SUPPORTED == 1)
515// scm_notifyradiostate(SCM_RADIO_ACTIVE);
516// #endif /* CFG_SCM_SUPPORTED */
517// }
518//
519// /**
520// * @brief Link Layer notification for radio activity end.
521// * @param None
522// * @retval None
523// */
524// void LINKLAYER_PLAT_StopRadioEvt(void)
525// {
526// __HAL_RCC_RADIO_CLK_SLEEP_DISABLE();
527// NVIC_SetPriority(RADIO_INTR_NUM, RADIO_INTR_PRIO_LOW);
528// #if (CFG_SCM_SUPPORTED == 1)
529// scm_notifyradiostate(SCM_RADIO_NOT_ACTIVE);
530// #endif /* CFG_SCM_SUPPORTED */
531// }
532//
533// /**
534// * @brief Link Layer notification for RCO calibration start.
535// * @param None
536// * @retval None
537// */
538// void LINKLAYER_PLAT_RCOStartClbr(void)
539// {
540// #if (CFG_LPM_LEVEL != 0)
541// PWR_DisableSleepMode();
542// /* Disabling stop mode prevents also from entering in standby */
543// UTIL_LPM_SetStopMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_DISABLE);
544// #endif /* (CFG_LPM_LEVEL != 0) */
545// #if (CFG_SCM_SUPPORTED == 1)
546// scm_setsystemclock(SCM_USER_LL_HW_RCO_CLBR, HSE_32MHZ);
547// while (LL_PWR_IsActiveFlag_VOS() == 0);
548// #endif /* (CFG_SCM_SUPPORTED == 1) */
549// }
550//
551// /**
552// * @brief Link Layer notification for RCO calibration end.
553// * @param None
554// * @retval None
555// */
556// void LINKLAYER_PLAT_RCOStopClbr(void)
557// {
558// #if (CFG_LPM_LEVEL != 0)
559// PWR_EnableSleepMode();
560// UTIL_LPM_SetStopMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_ENABLE);
561// #endif /* (CFG_LPM_LEVEL != 0) */
562// #if (CFG_SCM_SUPPORTED == 1)
563// scm_setsystemclock(SCM_USER_LL_HW_RCO_CLBR, HSE_16MHZ);
564// #endif /* (CFG_SCM_SUPPORTED == 1) */
565// }
566//
567// /**
568// * @brief Link Layer requests temperature.
569// * @param None
570// * @retval None
571// */
572// void LINKLAYER_PLAT_RequestTemperature(void)
573// {
574// #if (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1)
575// ll_sys_bg_temperature_measurement();
576// #endif /* USE_TEMPERATURE_BASED_RADIO_CALIBRATION */
577// }
578//
579// /**
580// * @brief PHY Start calibration.
581// * @param None
582// * @retval None
583// */
584// void LINKLAYER_PLAT_PhyStartClbr(void)
585// {
586// /* USER CODE BEGIN LINKLAYER_PLAT_PhyStartClbr_0 */
587//
588// /* USER CODE END LINKLAYER_PLAT_PhyStartClbr_0 */
589//
590// /* USER CODE BEGIN LINKLAYER_PLAT_PhyStartClbr_1 */
591//
592// /* USER CODE END LINKLAYER_PLAT_PhyStartClbr_1 */
593// }
594//
595// /**
596// * @brief PHY Stop calibration.
597// * @param None
598// * @retval None
599// */
600// void LINKLAYER_PLAT_PhyStopClbr(void)
601// {
602// /* USER CODE BEGIN LINKLAYER_PLAT_PhyStopClbr_0 */
603//
604// /* USER CODE END LINKLAYER_PLAT_PhyStopClbr_0 */
605//
606// /* USER CODE BEGIN LINKLAYER_PLAT_PhyStopClbr_1 */
607//
608// /* USER CODE END LINKLAYER_PLAT_PhyStopClbr_1 */
609// }
610//
611// /**
612// * @brief Notify the upper layer that new Link Layer timings have been applied.
613// * @param evnt_timing[in]: Evnt_timing_t pointer to structure contains drift time , execution time and scheduling time
614// * @retval None.
615// */
616// void LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT(Evnt_timing_t * p_evnt_timing)
617// {
618// /* USER CODE BEGIN LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT_0 */
619//
620// /* USER CODE END LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT_0 */
621// }
622//
623// /**
624// * @brief Get the ST company ID.
625// * @param None
626// * @retval Company ID
627// */
628// uint32_t LINKLAYER_PLAT_GetSTCompanyID(void)
629// {
630// return LL_FLASH_GetSTCompanyID();
631// }
632//
633// /**
634// * @brief Get the Unique Device Number (UDN).
635// * @param None
636// * @retval UDN
637// */
638// uint32_t LINKLAYER_PLAT_GetUDN(void)
639// {
640// return LL_FLASH_GetUDN();
641// }
642//
643// /* USER CODE BEGIN LINKLAYER_PLAT 0 */
644//
645// /* USER CODE END LINKLAYER_PLAT 0 */
diff --git a/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_cs.rs b/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_cs.rs
new file mode 100644
index 000000000..30103ba27
--- /dev/null
+++ b/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_cs.rs
@@ -0,0 +1,77 @@
1use crate::bindings::link_layer::{
2 LINKLAYER_PLAT_DisableIRQ, LINKLAYER_PLAT_DisableSpecificIRQ, LINKLAYER_PLAT_EnableIRQ,
3 LINKLAYER_PLAT_EnableSpecificIRQ, LINKLAYER_PLAT_PhyStartClbr, LINKLAYER_PLAT_PhyStopClbr,
4};
5
6// /**
7// ******************************************************************************
8// * @file ll_sys_cs.c
9// * @author MCD Application Team
10// * @brief Link Layer IP system interface critical sections management
11// ******************************************************************************
12// * @attention
13// *
14// * Copyright (c) 2022 STMicroelectronics.
15// * All rights reserved.
16// *
17// * This software is licensed under terms that can be found in the LICENSE file
18// * in the root directory of this software component.
19// * If no LICENSE file comes with this software, it is provided AS-IS.
20// *
21// ******************************************************************************
22// */
23//
24// #include "linklayer_plat.h"
25// #include "ll_sys.h"
26// #include <stdint.h>
27//
28/**
29 * @brief Enable interrupts
30 * @param None
31 * @retval None
32 */
33#[unsafe(no_mangle)]
34unsafe extern "C" fn ll_sys_enable_irq() {
35 LINKLAYER_PLAT_EnableIRQ();
36}
37//
38// /**
39// * @brief Disable interrupts
40// * @param None
41// * @retval None
42// */
43#[unsafe(no_mangle)]
44unsafe extern "C" fn ll_sys_disable_irq() {
45 LINKLAYER_PLAT_DisableIRQ();
46}
47//
48// /**
49// * @brief Set the Current Interrupt Priority Mask.
50// * All interrupts with low priority level will be masked.
51// * @param None
52// * @retval None
53// */
54#[unsafe(no_mangle)]
55unsafe extern "C" fn ll_sys_enable_specific_irq(isr_type: u8) {
56 LINKLAYER_PLAT_EnableSpecificIRQ(isr_type);
57}
58//
59// /**
60// * @brief Restore the previous interrupt priority level
61// * @param None
62// * @retval None
63// */
64#[unsafe(no_mangle)]
65unsafe extern "C" fn ll_sys_disable_specific_irq(isr_type: u8) {
66 LINKLAYER_PLAT_DisableSpecificIRQ(isr_type);
67}
68//
69#[unsafe(no_mangle)]
70unsafe extern "C" fn ll_sys_phy_start_clbr() {
71 LINKLAYER_PLAT_PhyStartClbr();
72}
73//
74#[unsafe(no_mangle)]
75unsafe extern "C" fn ll_sys_phy_stop_clbr() {
76 LINKLAYER_PLAT_PhyStopClbr();
77}
diff --git a/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_dp_slp.rs b/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_dp_slp.rs
new file mode 100644
index 000000000..ae8223a5a
--- /dev/null
+++ b/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_dp_slp.rs
@@ -0,0 +1,163 @@
1use crate::bindings::link_layer::{
2 _NULL as NULL, DPSLP_STATE_DEEP_SLEEP_DISABLE, DPSLP_STATE_DEEP_SLEEP_ENABLE, LINKLAYER_PLAT_DisableRadioIT,
3 LINKLAYER_PLAT_EnableRadioIT, LL_SYS_DP_SLP_STATE_T_LL_SYS_DP_SLP_DISABLED,
4 LL_SYS_DP_SLP_STATE_T_LL_SYS_DP_SLP_ENABLED, LL_SYS_STATUS_T_LL_SYS_ERROR, LL_SYS_STATUS_T_LL_SYS_OK,
5 OS_TIMER_PRIO_HG_PRIO_TMR, OS_TIMER_STATE_OSTIMERSTOPPED, OS_TIMER_TYPE_OS_TIMER_ONCE, SUCCESS, ble_stat_t,
6 ll_intf_cmn_le_set_dp_slp_mode, ll_sys_dp_slp_state_t, ll_sys_status_t, os_get_tmr_state, os_timer_create,
7 os_timer_id, os_timer_set_prio, os_timer_start, os_timer_stop,
8};
9
10macro_rules! LL_DP_SLP_NO_WAKEUP {
11 () => {
12 !0u32
13 };
14}
15
16macro_rules! LL_INTERNAL_TMR_US_TO_STEPS {
17 ($us:expr) => {
18 ((($us) * 4) / 125)
19 };
20}
21
22// /**
23// ******************************************************************************
24// * @file ll_sys_dp_slp.c
25// * @author MCD Application Team
26// * @brief Link Layer IP system interface deep sleep management
27// ******************************************************************************
28// * @attention
29// *
30// * Copyright (c) 2022 STMicroelectronics.
31// * All rights reserved.
32// *
33// * This software is licensed under terms that can be found in the LICENSE file
34// * in the root directory of this software component.
35// * If no LICENSE file comes with this software, it is provided AS-IS.
36// *
37// ******************************************************************************
38// */
39//
40// #include "linklayer_plat.h"
41// #include "ll_sys.h"
42// #include "ll_intf_cmn.h"
43//
44// /* Link Layer deep sleep timer */
45static mut RADIO_DP_SLP_TMR_ID: os_timer_id = NULL as *mut _;
46//
47// /* Link Layer deep sleep state */
48static mut LINKLAYER_DP_SLP_STATE: ll_sys_dp_slp_state_t = LL_SYS_DP_SLP_STATE_T_LL_SYS_DP_SLP_DISABLED;
49//
50// /**
51// * @brief Initialize resources to handle deep sleep entry/exit
52// * @param None
53// * @retval LL_SYS status
54// */
55#[unsafe(no_mangle)]
56unsafe extern "C" fn ll_sys_dp_slp_init() -> ll_sys_status_t {
57 let mut return_status: ll_sys_status_t = LL_SYS_STATUS_T_LL_SYS_ERROR;
58
59 /* Create link layer timer for handling IP DEEP SLEEP mode */
60 RADIO_DP_SLP_TMR_ID = os_timer_create(
61 Some(ll_sys_dp_slp_wakeup_evt_clbk),
62 OS_TIMER_TYPE_OS_TIMER_ONCE,
63 NULL as *mut _,
64 );
65
66 /* Set priority of deep sleep timer */
67 os_timer_set_prio(RADIO_DP_SLP_TMR_ID, OS_TIMER_PRIO_HG_PRIO_TMR);
68
69 if RADIO_DP_SLP_TMR_ID != NULL as *mut _ {
70 return_status = LL_SYS_STATUS_T_LL_SYS_OK;
71 }
72
73 return return_status;
74}
75//
76// /**
77// * @brief Link Layer deep sleep status getter
78// * @param None
79// * @retval Link Layer deep sleep state
80// */
81#[unsafe(no_mangle)]
82unsafe extern "C" fn ll_sys_dp_slp_get_state() -> ll_sys_dp_slp_state_t {
83 return LINKLAYER_DP_SLP_STATE;
84}
85//
86// /**
87// * @brief The Link Layer IP enters deep sleep mode
88// * @param dp_slp_duration deep sleep duration in us
89// * @retval LL_SYS status
90// */
91#[unsafe(no_mangle)]
92unsafe extern "C" fn ll_sys_dp_slp_enter(dp_slp_duration: u32) -> ll_sys_status_t {
93 let cmd_status: ble_stat_t;
94 let os_status: i32;
95 let mut return_status: ll_sys_status_t = LL_SYS_STATUS_T_LL_SYS_ERROR;
96
97 /* Check if deep sleep timer has to be started */
98 if dp_slp_duration < LL_DP_SLP_NO_WAKEUP!() {
99 /* Start deep sleep timer */
100 os_status = os_timer_start(RADIO_DP_SLP_TMR_ID, LL_INTERNAL_TMR_US_TO_STEPS!(dp_slp_duration));
101 } else {
102 /* No timer started */
103 os_status = SUCCESS as i32;
104 }
105
106 if os_status == SUCCESS as i32 {
107 /* Switch Link Layer IP to DEEP SLEEP mode */
108 cmd_status = ll_intf_cmn_le_set_dp_slp_mode(DPSLP_STATE_DEEP_SLEEP_ENABLE as u8);
109 if cmd_status == SUCCESS {
110 LINKLAYER_DP_SLP_STATE = LL_SYS_DP_SLP_STATE_T_LL_SYS_DP_SLP_ENABLED;
111 return_status = LL_SYS_STATUS_T_LL_SYS_OK;
112 }
113 }
114
115 return return_status;
116}
117//
118// /**
119// * @brief The Link Layer IP exits deep sleep mode
120// * @param None
121// * @retval LL_SYS status
122// */
123#[unsafe(no_mangle)]
124unsafe extern "C" fn ll_sys_dp_slp_exit() -> ll_sys_status_t {
125 let cmd_status: ble_stat_t;
126 let mut return_status: ll_sys_status_t = LL_SYS_STATUS_T_LL_SYS_ERROR;
127
128 /* Disable radio interrupt */
129 LINKLAYER_PLAT_DisableRadioIT();
130
131 if LINKLAYER_DP_SLP_STATE == LL_SYS_DP_SLP_STATE_T_LL_SYS_DP_SLP_DISABLED {
132 /* Radio not in sleep mode */
133 return_status = LL_SYS_STATUS_T_LL_SYS_OK;
134 } else {
135 /* Switch Link Layer IP to SLEEP mode (by deactivate DEEP SLEEP mode) */
136 cmd_status = ll_intf_cmn_le_set_dp_slp_mode(DPSLP_STATE_DEEP_SLEEP_DISABLE as u8);
137 if cmd_status == SUCCESS {
138 LINKLAYER_DP_SLP_STATE = LL_SYS_DP_SLP_STATE_T_LL_SYS_DP_SLP_DISABLED;
139 return_status = LL_SYS_STATUS_T_LL_SYS_OK;
140 }
141
142 /* Stop the deep sleep wake-up timer if running */
143 if os_get_tmr_state(RADIO_DP_SLP_TMR_ID) != OS_TIMER_STATE_OSTIMERSTOPPED {
144 os_timer_stop(RADIO_DP_SLP_TMR_ID);
145 }
146 }
147
148 /* Re-enable radio interrupt */
149 LINKLAYER_PLAT_EnableRadioIT();
150
151 return return_status;
152}
153
154/**
155 * @brief Link Layer deep sleep wake-up timer callback
156 * @param ptr_arg pointer passed through the callback
157 * @retval LL_SYS status
158 */
159#[unsafe(no_mangle)]
160unsafe extern "C" fn ll_sys_dp_slp_wakeup_evt_clbk(_ptr_arg: *const ::core::ffi::c_void) {
161 /* Link Layer IP exits from DEEP SLEEP mode */
162 ll_sys_dp_slp_exit();
163}
diff --git a/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_intf.rs b/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_intf.rs
new file mode 100644
index 000000000..0b4b0b37f
--- /dev/null
+++ b/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_intf.rs
@@ -0,0 +1,199 @@
1use crate::bindings::link_layer::{
2 Evnt_timing_t, HostStack_Process, LINKLAYER_PLAT_AclkCtrl, LINKLAYER_PLAT_Assert, LINKLAYER_PLAT_ClockInit,
3 LINKLAYER_PLAT_DelayUs, LINKLAYER_PLAT_GetRNG, LINKLAYER_PLAT_RCOStartClbr, LINKLAYER_PLAT_RCOStopClbr,
4 LINKLAYER_PLAT_RequestTemperature, LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT, LINKLAYER_PLAT_SetupRadioIT,
5 LINKLAYER_PLAT_SetupSwLowIT, LINKLAYER_PLAT_StartRadioEvt, LINKLAYER_PLAT_StopRadioEvt,
6 LINKLAYER_PLAT_TriggerSwLowIT, LINKLAYER_PLAT_WaitHclkRdy, MAX_NUM_CNCRT_STAT_MCHNS, emngr_can_mcu_sleep,
7 emngr_handle_all_events, ll_sys_schedule_bg_process,
8};
9
10// /**
11// ******************************************************************************
12// * @file ll_sys_intf.c
13// * @author MCD Application Team
14// * @brief Link Layer IP general system interface
15// ******************************************************************************
16// * @attention
17// *
18// * Copyright (c) 2022 STMicroelectronics.
19// * All rights reserved.
20// *
21// * This software is licensed under terms that can be found in the LICENSE file
22// * in the root directory of this software component.
23// * If no LICENSE file comes with this software, it is provided AS-IS.
24// *
25// ******************************************************************************
26// */
27// #include <stdint.h>
28//
29// #include "ll_sys.h"
30// #include "linklayer_plat.h"
31// #include "event_manager.h"
32// #include "ll_intf.h"
33//
34/**
35 * @brief Initialize the Link Layer SoC dependencies
36 * @param None
37 * @retval None
38 */
39#[unsafe(no_mangle)]
40unsafe extern "C" fn ll_sys_init() {
41 LINKLAYER_PLAT_ClockInit();
42}
43//
44/**
45 * @brief Blocking delay in us
46 * @param None
47 * @retval None
48 */
49#[unsafe(no_mangle)]
50unsafe extern "C" fn ll_sys_delay_us(delay: u32) {
51 LINKLAYER_PLAT_DelayUs(delay);
52}
53
54/**
55 * @brief Assert checking
56 * @param None
57 * @retval None
58 */
59#[unsafe(no_mangle)]
60unsafe extern "C" fn ll_sys_assert(condition: u8) {
61 LINKLAYER_PLAT_Assert(condition);
62}
63
64/**
65 * @brief Radio active clock management
66 * @param None
67 * @retval None
68 */
69#[unsafe(no_mangle)]
70unsafe extern "C" fn ll_sys_radio_ack_ctrl(enable: u8) {
71 LINKLAYER_PLAT_AclkCtrl(enable);
72}
73
74/**
75 * @brief Link Layer waits for radio bus clock ready
76 * @param None
77 * @retval None
78 */
79#[unsafe(no_mangle)]
80unsafe extern "C" fn ll_sys_radio_wait_for_busclkrdy() {
81 LINKLAYER_PLAT_WaitHclkRdy();
82}
83
84/**
85 * @brief Get RNG number for the Link Layer IP
86 * @param None
87 * @retval None
88 */
89#[unsafe(no_mangle)]
90unsafe extern "C" fn ll_sys_get_rng(ptr_rnd: *mut u8, len: u32) {
91 LINKLAYER_PLAT_GetRNG(ptr_rnd, len);
92}
93
94/**
95 * @brief Initialize the main radio interrupt
96 * @param intr_cb radio interrupt callback to link with the radio IRQ
97 * @retval None
98 */
99#[unsafe(no_mangle)]
100unsafe extern "C" fn ll_sys_setup_radio_intr(intr_cb: ::core::option::Option<unsafe extern "C" fn()>) {
101 LINKLAYER_PLAT_SetupRadioIT(intr_cb);
102}
103
104/**
105 * @brief Initialize the radio SW low interrupt
106 * @param intr_cb radio SW low interrupt interrupt callback to link
107 * with the defined interrupt vector
108 * @retval None
109 */
110#[unsafe(no_mangle)]
111unsafe extern "C" fn ll_sys_setup_radio_sw_low_intr(intr_cb: ::core::option::Option<unsafe extern "C" fn()>) {
112 LINKLAYER_PLAT_SetupSwLowIT(intr_cb);
113}
114
115/**
116 * @brief Trigger the radio SW low interrupt
117 * @param None
118 * @retval None
119 */
120#[unsafe(no_mangle)]
121unsafe extern "C" fn ll_sys_radio_sw_low_intr_trigger(priority: u8) {
122 LINKLAYER_PLAT_TriggerSwLowIT(priority);
123}
124
125/**
126 * @brief Link Layer radio activity event notification
127 * @param start start/end of radio event
128 * @retval None
129 */
130#[unsafe(no_mangle)]
131unsafe extern "C" fn ll_sys_radio_evt_not(start: u8) {
132 if start != 0 {
133 LINKLAYER_PLAT_StartRadioEvt();
134 } else {
135 LINKLAYER_PLAT_StopRadioEvt();
136 }
137}
138
139/**
140 * @brief Link Layer RCO calibration notification
141 * @param start start/end of RCO calibration
142 * @retval None
143 */
144#[unsafe(no_mangle)]
145unsafe extern "C" fn ll_sys_rco_clbr_not(start: u8) {
146 if start != 0 {
147 LINKLAYER_PLAT_RCOStartClbr();
148 } else {
149 LINKLAYER_PLAT_RCOStopClbr();
150 }
151}
152
153/**
154 * @brief Link Layer temperature request
155 * @param None
156 * @retval None
157 */
158#[unsafe(no_mangle)]
159unsafe extern "C" fn ll_sys_request_temperature() {
160 LINKLAYER_PLAT_RequestTemperature();
161}
162
163/**
164 * @brief Link Layer background task pcoessing procedure
165 * @param None
166 * @retval None
167 */
168#[unsafe(no_mangle)]
169unsafe extern "C" fn ll_sys_bg_process() {
170 if emngr_can_mcu_sleep() == 0 {
171 emngr_handle_all_events();
172
173 HostStack_Process();
174 }
175
176 if emngr_can_mcu_sleep() == 0 {
177 ll_sys_schedule_bg_process();
178 }
179}
180
181#[unsafe(no_mangle)]
182unsafe extern "C" fn ll_sys_schldr_timing_update_not(p_evnt_timing: *mut Evnt_timing_t) {
183 LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT(p_evnt_timing);
184}
185
186/**
187 * @brief Get the number of concurrent state machines for the Link Layer
188 * @param None
189 * @retval Supported number of concurrent state machines
190 */
191#[unsafe(no_mangle)]
192unsafe extern "C" fn ll_sys_get_concurrent_state_machines_num() -> u8 {
193 return MAX_NUM_CNCRT_STAT_MCHNS as u8;
194}
195//
196// __WEAK void HostStack_Process(void)
197// {
198//
199// }
diff --git a/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_startup.rs b/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_startup.rs
new file mode 100644
index 000000000..074aaeafe
--- /dev/null
+++ b/embassy-stm32-wpan/src/wba/ll_sys/ll_sys_startup.rs
@@ -0,0 +1,125 @@
1use crate::bindings::link_layer::{
2 _NULL as NULL, LL_SYS_STATUS_T_LL_SYS_OK, ble_buff_hdr_p, hci_dispatch_tbl, hci_get_dis_tbl, hst_cbk, ll_intf_init,
3 ll_intf_rgstr_hst_cbk, ll_intf_rgstr_hst_cbk_ll_queue_full, ll_sys_assert, ll_sys_bg_process_init,
4 ll_sys_config_params, ll_sys_dp_slp_init, ll_sys_status_t,
5};
6use crate::bindings::mac::ST_MAC_preInit;
7// /**
8// ******************************************************************************
9// * @file ll_sys_startup.c
10// * @author MCD Application Team
11// * @brief Link Layer IP system interface startup module
12// ******************************************************************************
13// * @attention
14// *
15// * Copyright (c) 2022 STMicroelectronics.
16// * All rights reserved.
17// *
18// * This software is licensed under terms that can be found in the LICENSE file
19// * in the root directory of this software component.
20// * If no LICENSE file comes with this software, it is provided AS-IS.
21// *
22// ******************************************************************************
23// */
24//
25// #include "ll_fw_config.h"
26// #include "ll_sys.h"
27// #include "ll_intf.h"
28// #include "ll_sys_startup.h"
29// #include "common_types.h"
30// #if defined(MAC)
31// #ifndef OPENTHREAD_CONFIG_FILE
32// /* Projects with MAC Layer (i.e. 15.4 except Thread) */
33// #include "st_mac_802_15_4_sap.h"
34// #endif /* OPENTHREAD_CONFIG_FILE */
35// #endif /* MAC */
36//
37
38#[allow(dead_code)]
39/**
40 * @brief Missed HCI event flag
41 */
42static mut MISSED_HCI_EVENT_FLAG: u8 = 0;
43
44// static void ll_sys_dependencies_init(void);
45// #if SUPPORT_BLE
46
47#[cfg(feature = "wba_ble")]
48#[allow(dead_code)]
49unsafe extern "C" fn ll_sys_event_missed_cb(_ptr_evnt_hdr: ble_buff_hdr_p) {
50 MISSED_HCI_EVENT_FLAG = 1;
51}
52
53#[cfg(feature = "wba_ble")]
54/**
55 * @brief Initialize the Link Layer IP BLE controller
56 * @param None
57 * @retval None
58 */
59#[unsafe(no_mangle)]
60unsafe extern "C" fn ll_sys_ble_cntrl_init(host_callback: hst_cbk) {
61 let p_hci_dis_tbl: *const hci_dispatch_tbl = NULL as *const _;
62
63 hci_get_dis_tbl(&p_hci_dis_tbl as *const *const _ as *mut *const _);
64
65 ll_intf_init(p_hci_dis_tbl);
66
67 ll_intf_rgstr_hst_cbk(host_callback);
68
69 ll_intf_rgstr_hst_cbk_ll_queue_full(Some(ll_sys_event_missed_cb));
70
71 ll_sys_dependencies_init();
72}
73// #endif /* SUPPORT_BLE */
74// #if defined(MAC)
75// #ifndef OPENTHREAD_CONFIG_FILE
76#[cfg(feature = "wba_mac")]
77/**
78 * @brief Initialize the Link Layer IP 802.15.4 MAC controller
79 * @param None
80 * @retval None
81 */
82#[unsafe(no_mangle)]
83unsafe extern "C" fn ll_sys_mac_cntrl_init() {
84 ST_MAC_preInit();
85 ll_sys_dependencies_init();
86}
87// #endif /* OPENTHREAD_CONFIG_FILE */
88// #endif /* MAC */
89/**
90 * @brief Start the Link Layer IP in OpenThread configuration
91 * @param None
92 * @retval None
93 */
94#[unsafe(no_mangle)]
95unsafe extern "C" fn ll_sys_thread_init() {
96 ll_sys_dependencies_init();
97}
98
99/**
100 * @brief Initialize the Link Layer resources for startup.
101 * This includes: - Deep Sleep feature resources
102 * - Link Layer background task
103 * @param None
104 * @retval None
105 */
106unsafe fn ll_sys_dependencies_init() {
107 static mut IS_LL_INITIALIZED: u8 = 0;
108 let dp_slp_status: ll_sys_status_t;
109
110 /* Ensure Link Layer resources are created only once */
111 if IS_LL_INITIALIZED == 1 {
112 return;
113 }
114 IS_LL_INITIALIZED = 1;
115
116 /* Deep sleep feature initialization */
117 dp_slp_status = ll_sys_dp_slp_init();
118 ll_sys_assert((dp_slp_status == LL_SYS_STATUS_T_LL_SYS_OK) as u8);
119
120 /* Background task initialization */
121 ll_sys_bg_process_init();
122
123 /* Link Layer user parameters application */
124 ll_sys_config_params();
125}
diff --git a/embassy-stm32-wpan/src/wba/ll_sys/ll_version.rs b/embassy-stm32-wpan/src/wba/ll_sys/ll_version.rs
new file mode 100644
index 000000000..a42e8cc67
--- /dev/null
+++ b/embassy-stm32-wpan/src/wba/ll_sys/ll_version.rs
@@ -0,0 +1,115 @@
1use crate::bindings::link_layer::{
2 LL_SYS_BRIEF_VERSION_MAJOR, LL_SYS_BRIEF_VERSION_MAJOR_MASK, LL_SYS_BRIEF_VERSION_MAJOR_POS,
3 LL_SYS_BRIEF_VERSION_MINOR, LL_SYS_BRIEF_VERSION_MINOR_MASK, LL_SYS_BRIEF_VERSION_MINOR_POS,
4 LL_SYS_BRIEF_VERSION_PATCH, LL_SYS_BRIEF_VERSION_PATCH_MASK, LL_SYS_BRIEF_VERSION_PATCH_POS,
5};
6
7// /**
8// ******************************************************************************
9// * @file ll_version.c
10// * @author MCD Application Team
11// * @brief Link Layer version interface
12// ******************************************************************************
13// * @attention
14// *
15// * Copyright (c) 2025 STMicroelectronics.
16// * All rights reserved.
17// *
18// * This software is licensed under terms that can be found in the LICENSE file
19// * in the root directory of this software component.
20// * If no LICENSE file comes with this software, it is provided AS-IS.
21// *
22// ******************************************************************************
23// */
24//
25// /* Includes ------------------------------------------------------------------*/
26// /* Integer types */
27// #include <stdint.h>
28//
29// /* Own header file */
30// #include "ll_version.h"
31//
32// /* Temporary header file for version tracking */
33// #include "ll_tmp_version.h"
34//
35// /* Private defines -----------------------------------------------------------*/
36// /**
37// * @brief Magic keyword to identify the system version when debugging
38// */
39// #define LL_SYS_MAGIC_KEYWORD 0xDEADBEEF
40
41const LL_SYS_MAGIC_KEYWORD: u32 = 0xDEADBEEF;
42
43//
44// /* Private macros ------------------------------------------------------------*/
45// /* Macro to set a specific field value */
46// #define LL_SYS_SET_FIELD_VALUE(value, mask, pos) \
47// (((value) << (pos)) & (mask))
48
49macro_rules! LL_SYS_SET_FIELD_VALUE {
50 ($value:expr, $mask:expr, $pos:expr) => {
51 ((($value) << ($pos)) & ($mask))
52 };
53}
54
55//
56// /* Private typedef -----------------------------------------------------------*/
57// /**
58// * @brief Link Layer system version structure definition
59// */
60#[allow(non_camel_case_types)]
61struct ll_sys_version_t {
62 #[allow(unused)]
63 magic_key_word: u32, /* Magic key word to identify the system version */
64 version: u32, /* System version - i.e.: short hash of latest commit */
65}
66//
67// /* Private variables ---------------------------------------------------------*/
68// /**
69// * @brief Link Layer brief version definition
70// */
71const LL_SYS_BRIEF_VERSION: u8 = LL_SYS_SET_FIELD_VALUE!(
72 LL_SYS_BRIEF_VERSION_MAJOR as u8,
73 LL_SYS_BRIEF_VERSION_MAJOR_MASK as u8,
74 LL_SYS_BRIEF_VERSION_MAJOR_POS as u8
75) | LL_SYS_SET_FIELD_VALUE!(
76 LL_SYS_BRIEF_VERSION_MINOR as u8,
77 LL_SYS_BRIEF_VERSION_MINOR_MASK as u8,
78 LL_SYS_BRIEF_VERSION_MINOR_POS as u8
79) | LL_SYS_SET_FIELD_VALUE!(
80 LL_SYS_BRIEF_VERSION_PATCH as u8,
81 LL_SYS_BRIEF_VERSION_PATCH_MASK as u8,
82 LL_SYS_BRIEF_VERSION_PATCH_POS as u8
83);
84//
85// /**
86// * @brief Link Layer system version structure definition
87// */
88const LL_SYS_SYSTEM_VERSION: ll_sys_version_t = ll_sys_version_t {
89 magic_key_word: LL_SYS_MAGIC_KEYWORD,
90 version: 0, // LL_SYS_SYSTEM_VERSION,
91};
92//
93// /**
94// * @brief Link Layer source version structure definition
95// */
96const LL_SYS_SOURCE_VERSION: ll_sys_version_t = ll_sys_version_t {
97 magic_key_word: LL_SYS_MAGIC_KEYWORD,
98 version: 0, // LL_SYS_SOURCE_VERSION
99};
100//
101// /* Functions Definition ------------------------------------------------------*/
102#[unsafe(no_mangle)]
103unsafe extern "C" fn ll_sys_get_brief_fw_version() -> u8 {
104 return LL_SYS_BRIEF_VERSION;
105}
106
107#[unsafe(no_mangle)]
108unsafe extern "C" fn ll_sys_get_system_fw_version() -> u32 {
109 return LL_SYS_SYSTEM_VERSION.version;
110}
111
112#[unsafe(no_mangle)]
113unsafe extern "C" fn ll_sys_get_source_fw_version() -> u32 {
114 return LL_SYS_SOURCE_VERSION.version;
115}
diff --git a/embassy-stm32-wpan/src/wba/ll_sys/mod.rs b/embassy-stm32-wpan/src/wba/ll_sys/mod.rs
new file mode 100644
index 000000000..45e196c96
--- /dev/null
+++ b/embassy-stm32-wpan/src/wba/ll_sys/mod.rs
@@ -0,0 +1,5 @@
1mod ll_sys_cs;
2mod ll_sys_dp_slp;
3mod ll_sys_intf;
4mod ll_sys_startup;
5mod ll_version;
diff --git a/embassy-stm32-wpan/src/wba/ll_sys_if.rs b/embassy-stm32-wpan/src/wba/ll_sys_if.rs
new file mode 100644
index 000000000..992c2a6f1
--- /dev/null
+++ b/embassy-stm32-wpan/src/wba/ll_sys_if.rs
@@ -0,0 +1,335 @@
1#[allow(dead_code)]
2fn test_fn() {}
3
4// /* USER CODE BEGIN Header */
5// /**
6// ******************************************************************************
7// * @file ll_sys_if.c
8// * @author MCD Application Team
9// * @brief Source file for initiating system
10// ******************************************************************************
11// * @attention
12// *
13// * Copyright (c) 2022 STMicroelectronics.
14// * All rights reserved.
15// *
16// * This software is licensed under terms that can be found in the LICENSE file
17// * in the root directory of this software component.
18// * If no LICENSE file comes with this software, it is provided AS-IS.
19// *
20// ******************************************************************************
21// */
22// /* USER CODE END Header */
23//
24// #include "main.h"
25// #include "app_common.h"
26// #include "app_conf.h"
27// #include "log_module.h"
28// #include "ll_intf_cmn.h"
29// #include "ll_sys.h"
30// #include "ll_sys_if.h"
31// #include "stm32_rtos.h"
32// #include "utilities_common.h"
33// #if (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1)
34// #include "temp_measurement.h"
35// #endif /* (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1) */
36// #if (CFG_LPM_STANDBY_SUPPORTED == 0)
37// extern void profile_reset(void);
38// #endif
39// /* Private defines -----------------------------------------------------------*/
40// /* Radio event scheduling method - must be set at 1 */
41// #define USE_RADIO_LOW_ISR (1)
42// #define NEXT_EVENT_SCHEDULING_FROM_ISR (1)
43//
44// /* USER CODE BEGIN PD */
45//
46// /* USER CODE END PD */
47//
48// /* Private macros ------------------------------------------------------------*/
49// /* USER CODE BEGIN PM */
50//
51// /* USER CODE END PM */
52//
53// /* Private constants ---------------------------------------------------------*/
54// /* USER CODE BEGIN PC */
55//
56// /* USER CODE END PC */
57//
58// /* Private variables ---------------------------------------------------------*/
59// /* USER CODE BEGIN PV */
60//
61// /* USER CODE END PV */
62//
63// /* Global variables ----------------------------------------------------------*/
64//
65// /* USER CODE BEGIN GV */
66//
67// /* USER CODE END GV */
68//
69// /* Private functions prototypes-----------------------------------------------*/
70// #if (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1)
71// static void ll_sys_bg_temperature_measurement_init(void);
72// #endif /* USE_TEMPERATURE_BASED_RADIO_CALIBRATION */
73// static void ll_sys_sleep_clock_source_selection(void);
74// static uint8_t ll_sys_BLE_sleep_clock_accuracy_selection(void);
75// void ll_sys_reset(void);
76//
77// /* USER CODE BEGIN PFP */
78//
79// /* USER CODE END PFP */
80//
81// /* External variables --------------------------------------------------------*/
82//
83// /* USER CODE BEGIN EV */
84//
85// /* USER CODE END EV */
86//
87// /* Functions Definition ------------------------------------------------------*/
88//
89// /**
90// * @brief Link Layer background process initialization
91// * @param None
92// * @retval None
93// */
94// void ll_sys_bg_process_init(void)
95// {
96// /* Register Link Layer task */
97// UTIL_SEQ_RegTask(1U << CFG_TASK_LINK_LAYER, UTIL_SEQ_RFU, ll_sys_bg_process);
98// }
99//
100// /**
101// * @brief Link Layer background process next iteration scheduling
102// * @param None
103// * @retval None
104// */
105// void ll_sys_schedule_bg_process(void)
106// {
107// UTIL_SEQ_SetTask(1U << CFG_TASK_LINK_LAYER, TASK_PRIO_LINK_LAYER);
108// }
109//
110// /**
111// * @brief Link Layer background process next iteration scheduling from ISR
112// * @param None
113// * @retval None
114// */
115// void ll_sys_schedule_bg_process_isr(void)
116// {
117// UTIL_SEQ_SetTask(1U << CFG_TASK_LINK_LAYER, TASK_PRIO_LINK_LAYER);
118// }
119//
120// /**
121// * @brief Link Layer configuration phase before application startup.
122// * @param None
123// * @retval None
124// */
125// void ll_sys_config_params(void)
126// {
127// /* USER CODE BEGIN ll_sys_config_params_0 */
128//
129// /* USER CODE END ll_sys_config_params_0 */
130//
131// /* Configure link layer behavior for low ISR use and next event scheduling method:
132// * - SW low ISR is used.
133// * - Next event is scheduled from ISR.
134// */
135// ll_intf_cmn_config_ll_ctx_params(USE_RADIO_LOW_ISR, NEXT_EVENT_SCHEDULING_FROM_ISR);
136// /* Apply the selected link layer sleep timer source */
137// ll_sys_sleep_clock_source_selection();
138//
139// /* USER CODE BEGIN ll_sys_config_params_1 */
140//
141// /* USER CODE END ll_sys_config_params_1 */
142//
143// #if (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1)
144// /* Initialize link layer temperature measurement background task */
145// ll_sys_bg_temperature_measurement_init();
146//
147// /* Link layer IP uses temperature based calibration instead of periodic one */
148// ll_intf_cmn_set_temperature_sensor_state();
149// #endif /* USE_TEMPERATURE_BASED_RADIO_CALIBRATION */
150//
151// /* Link Layer power table */
152// ll_intf_cmn_select_tx_power_table(CFG_RF_TX_POWER_TABLE_ID);
153//
154// #if (USE_CTE_DEGRADATION == 1u)
155// /* Apply CTE degradation */
156// ll_sys_apply_cte_settings ();
157// #endif /* (USE_CTE_DEGRADATION == 1u) */
158//
159// /* USER CODE BEGIN ll_sys_config_params_2 */
160//
161// /* USER CODE END ll_sys_config_params_2 */
162// }
163//
164// #if (USE_TEMPERATURE_BASED_RADIO_CALIBRATION == 1)
165//
166// /**
167// * @brief Link Layer temperature request background process initialization
168// * @param None
169// * @retval None
170// */
171// void ll_sys_bg_temperature_measurement_init(void)
172// {
173// /* Register Temperature Measurement task */
174// UTIL_SEQ_RegTask(1U << CFG_TASK_TEMP_MEAS, UTIL_SEQ_RFU, TEMPMEAS_RequestTemperatureMeasurement);
175// }
176//
177// /**
178// * @brief Request backroud task processing for temperature measurement
179// * @param None
180// * @retval None
181// */
182// void ll_sys_bg_temperature_measurement(void)
183// {
184// static uint8_t initial_temperature_acquisition = 0;
185//
186// if(initial_temperature_acquisition == 0)
187// {
188// TEMPMEAS_RequestTemperatureMeasurement();
189// initial_temperature_acquisition = 1;
190// }
191// else
192// {
193// UTIL_SEQ_SetTask(1U << CFG_TASK_TEMP_MEAS, CFG_SEQ_PRIO_0);
194// }
195// }
196//
197// #endif /* USE_TEMPERATURE_BASED_RADIO_CALIBRATION */
198//
199// uint8_t ll_sys_BLE_sleep_clock_accuracy_selection(void)
200// {
201// uint8_t BLE_sleep_clock_accuracy = 0;
202// #if (CFG_RADIO_LSE_SLEEP_TIMER_CUSTOM_SCA_RANGE == 0)
203// uint32_t RevID = LL_DBGMCU_GetRevisionID();
204// #endif
205// uint32_t linklayer_slp_clk_src = LL_RCC_RADIO_GetSleepTimerClockSource();
206//
207// if(linklayer_slp_clk_src == LL_RCC_RADIOSLEEPSOURCE_LSE)
208// {
209// /* LSE selected as Link Layer sleep clock source.
210// Sleep clock accuracy is different regarding the WBA device ID and revision
211// */
212// #if (CFG_RADIO_LSE_SLEEP_TIMER_CUSTOM_SCA_RANGE == 0)
213// #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx)
214// if(RevID == REV_ID_A)
215// {
216// BLE_sleep_clock_accuracy = STM32WBA5x_REV_ID_A_SCA_RANGE;
217// }
218// else if(RevID == REV_ID_B)
219// {
220// BLE_sleep_clock_accuracy = STM32WBA5x_REV_ID_B_SCA_RANGE;
221// }
222// else
223// {
224// /* Revision ID not supported, default value of 500ppm applied */
225// BLE_sleep_clock_accuracy = STM32WBA5x_DEFAULT_SCA_RANGE;
226// }
227// #elif defined(STM32WBA65xx)
228// BLE_sleep_clock_accuracy = STM32WBA6x_SCA_RANGE;
229// UNUSED(RevID);
230// #else
231// UNUSED(RevID);
232// #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) */
233// #else /* CFG_RADIO_LSE_SLEEP_TIMER_CUSTOM_SCA_RANGE */
234// BLE_sleep_clock_accuracy = CFG_RADIO_LSE_SLEEP_TIMER_CUSTOM_SCA_RANGE;
235// #endif /* CFG_RADIO_LSE_SLEEP_TIMER_CUSTOM_SCA_RANGE */
236// }
237// else
238// {
239// /* LSE is not the Link Layer sleep clock source, sleep clock accurcay default value is 500 ppm */
240// BLE_sleep_clock_accuracy = STM32WBA5x_DEFAULT_SCA_RANGE;
241// }
242//
243// return BLE_sleep_clock_accuracy;
244// }
245//
246// void ll_sys_sleep_clock_source_selection(void)
247// {
248// uint16_t freq_value = 0;
249// uint32_t linklayer_slp_clk_src = LL_RCC_RADIOSLEEPSOURCE_NONE;
250//
251// linklayer_slp_clk_src = LL_RCC_RADIO_GetSleepTimerClockSource();
252// switch(linklayer_slp_clk_src)
253// {
254// case LL_RCC_RADIOSLEEPSOURCE_LSE:
255// linklayer_slp_clk_src = RTC_SLPTMR;
256// break;
257//
258// case LL_RCC_RADIOSLEEPSOURCE_LSI:
259// linklayer_slp_clk_src = RCO_SLPTMR;
260// break;
261//
262// case LL_RCC_RADIOSLEEPSOURCE_HSE_DIV1000:
263// linklayer_slp_clk_src = CRYSTAL_OSCILLATOR_SLPTMR;
264// break;
265//
266// case LL_RCC_RADIOSLEEPSOURCE_NONE:
267// /* No Link Layer sleep clock source selected */
268// assert_param(0);
269// break;
270// }
271// ll_intf_cmn_le_select_slp_clk_src((uint8_t)linklayer_slp_clk_src, &freq_value);
272// }
273//
274// void ll_sys_reset(void)
275// {
276// uint8_t bsca = 0;
277// /* Link layer timings */
278// uint8_t drift_time = DRIFT_TIME_DEFAULT;
279// uint8_t exec_time = EXEC_TIME_DEFAULT;
280//
281// /* USER CODE BEGIN ll_sys_reset_0 */
282//
283// /* USER CODE END ll_sys_reset_0 */
284//
285// /* Apply the selected link layer sleep timer source */
286// ll_sys_sleep_clock_source_selection();
287//
288// /* Configure the link layer sleep clock accuracy */
289// bsca = ll_sys_BLE_sleep_clock_accuracy_selection();
290// ll_intf_le_set_sleep_clock_accuracy(bsca);
291//
292// /* Update link layer timings depending on selected configuration */
293// if(LL_RCC_RADIO_GetSleepTimerClockSource() == LL_RCC_RADIOSLEEPSOURCE_LSI)
294// {
295// drift_time += DRIFT_TIME_EXTRA_LSI2;
296// exec_time += EXEC_TIME_EXTRA_LSI2;
297// }
298// else
299// {
300// #if defined(__GNUC__) && defined(DEBUG)
301// drift_time += DRIFT_TIME_EXTRA_GCC_DEBUG;
302// exec_time += EXEC_TIME_EXTRA_GCC_DEBUG;
303// #endif
304// }
305//
306// /* USER CODE BEGIN ll_sys_reset_1 */
307//
308// /* USER CODE END ll_sys_reset_1 */
309//
310// if((drift_time != DRIFT_TIME_DEFAULT) || (exec_time != EXEC_TIME_DEFAULT))
311// {
312// ll_sys_config_BLE_schldr_timings(drift_time, exec_time);
313// }
314// /* USER CODE BEGIN ll_sys_reset_2 */
315//
316// /* USER CODE END ll_sys_reset_2 */
317// }
318// #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA65xx)
319// void ll_sys_apply_cte_settings(void)
320// {
321// ll_intf_apply_cte_degrad_change();
322// }
323// #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA65xx) */
324//
325// #if (CFG_LPM_STANDBY_SUPPORTED == 0)
326// void ll_sys_get_ble_profile_statistics(uint32_t* exec_time, uint32_t* drift_time, uint32_t* average_drift_time, uint8_t reset)
327// {
328// if (reset != 0U)
329// {
330// profile_reset();
331// }
332// ll_intf_get_profile_statistics(exec_time, drift_time, average_drift_time);
333// }
334// #endif
335//
diff --git a/embassy-stm32-wpan/src/wba/mac_sys_if.rs b/embassy-stm32-wpan/src/wba/mac_sys_if.rs
new file mode 100644
index 000000000..b0dab238e
--- /dev/null
+++ b/embassy-stm32-wpan/src/wba/mac_sys_if.rs
@@ -0,0 +1,186 @@
1use crate::bindings::mac::mac_baremetal_run;
2//
3// /* USER CODE BEGIN Header */
4// /**
5// ******************************************************************************
6// * @file mac_sys_if.c
7// * @author MCD Application Team
8// * @brief Source file for using MAC Layer with a RTOS
9// ******************************************************************************
10// * @attention
11// *
12// * Copyright (c) 2025 STMicroelectronics.
13// * All rights reserved.
14// *
15// * This software is licensed under terms that can be found in the LICENSE file
16// * in the root directory of this software component.
17// * If no LICENSE file comes with this software, it is provided AS-IS.
18// *
19// ******************************************************************************
20// */
21// /* USER CODE END Header */
22//
23// #include "main.h"
24// #include "app_common.h"
25// #include "app_conf.h"
26// #include "log_module.h"
27// #include "stm32_rtos.h"
28// #include "st_mac_802_15_4_sys.h"
29//
30// extern void mac_baremetal_run(void);
31//
32// /* Private defines -----------------------------------------------------------*/
33// /* USER CODE BEGIN PD */
34//
35// /* USER CODE END PD */
36//
37// /* Private macros ------------------------------------------------------------*/
38// /* USER CODE BEGIN PM */
39//
40// /* USER CODE END PM */
41//
42// /* Private variables ---------------------------------------------------------*/
43// /* USER CODE BEGIN PV */
44//
45// /* USER CODE END PV */
46//
47// /* Global variables ----------------------------------------------------------*/
48// /* USER CODE BEGIN GV */
49//
50// /* USER CODE END GV */
51//
52// /* Functions Definition ------------------------------------------------------*/
53//
54// /**
55// * @brief Mac Layer Initialisation
56// * @param None
57// * @retval None
58// */
59// void MacSys_Init(void)
60// {
61// /* Register tasks */
62// UTIL_SEQ_RegTask( TASK_MAC_LAYER, UTIL_SEQ_RFU, mac_baremetal_run);
63// }
64//
65// /**
66// * @brief Mac Layer Resume
67// * @param None
68// * @retval None
69// */
70// void MacSys_Resume(void)
71// {
72// UTIL_SEQ_ResumeTask( TASK_MAC_LAYER );
73// }
74//
75// /**
76// * @brief MAC Layer set Task.
77// * @param None
78// * @retval None
79// */
80// void MacSys_SemaphoreSet(void)
81// {
82// UTIL_SEQ_SetTask( TASK_MAC_LAYER, TASK_PRIO_MAC_LAYER );
83// }
84//
85// /**
86// * @brief MAC Layer Task wait.
87// * @param None
88// * @retval None
89// */
90// void MacSys_SemaphoreWait( void )
91// {
92// /* Not used */
93// }
94//
95// /**
96// * @brief MAC Layer set Event.
97// * @param None
98// * @retval None
99// */
100// void MacSys_EventSet( void )
101// {
102// UTIL_SEQ_SetEvt( EVENT_MAC_LAYER );
103// }
104//
105// /**
106// * @brief MAC Layer wait Event.
107// * @param None
108// * @retval None
109// */
110// void MacSys_EventWait( void )
111// {
112// UTIL_SEQ_WaitEvt( EVENT_MAC_LAYER );
113// }
114//
115
116/**
117 * @brief Mac Layer Initialisation
118 * @param None
119 * @retval None
120 */
121#[unsafe(no_mangle)]
122pub extern "C" fn MacSys_Init() {
123 unsafe {
124 mac_baremetal_run();
125 }
126}
127
128/**
129 * @brief Mac Layer Resume
130 * @param None
131 * @retval None
132 */
133#[unsafe(no_mangle)]
134pub extern "C" fn MacSys_Resume() {
135 unsafe {
136 mac_baremetal_run();
137 }
138}
139
140/**
141 * @brief MAC Layer set Task.
142 * @param None
143 * @retval None
144 */
145#[unsafe(no_mangle)]
146pub extern "C" fn MacSys_SemaphoreSet() {
147 unsafe {
148 mac_baremetal_run();
149 }
150}
151
152/**
153 * @brief MAC Layer Task wait.
154 * @param None
155 * @retval None
156 */
157#[unsafe(no_mangle)]
158pub extern "C" fn MacSys_SemaphoreWait() {
159 unsafe {
160 mac_baremetal_run();
161 }
162}
163
164/**
165 * @brief MAC Layer set Event.
166 * @param None
167 * @retval None
168 */
169#[unsafe(no_mangle)]
170pub extern "C" fn MacSys_EventSet() {
171 unsafe {
172 mac_baremetal_run();
173 }
174}
175
176/**
177 * @brief MAC Layer wait Event.
178 * @param None
179 * @retval None
180 */
181#[unsafe(no_mangle)]
182pub extern "C" fn MacSys_EventWait() {
183 unsafe {
184 mac_baremetal_run();
185 }
186}
diff --git a/embassy-stm32-wpan/src/wba/mod.rs b/embassy-stm32-wpan/src/wba/mod.rs
index 9e75dbae9..c93b8d020 100644
--- a/embassy-stm32-wpan/src/wba/mod.rs
+++ b/embassy-stm32-wpan/src/wba/mod.rs
@@ -1,2 +1,5 @@
1/// A test struct 1pub mod bindings;
2pub struct TestStruct; 2pub mod linklayer_plat;
3pub mod ll_sys;
4pub mod ll_sys_if;
5pub mod mac_sys_if;
generated by cgit (git 2.34.1) at 2026-04-05 17:00:00 +0000