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| author | Rick Rogers <[email protected]> | 2025-07-25 15:03:37 -0400 |
|---|---|---|
| committer | Rick Rogers <[email protected]> | 2025-07-25 15:03:37 -0400 |
| commit | a5a9c02543fbe978c68a707654029552f6b7b00a (patch) | |
| tree | 8a7ca2c4f4129f45d1a293b35be039182932a89f /embassy-stm32/build.rs | |
| parent | c37fb51cfe25511b2222e92e37b80933079ed3fc (diff) | |
include proper pll divs/divt initialization
Diffstat (limited to 'embassy-stm32/build.rs')
| -rw-r--r-- | embassy-stm32/build.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 73860c64a..753f94fa6 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs | |||
| @@ -1599,7 +1599,7 @@ fn main() { | |||
| 1599 | for e in rcc_registers.ir.enums { | 1599 | for e in rcc_registers.ir.enums { |
| 1600 | fn is_rcc_name(e: &str) -> bool { | 1600 | fn is_rcc_name(e: &str) -> bool { |
| 1601 | match e { | 1601 | match e { |
| 1602 | "Pllp" | "Pllq" | "Pllr" | "Pllm" | "Plln" | "Prediv1" | "Prediv2" => true, | 1602 | "Pllp" | "Pllq" | "Pllr" | "Plldivst" | "Pllm" | "Plln" | "Prediv1" | "Prediv2" => true, |
| 1603 | "Timpre" | "Pllrclkpre" => false, | 1603 | "Timpre" | "Pllrclkpre" => false, |
| 1604 | e if e.ends_with("pre") || e.ends_with("pres") || e.ends_with("div") || e.ends_with("mul") => true, | 1604 | e if e.ends_with("pre") || e.ends_with("pres") || e.ends_with("div") || e.ends_with("mul") => true, |
| 1605 | _ => false, | 1605 | _ => false, |