stm32/ADC: Fix prescaler calculation to include max frequency.

Due to the integer rounding rules one has to subtract 1 from the numerator.
For example:

Let max clock be 55 and supplied clock be 110
110/55 = 2 which results in the divider being set to 4 and the clock after division ends up being 27 instead of 55
Subtracting 1 to the numerator get around the rounding issue
109/55 = 1 which results in the divider being set to 2 and the clock after division ends up being 55 which is exactly max clock

1 files changed, 2 insertions, 1 deletions

diff --git a/embassy-stm32/src/adc/g4.rs b/embassy-stm32/src/adc/g4.rs
index 43498966f..ac0a6196f 100644
--- a/embassy-stm32/src/adc/g4.rs
+++ b/embassy-stm32/src/adc/g4.rs
@@ -72,7 +72,8 @@ enum Prescaler {
 
 impl Prescaler {
     fn from_ker_ck(frequency: Hertz) -> Self {
-        let raw_prescaler = frequency.0 / MAX_ADC_CLK_FREQ.0;
+        // Calculate prescaler in a way where the clock can hit MAX CLK
+        let raw_prescaler = frequency.0.saturating_sub(1) / MAX_ADC_CLK_FREQ.0;
         match raw_prescaler {
             0 => Self::NotDivided,
             1 => Self::DividedBy2,