stm32: extract block_for_us

remove from pub api

4 files changed, 6 insertions, 22 deletions

diff --git a/embassy-stm32/src/adc/c0.rs b/embassy-stm32/src/adc/c0.rs
index 983e7c10d..3bdca7edb 100644
--- a/embassy-stm32/src/adc/c0.rs
+++ b/embassy-stm32/src/adc/c0.rs
@@ -223,7 +223,7 @@ impl<'d, T: AnyInstance> Adc<'d, T> {
 
         // "The software must wait for the ADC voltage regulator startup time."
         // See datasheet for the value.
-        blocking_delay_us(TIME_ADC_VOLTAGE_REGUALTOR_STARTUP_US + 1);
+        blocking_delay_us(TIME_ADC_VOLTAGE_REGUALTOR_STARTUP_US as u64 + 1);
 
         T::regs().cfgr1().modify(|reg| reg.set_res(resolution));
 
diff --git a/embassy-stm32/src/adc/f1.rs b/embassy-stm32/src/adc/f1.rs
index f6220de78..d6c6f480b 100644
--- a/embassy-stm32/src/adc/f1.rs
+++ b/embassy-stm32/src/adc/f1.rs
@@ -43,7 +43,7 @@ impl<'d, T: Instance> Adc<'d, T> {
 
         // 11.4: Before starting a calibration, the ADC must have been in power-on state (ADON bit = ‘1’)
         // for at least two ADC clock cycles.
-        blocking_delay_us((1_000_000 * 2) / Self::freq().0 + 1);
+        blocking_delay_us((1_000_000 * 2) / Self::freq().0 as u64 + 1);
 
         // Reset calibration
         T::regs().cr2().modify(|reg| reg.set_rstcal(true));
@@ -58,7 +58,7 @@ impl<'d, T: Instance> Adc<'d, T> {
         }
 
         // One cycle after calibration
-        blocking_delay_us((1_000_000 * 1) / Self::freq().0 + 1);
+        blocking_delay_us((1_000_000 * 1) / Self::freq().0 as u64 + 1);
 
         T::Interrupt::unpend();
         unsafe { T::Interrupt::enable() };
diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs
index 4a77f3c5b..29bfdac97 100644
--- a/embassy-stm32/src/adc/f3.rs
+++ b/embassy-stm32/src/adc/f3.rs
@@ -62,7 +62,7 @@ impl<'d, T: Instance> Adc<'d, T> {
         while T::regs().cr().read().adcal() {}
 
         // Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223).
-        blocking_delay_us((1_000_000 * 4) / Self::freq().0 + 1);
+        blocking_delay_us((1_000_000 * 4) / Self::freq().0 as u64 + 1);
 
         // Enable the adc
         T::regs().cr().modify(|w| w.set_aden(true));
diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs
index 549f2f5a5..5ec08a22d 100644
--- a/embassy-stm32/src/adc/mod.rs
+++ b/embassy-stm32/src/adc/mod.rs
@@ -35,6 +35,8 @@ pub use ringbuffered::RingBufferedAdc;
 #[path = "adc4.rs"]
 pub mod adc4;
 
+#[allow(unused)]
+pub(self) use crate::block_for_us as blocking_delay_us;
 pub use crate::pac::adc::vals;
 #[cfg(not(any(adc_f1, adc_f3v3)))]
 pub use crate::pac::adc::vals::Res as Resolution;
@@ -140,24 +142,6 @@ impl<T: SealedAnyInstance + Instance> BasicAnyInstance for T {
 ))]
 impl<T: SealedAnyInstance + Instance> AnyInstance for T {}
 
-/// Performs a busy-wait delay for a specified number of microseconds.
-#[allow(unused)]
-pub(crate) fn blocking_delay_us(us: u32) {
-    cfg_if::cfg_if! {
-        // this does strange things on stm32wlx in low power mode depending on exactly when it's called
-        // as in sometimes 15 us (1 tick) would take > 20 seconds.
-        if #[cfg(all(feature = "time", all(not(feature = "low-power"), not(stm32wlex))))] {
-            let duration = embassy_time::Duration::from_micros(us as u64);
-            embassy_time::block_for(duration);
-        } else {
-            let freq = unsafe { crate::rcc::get_freqs() }.sys.to_hertz().unwrap().0 as u64;
-            let us = us as u64;
-            let cycles = freq * us / 1_000_000;
-            cortex_m::asm::delay(cycles as u32);
-        }
-    }
-}
-
 #[cfg(any(adc_c0, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5))]
 /// Number of samples used for averaging.
 #[derive(Copy, Clone, Debug)]