diff options
| author | etiennecollin <[email protected]> | 2025-08-25 21:10:59 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2025-09-05 14:43:29 +0200 |
| commit | 47bb14514f63a713600d7fa1c6cec2cbd1493591 (patch) | |
| tree | 88ddabbd9495f5ccbff0ddc300c7c774d3990988 /embassy-stm32/src/dma | |
| parent | 50e2e2ec60ca32a2da53b91f4a30c3a71d4e9f30 (diff) | |
feat: use register wrappers instead of u32 for LinearItem
Since the register structs are no-field structs with
`repr(transparent)`, we can use them in the LinearItem with `repr(C)`.
This allows the user to call the convenient named setter functions for
the registers instead of manually changing the bits of the u32.
Diffstat (limited to 'embassy-stm32/src/dma')
| -rw-r--r-- | embassy-stm32/src/dma/gpdma/linked_list.rs | 27 |
1 files changed, 12 insertions, 15 deletions
diff --git a/embassy-stm32/src/dma/gpdma/linked_list.rs b/embassy-stm32/src/dma/gpdma/linked_list.rs index ca2d4fb7f..f494bd5f5 100644 --- a/embassy-stm32/src/dma/gpdma/linked_list.rs +++ b/embassy-stm32/src/dma/gpdma/linked_list.rs | |||
| @@ -25,17 +25,17 @@ pub enum RunMode { | |||
| 25 | #[repr(C)] | 25 | #[repr(C)] |
| 26 | pub struct LinearItem { | 26 | pub struct LinearItem { |
| 27 | /// Transfer register 1. | 27 | /// Transfer register 1. |
| 28 | pub tr1: u32, | 28 | pub tr1: regs::ChTr1, |
| 29 | /// Transfer register 2. | 29 | /// Transfer register 2. |
| 30 | pub tr2: u32, | 30 | pub tr2: regs::ChTr2, |
| 31 | /// Block register 2. | 31 | /// Block register 2. |
| 32 | pub br1: u32, | 32 | pub br1: regs::ChBr1, |
| 33 | /// Source address register. | 33 | /// Source address register. |
| 34 | pub sar: u32, | 34 | pub sar: u32, |
| 35 | /// Destination address register. | 35 | /// Destination address register. |
| 36 | pub dar: u32, | 36 | pub dar: u32, |
| 37 | /// Linked-list address register. | 37 | /// Linked-list address register. |
| 38 | pub llr: u32, | 38 | pub llr: regs::ChLlr, |
| 39 | } | 39 | } |
| 40 | 40 | ||
| 41 | impl LinearItem { | 41 | impl LinearItem { |
| @@ -106,12 +106,12 @@ impl LinearItem { | |||
| 106 | let llr = regs::ChLlr(0); | 106 | let llr = regs::ChLlr(0); |
| 107 | 107 | ||
| 108 | Self { | 108 | Self { |
| 109 | tr1: tr1.0, | 109 | tr1, |
| 110 | tr2: tr2.0, | 110 | tr2, |
| 111 | br1: br1.0, | 111 | br1, |
| 112 | sar, | 112 | sar, |
| 113 | dar, | 113 | dar, |
| 114 | llr: llr.0, | 114 | llr, |
| 115 | } | 115 | } |
| 116 | } | 116 | } |
| 117 | 117 | ||
| @@ -131,23 +131,20 @@ impl LinearItem { | |||
| 131 | // Lower two bits are ignored: 32 bit aligned. | 131 | // Lower two bits are ignored: 32 bit aligned. |
| 132 | llr.set_la(next >> 2); | 132 | llr.set_la(next >> 2); |
| 133 | 133 | ||
| 134 | self.llr = llr.0; | 134 | self.llr = llr; |
| 135 | } | 135 | } |
| 136 | 136 | ||
| 137 | /// Unlink the next linear item. | 137 | /// Unlink the next linear item. |
| 138 | /// | 138 | /// |
| 139 | /// Disables channel update bits. | 139 | /// Disables channel update bits. |
| 140 | fn unlink(&mut self) { | 140 | fn unlink(&mut self) { |
| 141 | self.llr = regs::ChLlr(0).0; | 141 | self.llr = regs::ChLlr(0); |
| 142 | } | 142 | } |
| 143 | 143 | ||
| 144 | /// The item's transfer count in number of words. | 144 | /// The item's transfer count in number of words. |
| 145 | fn transfer_count(&self) -> usize { | 145 | fn transfer_count(&self) -> usize { |
| 146 | let br1 = regs::ChBr1(self.br1); | 146 | let word_size: WordSize = self.tr1.ddw().into(); |
| 147 | let tr1 = regs::ChTr1(self.tr1); | 147 | self.br1.bndt() as usize / word_size.bytes() |
| 148 | let word_size: WordSize = tr1.ddw().into(); | ||
| 149 | |||
| 150 | br1.bndt() as usize / word_size.bytes() | ||
| 151 | } | 148 | } |
| 152 | } | 149 | } |
| 153 | 150 | ||
