diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-09-24 23:54:32 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-09-25 01:07:55 +0200 |
| commit | e03239e88d7f2d01f31de5e5eef2b4d79522679d (patch) | |
| tree | 077c0a9cb985a857f1eec1a4b2f5b348d5a25319 /embassy-stm32/src/eth/v2/mod.rs | |
| parent | 65d36f9f99c3b8055e7b9c02e1b1aae3cb242d6a (diff) | |
stm32: centralize enabling pwr, syscfg, flash.
Diffstat (limited to 'embassy-stm32/src/eth/v2/mod.rs')
| -rw-r--r-- | embassy-stm32/src/eth/v2/mod.rs | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/embassy-stm32/src/eth/v2/mod.rs b/embassy-stm32/src/eth/v2/mod.rs index ada495fdb..f03ea2e31 100644 --- a/embassy-stm32/src/eth/v2/mod.rs +++ b/embassy-stm32/src/eth/v2/mod.rs | |||
| @@ -80,7 +80,6 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> { | |||
| 80 | // Enable the necessary Clocks | 80 | // Enable the necessary Clocks |
| 81 | #[cfg(not(rcc_h5))] | 81 | #[cfg(not(rcc_h5))] |
| 82 | critical_section::with(|_| { | 82 | critical_section::with(|_| { |
| 83 | crate::pac::RCC.apb4enr().modify(|w| w.set_syscfgen(true)); | ||
| 84 | crate::pac::RCC.ahb1enr().modify(|w| { | 83 | crate::pac::RCC.ahb1enr().modify(|w| { |
| 85 | w.set_eth1macen(true); | 84 | w.set_eth1macen(true); |
| 86 | w.set_eth1txen(true); | 85 | w.set_eth1txen(true); |